Abstract: An apparatus for controlling humidity in a fuel cell is provided. The apparatus can include a housing having an interior surface defining a volume and containing at least one fuel cell disposed within the volume. The apparatus may also include a plurality of electrodes disposed within the volume. The apparatus can include an aperture defined by the housing through which at least one air gas stream can be in fluid communication with at least one of the plurality of electrodes. The apparatus can include a humidity-controlling component, wherein the humidity-controlling component is in fluid communication with the air gas stream prior to the air gas stream contacting the at least one of the plurality of electrodes, and humidity-controlling component being capable of controlling a relative humidity of the air gas stream. A method for controlling humidity in a fuel cell is provided.

Abstract: A device or system for operating one or more electrochemical cells, such as a rechargeable fuel cell, is provided. A plurality of subsystems include a humidity level control subsystem, a reagent gas delivery subsystem, and a gas scrubbing subsystem. A method for operating the device or system is also provided.

Abstract: A semiconductor device, such as a LDMOS device, comprising: a semiconductor substrate; a drain region in the semiconductor substrate; a source region in the semiconductor substrate laterally spaced from the drain region; and a drift region in the semiconductor substrate between the drain region and the source region. A gate is operatively coupled to the source region and is located offset from the drain region on a side of the source region opposite from the drain region. When the device is in an on state, current tends to flow deeper into the drift region to the offset gate, rather than near the device surface. The drift region preferably includes at least first and second stacked JFETs.

Abstract: Embodiments disclosed herein describe a network device including a class AB common mode suppression (CMS) circuit coupled in parallel between a line voltage source and a physical layer (PHY) device that provides active EMI suppression and Phy device termination. A network connector is coupled to provide the line voltage source to the class AB CMS circuit. The class AB CMS circuit provides current to the PHY device, terminates open-drain transmit drivers of the PHY device and suppresses common mode noise thereby minimizing electromagnetic interference. In other embodiments, the class AB CMS circuit is coupled in parallel between the network connector and a physical layer (PHY) device. The class AB CMS circuit suppresses common mode noise, and terminates open-drain transmit drivers of the PHY device, thereby minimizing electromagnetic interference.

Abstract: A lateral Insulated Gate Bipolar Transistor (LIGBT) includes a semiconductor substrate and an anode region in the semiconductor substrate. A cathode region of a first conductivity type in the substrate is laterally spaced from the anode region, and a cathode region of a second conductivity type in the substrate is located proximate to and on a side of the cathode region of the first conductivity type opposite from the anode region. A drift region in the semiconductor substrate extends between the anode region and the cathode region of the first conductivity type. An insulated gate is operatively coupled to the cathode region of the first conductivity type and is located on a side of the cathode region of the first conductivity type opposite from the anode region. An insulating spacer overlies the cathode region of the second conductivity type.

Abstract: A semiconductor device, such as a LDMOS device, comprising: a semiconductor substrate; a drain region in the semiconductor substrate; a source region in the semiconductor substrate laterally spaced from the drain region; and a drift region in the semiconductor substrate between the drain region and the source region. A gate is operatively coupled to the source region and is located offset from the drain region on a side of the source region opposite from the drain region. When the device is in an on state, current tends to flow deeper into the drift region to the offset gate, rather than near the device surface. The drift region preferably includes at least first and second stacked JFETs.

Abstract: A network device comprises an interface coupling an electronic device to a differential pair of signal lines, and an integrated active common mode suppression and electrostatic discharge protection circuit coupled to the interface in parallel to differential signal lines of the electronic device.

Abstract: A network device comprises an interface coupling an electronic device to a differential pair of signal lines, and an active common mode suppression circuit coupled to the interface in parallel to differential signal lines of the electronic device.

Abstract: A semiconductor device, such as a LDMOS device, comprising: a semiconductor substrate; a drain region in the semiconductor substrate; a source region in the semiconductor substrate laterally spaced from the drain region; and a drift region in the semiconductor substrate between the drain region and the source region. A gate is operatively coupled to the source region and is located offset from the drain region on a side of the source region opposite from the drain region. When the device is in an on state, current tends to flow deeper into the drift region to the offset gate, rather than near the device surface. The drift region preferably includes at least first and second stacked JFETs.

Abstract: A method for the assigning rack space in an Internet data center is disclosed. The method includes defining a fragment space from the rack space and defining a fragment space threshold. When a business requesting a rack space is received, a space from the fragment space is assigned to the business if it is determined that the size of space requested by the business is smaller than the fragment space threshold.

Abstract: A method for determining the presence and location of static shadows and other ambient conditions (such as glare, snow, rain, etc.) in a series of time-successive images is provided. Each image comprises a series of image elements locatable on a plane, with each element being associated with a color defined by three chromatic elements. Furthermore, each image is partitioned into a set of elements, with each element comprising one or more pixels. According to the process of the present method, the ambient conditions are detected using a mixture of processes which utilize the chromatic elements, luminance qualities and temporal characteristics of the series of images.

Abstract: The invention includes a laterally double-diffused metal-oxide semiconductor (LDMOS) having a reduced size, a high breakdown voltage, and a low on-state resistance. This is achieved by providing a thick gate oxide on the drain side of the device, which reduces electric field crowding in the off-state to reduce the breakdown voltage and forms an accumulation layer in the drift region to reduce the device resistance in the on-state. A version of the device includes a low threshold voltage version with a thin gate oxide on the source side of the device and a high threshold voltage version of the device includes a thick gate oxide on the source side. The LDMOS may be configured in an LNDMOS having an N type source or an LPDMOS having a P type source. The source of the device is fully aligned under the oxide spacer adjacent the gate to provide a large SOA, to reduce the device size and to reduce the device leakage.

Abstract: An integrated circuit provides equalized outputs. Main data and equalization data is produced at one fourth of the output data rate, and multiplexed onto an output node at the output data rate.

Abstract: A fuel cell assembly may be provided that includes a first cathodic electrode and a second cathodic electrode; an anodic electrode positioned between the first cathodic electrode and the second cathodic electrode; a first membrane positioned between the first cathodic electrode and the anodic electrode; a second membrane positioned between the second cathodic electrode and the anodic electrode; and a seal ring for sealing the fuel cell assembly, the seal ring comprising a water-refilling mechanism.

Abstract: A third electrode frame structure for use in a fuel cell or battery is provided. The third electrode frame structure may include a first electrode, a separator positioned on an outer perimeter of the first electrode, and a frame third electrode coupled to the separator. The separator may be positioned in a same plane between the first electrode and the third frame electrode.

Abstract: A galvanic cell structure is provided. The galvanic cell structure includes an outer cylinder featuring air inlets, a cathode, an anode, a membrane separating the cathode from the anode, and an inner cylinder featuring fluid inlets that may provide a volume for storing and/or transferring fluid for use in the galvanic cell.

Abstract: A semiconductor integrated circuit including an LDMOS device structure comprises a semiconductor layer with a pair of spaced-apart field effect gate structures over an upper surface of the semiconductor layer. First and second spaced-apart source regions of a first conductivity type are formed in a portion of the layer between the pair of gate structures with a first region of a second conductivity type formed there between. A lightly doped body region of a second conductivity type is formed in the semiconductor layer, extending from below the source regions to below the gate structures and extending a variable depth into the semiconductor layer. This body region is characterized by an inflection in depth in that portion of the body region extending below the first region.

Abstract: An apparatus including a housing having walls is provided. The walls of the housing each have inner surfaces and outer surfaces. The walls may include apertures extending from the inner surface to the outer surface. The inner surfaces of the walls define a volume. The volume includes an electrode. The volume further includes a water-controlling separator disposed between the inner surface of the housing and the electrode. The water-controlling separator can block a flow of liquid from the electrode through the apertures to the ambient environment while allowing oxidant to flow from the ambient environment through the apertures to the electrode.

Abstract: A galvanic cell with a closed structure is provided. The cell may include a galvanic cell unit having a metal hydride anode, separators positioned on opposite sides of the metal hydride anode, oxygen electrodes positioned adjacent to the separators on sides opposite to the metal hydride anode, insulator plates positioned in contact with the oxygen electrodes, an electrolyte in contact with any one or more of the metal hydride anode, oxygen electrodes, insulator plates, or separators, and a pressure vessel enclosing the galvanic cell unit.

Abstract: An HV PMOS device formed on a substrate having an HV well of a first polarity type formed in an epitaxial layer of a second polarity type includes a pair of field oxide regions on the substrate and at least partially over the HV well. Insulated gates are formed on the substrate between the field oxide regions. Stacked hetero-doping rims are formed in the HV well and in self-alignment with outer edges of the gates. A buffer region of the first polarity type is formed in the HV well between and in self-alignment with inner edges of the gates. A drift region of the second polarity type is formed in the buffer region between and in self-alignment with inner edges of the gates. The drift region includes a region having a gradual dopant concentration change, and includes a drain region of the second polarity type.