Abstract: A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2 in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).

Abstract: A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2 in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).

Abstract: A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2 in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).

Abstract: Methods of forming a semiconductor device having a metal gate electrode include sequentially forming a gate insulator, a gate polysilicon layer and a metal-gate layer on a semiconductor substrate. The metal-gate layer and the gate polysilicon layer are sequentially patterned to form a gate pattern comprising a stacked gate polysilicon pattern and a metal-gate pattern. An oxidation barrier layer is formed to cover at least a portion of a sidewall of the metal-gate pattern.

Abstract: Methods of forming a semiconductor device having a metal gate electrode include sequentially forming a gate insulator, a gate polysilicon layer and a metal-gate layer on a semiconductor substrate. The metal-gate layer and the gate polysilicon layer are sequentially patterned to form a gate pattern comprising a stacked gate polysilicon pattern and a metal-gate pattern. An oxidation barrier layer is formed to cover at least a portion of a sidewall of the metal-gate pattern.

Abstract: A method of fabricating a semiconductor device that includes dual spacers is provided. A nitrogen atmosphere may be created and maintained in a reaction chamber by supplying a nitrogen source gas. A silicon source gas and an oxygen source gas may then be supplied to the reaction chamber to deposit a silicon oxide layer on a semiconductor substrate, which may include a conductive material layer. A silicon nitride layer may then be formed on the silicon oxide layer by performing a general CVD process. Next, the silicon nitride layer may be etched until the silicon oxide layer is exposed. Because of the difference in etching selectivity between silicon nitride and silicon oxide, portions of the silicon nitride layer may remain on sidewalls of the conductive material layer. As a result, dual spacers formed of a silicon oxide layer and a silicon nitride layer may be formed on the sidewalls.

Abstract: A method of fabricating a semiconductor device that includes dual spacers is provided. A nitrogen atmosphere may be created and maintained in a reaction chamber by supplying a nitrogen source gas. A silicon source gas and an oxygen source gas may then be supplied to the reaction chamber to deposit a silicon oxide layer on a semiconductor substrate, which may include a conductive material layer. A silicon nitride layer may then be formed on the silicon oxide layer by performing a general CVD process. Next, the silicon nitride layer may be etched until the silicon oxide layer is exposed. Because of the difference in etching selectivity between silicon nitride and silicon oxide, portions of the silicon nitride layer may remain on sidewalls of the conductive material layer. As a result, dual spacers formed of a silicon oxide layer and a silicon nitride layer may be formed on the sidewalls.

Abstract: In a method of forming a metal gate electrode, an annealing process is performed in a hydrogen-containing gas ambient following a selective oxidation process. During the annealing process, a metal oxide layer formed by the selective oxidation process is removed by a reduction reaction or hydrogen atoms are contained in the metal oxide layer to suppress whisker nucleation and surface mobility.

Abstract: A method of avoiding collisions in a mobile communication system having an access network and at least one access terminal. The method includes receiving, from the at least one access terminal, a service connection request message including an access terminal identifier and a time identifier, and comparing a time information of the received time identifier to a reset time of the at least one access network. Further, if the time information precedes the reset time as a result of the comparison, the method includes broadcasting a session close message including the access terminal identifier and the time identifier to the at least one access terminal.

Abstract: An organic electroluminescence device including a plurality of electrodes formed on a substrate, and a plurality of lead lines are coupled to the plurality of electrodes. At least two or more lead lines among the plurality of lead lines have different widths, and a width of a longer lead line among the plural lead lines is greater than a width of a shorter lead line.

Abstract: Methods of forming a semiconductor device having a metal gate electrode include sequentially forming a gate insulator, a gate polysilicon layer and a metal-gate layer on a semiconductor substrate. The metal-gate layer and the gate polysilicon layer are sequentially patterned to form a gate pattern comprising a stacked gate polysilicon pattern and a metal-gate pattern. An oxidation barrier layer is formed to cover at least a portion of a sidewall of the metal-gate pattern.

Abstract: Embodiments of the present invention include semiconductor devices that can be made with relatively low resistance, and methods of forming such devices. Between forming a polysilicon layer and a metal layer, an interface reaction preventing layer is created. This reaction preventing layer prevents a buildup of highly resistive materials that would otherwise occur when creating conventional semiconductor devices, as well as having other functions.

Abstract: A method of manufacturing a semiconductor device having a metal conducting layer is provided. A metal conducting layer pattern having the metal conducting layer is formed on a semiconductor substrate. A portion of the metal conducting layer is partially exposed on the semiconductor substrate. The semiconductor substrate having the metal conducting layer pattern is loaded into a reaction chamber. A first silicon source gas is flowed into the reaction chamber. A silicon oxide layer is formed on the semiconductor substrate having the metal conducting layer pattern by supplying a second silicon source gas and an oxygen source gas into the reaction chamber.

Abstract: The present invention includes a method of forming a metal gate electrode on which whiskers are not formed after performing a selective oxidation process and a subsequent heating process. The metal gate electrode is formed by forming a metal gate electrode pattern which is comprised of a polysilicon layer and a metal layer, and performing a selective oxidation process. After the selective oxidation process, the metal gate electrode undergoes a subsequent heating treatment. The selective oxidation process is carried out in a nitrogen containing gas ambient, so that a metal oxide layer is minimally formed on the metal layer. As a result, it is prevented from causing whiskers on the metal layer.

Abstract: A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2 in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).

Abstract: An electroluminescent display (EL) device and a method of manufacturing the same. The EL device includes a substrate, a first electrode unit including first electrodes formed on the substrate in a predetermined pattern, and first electrode terminals connected to the respective first electrodes; a second electrode unit including second electrodes formed on the first electrodes, and second electrode terminals connected to the respective second electrodes; an emission area formed where the first electrodes intersect the second electrodes, an electroluminescent layer disposed between the first electrodes and the second electrodes in the emission area, and an outer insulating layer between the emission area and the second electrode terminals; wherein the outer insulating layer comprises an insulating material formed to contact at least an edge of the second electrode terminals facing the emission area to reduce a steepness of a step between the second electrode terminal and the substrate.

Abstract: A method of fabricating a semiconductor device that includes dual spacers is provided. A nitrogen atmosphere may be created and maintained in a reaction chamber by supplying a nitrogen source gas. A silicon source gas and an oxygen source gas may then be supplied to the reaction chamber to deposit a silicon oxide layer on a semiconductor substrate, which may include a conductive material layer. A silicon nitride layer may then be formed on the silicon oxide layer by performing a general CVD process. Next, the silicon nitride layer may be etched until the silicon oxide layer is exposed. Because of the difference in etching selectivity between silicon nitride and silicon oxide, portions of the silicon nitride layer may remain on sidewalls of the conductive material layer. As a result, dual spacers formed of a silicon oxide layer and a silicon nitride layer may be formed on the sidewalls.

Abstract: A method of manufacturing a semiconductor device having a metal conducting layer is provided. A metal conducting layer pattern having the metal conducting layer is formed on a semiconductor substrate. A portion of the metal conducting layer is partially exposed on the semiconductor substrate. The semiconductor substrate having the metal conducting layer pattern is loaded into a reaction chamber. A first silicon source gas is flowed into the reaction chamber. A silicon oxide layer is formed on the semiconductor substrate having the metal conducting layer pattern by supplying a second silicon source gas and an oxygen source gas into the reaction chamber.

Abstract: The present invention includes a method of forming a metal gate electrode on which whiskers are not formed after performing a selective oxidation process and a subsequent heating process. The metal gate electrode is formed by forming a metal gate electrode pattern which is comprised of a polysilicon layer and a metal layer, and performing a selective oxidation process. After the selective oxidation process, the metal gate electrode undergoes a subsequent heating treatment. The selective oxidation process is carried out in a nitrogen containing gas ambient, so that a metal oxide layer is minimally formed on the metal layer. As a result, it is prevented from causing whiskers on the metal layer.

Abstract: In a method of forming a metal gate electrode, an annealing process is performed in a hydrogen-containing gas ambient following a selective oxidation process. During the annealing process, a metal oxide layer formed by the selective oxidation process is removed by a reduction reaction or hydrogen atoms are contained in the metal oxide layer to suppress whisker nucleation and surface mobility.