Abstract: A method for forming a metal oxide thin film pattern using nanoimprinting according to one embodiment of the present invention includes: coating a photosensitive metal-organic material precursor solution on a substrate; pressurizing the photosensitive metal-organic material precursor coating layer to a mold patterned to have a protrusion and depression structure; forming the metal oxide thin film pattern by irradiating ultraviolet rays to the pressurized photosensitive metal-organic material precursor coating layer to cure it; and removing the patterned mold from the metal oxide thin film pattern.

Abstract: Provided is a method of manufacturing a semiconductor device having a switching device capable of preventing a snake current. First, a transition metal oxide layer and a leakage control layer are alternately stacked on a substrate 1 to 20 times to form a varistor layer. The transition metal oxide layer is formed to contain an excessive transition metal compared to its stable state. The leakage control layer may be formed of one selected from the group consisting of a Mg layer, a Ta layer, an Al layer, a Zr layer, a Hf layer, a polysilicon layer, a conductive carbon group layer, and a Nb layer.

Abstract: A semiconductor device includes an interlayer insulating layer disposed on a substrate, the interlayer insulating layer comprising an opening exposing the substrate, a barrier layer pattern disposed within the opening, and a conductive pattern disposed on the barrier layer pattern, the conductive pattern having an oxidized portion extending out of the opening and a non-oxidized portion within the opening, wherein a width of the conductive pattern is determined by a thickness of the barrier layer pattern.

Abstract: Methods of forming a resistive memory device include forming an insulation layer on a semiconductor substrate including a conductive pattern, forming a contact hole in the insulation layer to expose the conductive pattern, forming a lower electrode in the contact hole, forming a variable resistive oxide layer in the contact hole on the lower electrode, forming a middle electrode in the contact hole on the variable resistive oxide layer, forming a buffer oxide layer on the middle electrode and the insulation layer, and forming an upper electrode on the buffer oxide layer. Related resistive memory devices are also disclosed.

Abstract: Methods of forming a resistive memory device include forming an insulation layer on a semiconductor substrate including a conductive pattern, forming a contact hole in the insulation layer to expose the conductive pattern, forming a lower electrode in the contact hole, forming a variable resistive oxide layer in the contact hole on the lower electrode, forming a middle electrode in the contact hole on the variable resistive oxide layer, forming a buffer oxide layer on the middle electrode and the insulation layer, and forming an upper electrode on the buffer oxide layer. Related resistive memory devices are also disclosed.

Abstract: A UV nanoimprint lithography process and its apparatus that are able to repeatedly fabricates nanostructures on a substrate (wafer, UV-transparent plate) by using a stamp that is as large as or smaller than the substrate in size are provided. The apparatus includes a substrate chuck for mounting the substrate; a stamp made of UV-transparent materials and having more than two element stamps, wherein nanostructures are formed on the surface of each element stamp; a stamp chuck for mounting the stamp; a UV lamp unit for providing UV light to cure resist applied between the element stamps and the substrate; a moving unit for moving the substrate chuck or the stamp chuck to press the resist with the element stamps and substrate; and a pressure supply unit for applying pressurized gas to some selected regions of the substrate to help complete some incompletely filled element stamps.

Abstract: A magnetic memory cell array device can include a first current source line extending between pluralities of first and second memory cells configured for respective simultaneous programming and configured to conduct adequate programming current for writing one of the pluralities of first and second memory cells, a first current source transistor coupled to the first current source line and to a word line, a programming conductor coupled to the first current source transistor and extending across bit lines coupled to the one of the pluralities of first and second memory cells, configured to conduct the programming current across the bit lines, a second current source transistor coupled to the programming conductor and configured to switch the programming current from the programming conductor to a second current source transistor output, a second current source line extending adjacent the one of the pluralities of first and second memory cells opposite the first current source line, a first bias circuit config

Abstract: A UV nanoimprint lithography process and its apparatus that are able to repeatedly fabricates nanostructures on a substrate (wafer, UV-transparent plate) by using a stamp that is as large as or smaller than the substrate in size are provided. The apparatus includes a substrate chuck for mounting the substrate; a stamp made of UV-transparent materials and having more than two element stamps, wherein nanostructures are formed on the surface of each element stamp; a stamp chuck for mounting the stamp; a UV lamp unit for providing UV light to cure resist applied between the element stamps and the substrate; a moving unit for moving the substrate chuck or the stamp chuck to press the resist with the element stamps and substrate; and a pressure supply unit for applying pressurized gas to some selected regions of the substrate to help complete some incompletely filled element stamps.

Abstract: A magnetic memory device includes a pinning layer, a pinned layer, an insulation layer, which are sequentially stacked on a semiconductor substrate. The magnetic memory device further includes a free layer disposed on the insulation layer, a capping layer disposed on the free layer and an MR (magnetoresistance) enhancing layer interposed between the free layer and the capping layer. The MR enhancing layer is formed of at least one anti-ferromagnetic material.

Abstract: A magnetic memory device and a method of fabricating the same. The magnetic memory device includes a free layer, a write element, and a read element. The write element changes the magnetization direction of the free layer, and the read element senses the magnetization direction of the free layer. Herein, the write element includes a current confinement layer having a width smaller than the minimum width of the free layer to locally increase the density of a current flowing through the write element.

Abstract: The present invention provides a flat fluorescent lamp. The flat fluorescent lamp comprises a single plate. Consequently, the flat fluorescent lamp is structurally safe, brightness of the flat fluorescent lamp is high, and efficiency of the flat fluorescent lamp is also high without the provision of other additional optical components. The present invention also provides a method of manufacturing such a flat fluorescent lamp.

Abstract: A Resistance based Random Access Memory (ReRAM) can include a sense amplifier circuit that includes a first input coupled to a bit line of a reference cell in a first block of the ReRAM responsive to a read operation to a second block.

Abstract: An organic light emitting device having a photonic crystal structure and a manufacturing method thereof are provided. The organic light emitting device comprises: a substrate through which light passes; a photonic crystal layer formed on the substrate and having a photonic crystal structure; an intermediate layer formed on the photonic crystal layer and having a large refractive index compared with the photonic crystal layer; a first electrode layer formed on the intermediate layer; a light emitting layer formed on the first electrode layer and emitting light according to current flow; and a second electrode layer formed on the light emitting layer.

Abstract: A magnetic memory cell array device can include a first current source line extending between pluralities of first and second memory cells configured for respective simultaneous programming and configured to conduct adequate programming current for writing one of the pluralities of first and second memory cells, a first current source transistor coupled to the first current source line and to a word line, a programming conductor coupled to the first current source transistor and extending across bit lines coupled to the one of the pluralities of first and second memory cells, configured to conduct the programming current across the bit lines, a second current source transistor coupled to the programming conductor and configured to switch the programming current from the programming conductor to a second current source transistor output, a second current source line extending adjacent the one of the pluralities of first and second memory cells opposite the first current source line, a first bias circuit config

Abstract: Methods of forming a resistive memory device include forming an insulation layer on a semiconductor substrate including a conductive pattern, forming a contact hole in the insulation layer to expose the conductive pattern, forming a lower electrode in the contact hole, forming a variable resistive oxide layer in the contact hole on the lower electrode, forming a middle electrode in the contact hole on the variable resistive oxide layer, forming a buffer oxide layer on the middle electrode and the insulation layer, and forming an upper electrode on the buffer oxide layer. Related resistive memory devices are also disclosed.

Abstract: A Resistance based Random Access Memory (ReRAM) can include a current reference circuit including at least three ReRAM reference cells coupled in parallel with one another and configured to provide a reference current to respective ReRAM sense amplifier circuits.

Abstract: Provided is a method of manufacturing a semiconductor device having a switching device capable of preventing a snake current. First, a transition metal oxide layer and a leakage control layer are alternately stacked on a substrate 1 to 20 times to form a varistor layer. The transition metal oxide layer is formed to contain an excessive transition metal compared to its stable state. The leakage control layer may be formed of one selected from the group consisting of a Mg layer, a Ta layer, an Al layer, a Zr layer, a Hf layer, a polysilicon layer, a conductive carbon group layer, and a Nb layer.

Abstract: A microcontact printing method using an imprinted nanostructure is provided, wherein the microcontact printing is introduced to a nanoimprint lithography process to pattern a self-assembled monolayer (SAM). The method includes forming a nanostructure on a substrate by using the nanoimprint lithography process; and patterning the nanostructure with the microcontact printing method. The operation of patterning includes: depositing a metal thin film on the nanostructure; contacting a plate with the nanostructure to selectively print the SAM on the nanostructure, wherein the SAM is inked on the plate and the metal thin film is deposited on the nanostructure; selectively removing the metal thin film by using the SAM as a mask; removing the SAM from the nanostructure; and patterning the substrate by using the remaining metal thin film on the nanostructure as a mask.

Abstract: There is provided a storage of a non-volatile memory device and a method of forming the same. The storage of example embodiments may include a bottom electrode, a first tunneling insulating layer on the bottom electrode, a middle electrode on the first tunneling insulating layer, a second tunneling insulating layer on the middle electrode, and a top electrode on the second tunneling insulating layer. The first and second tunneling insulating layers may be formed of metal oxide having a thickness from about several ? to about several tens ? and a storage may be formed to have a width of about several tens nm. Therefore, a multi bit storage, increased integration, increased operation speed and decreased power consumption may be realized.

Abstract: The present invention provides a flat fluorescent lamp. The flat fluorescent lamp comprises a single plate. Consequently, the flat fluorescent lamp is structurally safe, brightness of the flat fluorescent lamp is high, and efficiency of the flat fluorescent lamp is also high without the provision of other additional optical components. The present invention also provides a method of manufacturing such a flat fluorescent lamp.