Abstract: The present invention provides a flat fluorescent lamp. The flat fluorescent lamp comprises a single plate. Consequently, the flat fluorescent lamp is structurally safe, brightness of the flat fluorescent lamp is high, and efficiency of the flat fluorescent lamp is also high without the provision of other additional optical components. The present invention also provides a method of manufacturing such a flat fluorescent lamp.

Abstract: An integrated circuit memory device may include an integrated circuit substrate, and a multi-bit memory cell on the integrated circuit substrate. The multi-bit memory cell may be configured to store a first bit of data by changing a first characteristic of the multi-bit memory cell and to store a second bit of data by changing a second characteristic of the multi-bit memory cell. Moreover, the first and second characteristics may be different. Related methods are also discussed.

Abstract: The present invention provides a flat fluorescent lamp. The flat fluorescent lamp comprises a single plate. Consequently, the flat fluorescent lamp is structurally safe, brightness of the flat fluorescent lamp is high, and efficiency of the flat fluorescent lamp is also high without the provision of other additional optical components. The present invention also provides a method of manufacturing such a flat fluorescent lamp.

Abstract: Methods of programming a RRAM device are provided. An increasing set current is applied to a data storing layer pattern of the RRAM device while measuring a resistance of the data storing layer pattern until the resistance indicates a set state in the data storing layer pattern. An increasing reset voltage is applied to the data storing layer pattern of the RRAM device while measuring the resistance of the data storing layer pattern until the resistance indicates a reset state in the data storing layer pattern.

Abstract: A method for forming a minute pattern includes depositing a material layer on a semiconductor substrate having a conductive region, forming a first mask layer on the material layer, forming a recess region in the first mask layer, performing layer processing to form a first mask pattern in the recess region, and etching the material layer to form a material layer pattern.

Abstract: A magnetic memory device includes a pinning layer, a pinned layer, an insulation layer, which are sequentially stacked on a semiconductor substrate. The magnetic memory device further includes a free layer disposed on the insulation layer, a capping layer disposed on the free layer and an MR (magnetoresistance) enhancing layer interposed between the free layer and the capping layer. The MR enhancing layer is formed of at least one anti-ferromagnetic material.

Abstract: The present invention relates to a micro/nano imprint lithography technique and in particular, to a stamp that is used in an UV-micro/nano imprint lithography process or thermal micro/nano imprint lithography process and a method for fabricating the stamp. The method for fabricating a stamp for micro/nano imprint lithography of the present invention includes i) depositing a thin film of diamond-like carbon on a substrate, ii) applying resist on the diamond-like carbon thin film, iii) patterning the resist, iv) etching the diamond-like carbon thin film by using the resist as a protective layer, and v) removing the resist.

Abstract: A Resistance based Random Access Memory (ReRAM) can include a current reference circuit including at least three ReRAM reference cells coupled in parallel with one another and configured to provide a reference current to respective ReRAM sense amplifier circuits.

Abstract: A method of accessing a resistive memory device can include applying a predetermined voltage level to a first word line coupled to a first resistive memory cell block during a read operation of a second resistive memory cell block coupled to a second word line, A programming current can be conducted via a pair of opposing current source transistors located on first and second opposing sides of the first block to provide the programming current from the first end to the second end across bit lines coupled to resistive memory cells in the first block and to provide the programming current parallel to the second block.

Abstract: A UV nanoimprint lithography process for forming nanostructures on a substrate. The process includes depositing a resist on a substrate; contacting a stamp having formed thereon nanostructures at areas corresponding to where nanostructures on the substrate are to be formed to an upper surface of the resist, and applying a predetermined pressure to the stamp in a direction toward the substrate, the contacting and applying being performed at room temperature and at low pressure; irradiating ultraviolet rays onto the resist; separating the stamp from the resist; and etching an upper surface of the substrate on which the resist is deposited. The stamp is an elementwise embossed stamp that comprises at least two element stamps, and grooves formed between adjacent element stamps and having a depth that is greater than a depth of the nanostructures formed on the element stamps.

Abstract: A UV nanoimprint lithography process and its apparatus that are able to repeatedly fabricates nanostructures on a substrate (wafer, UV-transparent plate) by using a stamp that is as large as or smaller than the substrate in size are provided. The apparatus includes a substrate chuck for mounting the substrate; a stamp made of UV-transparent materials and having more than two element stamps, wherein nanostructures are formed on the surface of each element stamp; a stamp chuck for mounting the stamp; a UV lamp unit for providing UV light to cure resist applied between the element stamps and the substrate; a moving unit for moving the substrate chuck or the stamp chuck to press the resist with the element stamps and substrate; and a pressure supply unit for applying pressurized gas to some selected regions of the substrate to help complete some incompletely filled element stamps.

Abstract: A microcontact printing method using an imprinted nanostructure is provided, wherein the microcontact printing is introduced to a nanoimprint lithography process to pattern a self-assembled monolayer (SAM) The method includes forming a nanostructure on a substrate by using the nanoimprint lithography process; and patterning the nanostructure with the microcontact printing method. The operation of patterning includes: depositing a metal thin film on the nanostructure; contacting a plate with the nanostructure to selectively print the SAM on the nanostructure, wherein the SAM is inked on the plate and the metal thin film is deposited on the nanostructure; selectively removing the metal thin film by using the SAM as a mask; removing the SAM from the nanostructure; and patterning the substrate by using the remaining metal thin film on the nanostructure as a mask.

Abstract: A UV nanoimprint lithography process for forming nanostructures on a substrate. The process includes depositing a resist on a substrate; contacting a stamp having formed thereon nanostructures at areas corresponding to where nanostructures on the substrate are to be formed to an upper surface of the resist, and applying a predetermined pressure to the stamp in a direction toward the substrate, the contacting and applying being performed at room temperature and at low pressure; irradiating ultraviolet rays onto the resist; separating the stamp from the resist; and etching an upper surface of the substrate on which the resist is deposited. The stamp is an elementwise embossed stamp that comprises at least two element stamps, and grooves formed between adjacent element stamps and having a depth that is greater than a depth of the nanostructures formed on the element stamps.

Abstract: To enhance accuracy of the size and the shape of manufactures, and to shorten the time of operation, there is provided a method for manufacturing a 3D model comprising steps of designing the 3D model and collecting shape data of the 3D model slicing the 3D model into several layers in height, dividing each of the layers into several sublayers so that a sublayer is formed by depositing a material at once, depositing a material in accordance with shape data in relation to a sublayer divided from one layer of the 3D model, and deciding whether the one layer of the 3D model has been completed. The method is conducted using computer-aided design and computer aided manufacturing system including a variable deposition manufacturing apparatus.