Patents by Inventor Jun-Hyuk Cheon

Jun-Hyuk Cheon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240222161
    Abstract: The present disclosure relates to blue laser annealing equipment and an annealing manufacturing process using the same. The blue laser annealing equipment includes at least one blue laser diode controller including at least one output fiber; at least one light path module connected to an output fiber of the blue laser diode controller to process light emitted from the output fiber and direct the light to a substrate and perform a dehydrogenation process or a crystallization process on a silicon layer applied to the substrate; and a stage capable of relative motion with respect to the light path module and loading the substrate so that the dehydrogenation process and the crystallization process are performed on a surface of the substrate with respect to the light path module.
    Type: Application
    Filed: November 6, 2023
    Publication date: July 4, 2024
    Inventors: Jun Hyuk CHEON, Seongbok Kang, Jin-han Park
  • Publication number: 20240038896
    Abstract: Disclosed is a thin film transistor including: a gate electrode disposed on a substrate; a semiconductor layer overlapping the gate electrode with a gate insulating film interposed therebetween, and a source region and a drain region which are in contact with the semiconductor layer, in which the semiconductor layer includes a crystallized oxide semiconductor, and the crystallized oxide semiconductor includes a crystal having an X-ray diffraction (XRD) main peak Miller index (hkl) value of (009).
    Type: Application
    Filed: February 10, 2023
    Publication date: February 1, 2024
    Inventors: Jin JANG, Jun Hyuk Cheon, Da Hoon Jung
  • Publication number: 20230207579
    Abstract: Disclosed are a crystalline p-type semiconductor film having a plurality of crystal grains with an average grain size of submicron and including a tin-doped copper halide, and a semiconductor device, a thin film transistor, a diode, and an electronic device including the same.
    Type: Application
    Filed: October 13, 2022
    Publication date: June 29, 2023
    Inventor: Jun Hyuk CHEON
  • Patent number: 11663978
    Abstract: The present invention relates to a driving circuit including stages for supplying signals. The respective stages may include: a first LTPO transistor including a first transistor that is a low-temperature polycrystalline silicon thin film transistor (LTPS TFT) and a second transistor that is an oxide TFT; and a second LTPO transistor including a third transistor that is an LTPS TFT and a fourth transistor that is an oxide TFT. A first end of the first LTPO transistor may be connected to a gate of the second LTPO transistor, and voltages of signals corresponding to the respective stages from among the signals may be a voltage at a first end of the second LTPO transistor.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: May 30, 2023
    Assignee: ADRC. CO. KR
    Inventors: Jin Jang, Jun Hyuk Cheon, Junyeong Kim, Suhui Lee, Yuanfeng Chen, Mohammad Masum Billah
  • Patent number: 11148247
    Abstract: A substrate polishing system includes: a polishing machine and a substrate transporter. The polishing machine includes: a lower surface plate to which a substrate is mounted, and an upper surface plate which faces the lower surface plate and polishes the substrate in cooperation with the lower surface plate, the upper surface plate having a larger area than the substrate mounted on the lower surface plate. The substrate transporter is adjacent to the polishing machine and commonly transports the substrate to and from the polishing machine in a first direction, attaches the substrate to the lower surface plate before polishing thereof, and separates from the lower surface plate the substrate after polishing thereof.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: October 19, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyun Jin Cho, Joon-Hwa Bae, Byoung Kwon Choo, Byung Hoon Kang, Jun Hyuk Cheon, Jeong-Hye Choi, Young Ho Jeong, Woo Jin Cho
  • Patent number: 10998343
    Abstract: A thin-film transistor (TFT) array substrate is provided. The TFT array substrate includes a base substrate, a semiconductor layer disposed on the base substrate, an insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the insulating layer. A top surface of a portion of the insulating layer overlapping the semiconductor layer in a plan view of the base substrate and a top surface of the gate electrode are placed on the same level.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: May 4, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Byoung Kwon Choo, Joon Hwa Bae, Hyun Jin Cho, Jun Hyuk Cheon, Zi Yeon Yoon, Woo Jin Cho, Sung Hwan Choi, Jeong Hye Choi
  • Publication number: 20200035715
    Abstract: A thin-film transistor (TFT) array substrate is provided. The TFT array substrate includes a base substrate, a semiconductor layer disposed on the base substrate, an insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the insulating layer. A top surface of a portion of the insulating layer overlapping the semiconductor layer in a plan view of the base substrate and a top surface of the gate electrode are placed on the same level.
    Type: Application
    Filed: October 3, 2019
    Publication date: January 30, 2020
    Inventors: BYOUNG KWON CHOO, Joon Hwa Bae, Hyun Jin Cho, Jun Hyuk Cheon, Zi Yeon Yoon, Woo Jin Cho, Sung Hwan Chol, Jeong Hye Choi
  • Patent number: 10475817
    Abstract: A thin-film transistor (TFT) array substrate is provided. The TFT array substrate includes a base substrate, a semiconductor layer disposed on the base substrate, an insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the insulating layer. A top surface of a portion of the insulating layer overlapping the semiconductor layer in a plan view of the base substrate and a top surface of the gate electrode are placed on the same level.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: November 12, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Byoung Kwon Choo, Joon Hwa Bae, Hyun Jin Cho, Jun Hyuk Cheon, Zi Yeon Yoon, Woo Jin Cho, Sung Hwan Choi, Jeong Hye Choi
  • Patent number: 10438976
    Abstract: A method for manufacturing a display device includes forming a first gate metal wire on a substrate, forming a first insulation layer that covers the first gate metal wire, forming a second gate metal wire on the first insulation layer, forming a second main insulation layer that covers the second gate metal wire, forming a second auxiliary insulation layer on the second main insulation layer, forming an exposed portion of an upper surface of the second main insulation layer by polishing the second auxiliary insulation layer, and forming a first data metal wire on the second main insulation layer and the second auxiliary insulation layer.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: October 8, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun Jin Cho, Joon-Hwa Bae, Byoung Kwon Choo, Byung Hoon Kang, Kwang Suk Kim, Woo Jin Cho, Jun Hyuk Cheon
  • Publication number: 20190148414
    Abstract: A method for manufacturing a display device includes forming a first gate metal wire on a substrate, forming a first insulation layer that covers the first gate metal wire, forming a second gate metal wire on the first insulation layer, forming a second main insulation layer that covers the second gate metal wire, forming a second auxiliary insulation layer on the second main insulation layer, forming an exposed portion of an upper surface of the second main insulation layer by polishing the second auxiliary insulation layer, and forming a first data metal wire on the second main insulation layer and the second auxiliary insulation layer.
    Type: Application
    Filed: January 9, 2019
    Publication date: May 16, 2019
    Inventors: Hyun Jin CHO, Joon-Hwa BAE, Byoung Kwon CHOO, Byung Hoon KANG, Kwang Suk KIM, Woo Jin CHO, Jun Hyuk CHEON
  • Patent number: 10204935
    Abstract: A method for manufacturing a display device includes forming a first gate metal wire on a substrate, forming a first insulation layer that covers the first gate metal wire, forming a second gate metal wire on the first insulation layer, forming a second main insulation layer that covers the second gate metal wire, forming a second auxiliary insulation layer on the second main insulation layer, forming an exposed portion of an upper surface of the second main insulation layer by polishing the second auxiliary insulation layer, and forming a first data metal wire on the second main insulation layer and the second auxiliary insulation layer.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: February 12, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun Jin Cho, Joon-Hwa Bae, Byoung Kwon Choo, Byung Hoon Kang, Kwang Suk Kim, Woo Jin Cho, Jun Hyuk Cheon
  • Patent number: 10199405
    Abstract: A method of manufacturing a transistor display panel and a transistor display panel, the method including forming a polycrystalline silicon layer on a substrate; forming an active layer by patterning the polycrystalline silicon layer; forming a first insulating layer covering the substrate and the active layer; exposing the active layer by polishing the first insulating layer using a polishing apparatus; and forming a second insulating layer that contacts the first insulating layer and the active layer, wherein exposing the active layer by polishing the first insulating layer includes coating a first slurry on a surface of the first insulating layer, the first slurry reducing a polishing rate of the active layer.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: February 5, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Joon-Hwa Bae, Byoung Kwon Choo, Byung Hoon Kang, Woo Jin Cho, Hyun Jin Cho, Jun Hyuk Cheon, Jee-Hyun Lee
  • Publication number: 20180358386
    Abstract: A thin-film transistor (TFT) array substrate is provided. The TFT array substrate includes a base substrate, a semiconductor layer disposed on the base substrate, an insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the insulating layer. A top surface of a portion of the insulating layer overlapping the semiconductor layer in a plan view of the base substrate and a top surface of the gate electrode are placed on the same level.
    Type: Application
    Filed: May 4, 2018
    Publication date: December 13, 2018
    Inventors: BYOUNG KWON CHOO, Joon Hwa BAE, Hyun Jin CHO, Jun Hyuk CHEON, Zi Yeon YOON, Woo Jin CHO, Sung Hwan CHOI, Jeong Hye CHOI
  • Patent number: 10043860
    Abstract: A method of manufacturing a display device includes: forming an active layer on a substrate; forming a first insulation layer covering the active layer; forming a gate metal line on the first insulation layer; forming a third insulation layer covering the gate metal line and including a silicon oxide; forming a fourth insulation layer including a silicon nitride on the third insulation layer; forming a fifth insulation layer including a silicon oxide on the fourth insulation layer; arranging a blocking member over a region in which the active layer and the gate metal line overlap; forming a fifth auxiliary insulation layer by doping nitrogen ions in the fifth insulation layer; and exposing a part of an upper surface of the fourth insulation layer by removing a portion of a fifth main insulation layer of the fifth insulation layer which does not overlap the fifth auxiliary insulation layer.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: August 7, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byung Hoon Kang, Kwang Suk Kim, Joon-Hwa Bae, Woo Jin Cho, Hyun Jin Cho, Jun Hyuk Cheon, Byoung Kwon Choo
  • Publication number: 20180114819
    Abstract: A method of manufacturing a display device includes: forming an active layer on a substrate; forming a first insulation layer covering the active layer; forming a gate metal line on the first insulation layer; forming a third insulation layer covering the gate metal line and including a silicon oxide; forming a fourth insulation layer including a silicon nitride on the third insulation layer; forming a fifth insulation layer including a silicon oxide on the fourth insulation layer; arranging a blocking member over a region in which the active layer and the gate metal line overlap; forming a fifth auxiliary insulation layer by doping nitrogen ions in the fifth insulation layer; and exposing a part of an upper surface of the fourth insulation layer by removing a portion of a fifth main insulation layer of the fifth insulation layer which does not overlap the fifth auxiliary insulation layer.
    Type: Application
    Filed: May 25, 2017
    Publication date: April 26, 2018
    Inventors: Byung Hoon KANG, Kwang Suk KIM, Joon-Hwa BAE, Woo Jin CHO, Hyun Jin CHO, Jun Hyuk CHEON, Byoung Kwon CHOO
  • Publication number: 20180108684
    Abstract: A method for manufacturing a display device includes forming a first gate metal wire on a substrate, forming a first insulation layer that covers the first gate metal wire, forming a second gate metal wire on the first insulation layer, forming a second main insulation layer that covers the second gate metal wire, forming a second auxiliary insulation layer on the second main insulation layer, forming an exposed portion of an upper surface of the second main insulation layer by polishing the second auxiliary insulation layer, and forming a first data metal wire on the second main insulation layer and the second auxiliary insulation layer.
    Type: Application
    Filed: September 13, 2017
    Publication date: April 19, 2018
    Inventors: Hyun Jin CHO, Joon-Hwa BAE, Byoung Kwon CHOO, Byung Hoon KANG, Kwang Suk KIM, Woo Jin CHO, Jun Hyuk CHEON
  • Publication number: 20180043501
    Abstract: A substrate polishing system includes: a polishing machine and a substrate transporter. The polishing machine includes: a lower surface plate to which a substrate is mounted, and an upper surface plate which faces the lower surface plate and polishes the substrate in cooperation with the lower surface plate, the upper surface plate having a larger area than the substrate mounted on the lower surface plate. The substrate transporter is adjacent to the polishing machine and commonly transports the substrate to and from the polishing machine in a first direction, attaches the substrate to the lower surface plate before polishing thereof, and separates from the lower surface plate the substrate after polishing thereof.
    Type: Application
    Filed: July 31, 2017
    Publication date: February 15, 2018
    Inventors: Hyun Jin CHO, Joon-Hwa BAE, Byoung Kwon CHOO, Byung Hoon KANG, Jun Hyuk CHEON, Jeong-Hye CHOI, Young Ho JEONG, Woo Jin CHO
  • Publication number: 20180047762
    Abstract: A method of manufacturing a transistor display panel and a transistor display panel, the method including forming a polycrystalline silicon layer on a substrate; forming an active layer by patterning the polycrystalline silicon layer; forming a first insulating layer covering the substrate and the active layer; exposing the active layer by polishing the first insulating layer using a polishing apparatus; and forming a second insulating layer that contacts the first insulating layer and the active layer, wherein exposing the active layer by polishing the first insulating layer includes coating a first slurry on a surface of the first insulating layer, the first slurry reducing a polishing rate of the active layer.
    Type: Application
    Filed: August 8, 2017
    Publication date: February 15, 2018
    Inventors: Joon-Hwa BAE, Byoung Kwon CHOO, Byung Hoon KANG, Woo Jin CHO, Hyun Jin CHO, Jun Hyuk CHEON, Jee-Hyun LEE
  • Patent number: 9608216
    Abstract: A flexible display device includes a flexible substrate including a display region and a peripheral region substantially surrounding the display region, the display region including a first display region and a second display region, a first display structure at the first display region of the flexible substrate, the first display structure including nanoparticles, and a second display structure at the second display region of the flexible substrate, the second display structure including silicon.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: March 28, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jun-Hyuk Cheon
  • Patent number: 9489105
    Abstract: A display device includes: a display having a plurality of display regions on a body that are configured to display images; a touch sensor configured to sense a first touch input; and a controller configured to control the images displayed on the plurality of display regions in response to the first touch input sensed by the touch sensor, wherein the controller is further configured to control the display to display at least one piece of content at at least one of the plurality of display regions, and to move the at least one piece of content to a first display region from among the plurality of display regions and to display the moved content at the first display region in response to the first touch input when the touch sensor senses the first touch input generated at the first display region.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: November 8, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae Hyun Park, Jun Hyuk Cheon