Patents by Inventor Jun-Hyuk Cheon

Jun-Hyuk Cheon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070134856
    Abstract: Disclosed herein is a method for fabricating a reverse-staggered polycrystalline silicon thin film transistor, and more specifically a method for fabricating a reverse-staggered polycrystalline silicon thin film transistor wherein a phosphosilicate-spin-on-glass (P-SOG) is used for a gate insulating film. The method comprises the steps of: forming a buffer layer on an insulating substrate; forming a gate metal pattern on the buffer layer; forming a planarized gate insulating film on the gate metal pattern; depositing an amorphous silicon layer on the gate insulating film; crystallizing the amorphous silicon layer into a polycrystalline silicon layer; forming a n+ or p+ layer on the polycrystalline silicon layer; forming a source/drain metal layer on the n+ or p+ layer; and forming a passivation layer on the source/drain metal layer.
    Type: Application
    Filed: December 12, 2006
    Publication date: June 14, 2007
    Inventors: Jin JANG, Jun-Hyuk CHEON