Patents by Inventor Jun-ichi Nishizawa
Jun-ichi Nishizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7912553Abstract: An electromagnetic wave irradiation tool encompasses a narrow tube (endoscope probe) (7) defined by an outside diameter of 0.1 mm-20 mm, having an electromagnetic wave irradiation terminal (3) configured to irradiate an electromagnetic wave (2) having a frequency equal to a characteristic frequency of a microorganism (11) at the top of the narrow tube (7) and an electromagnetic wave generation unit (3) configured to generate the electromagnetic wave (2) and to supply the electromagnetic wave (2) to the electromagnetic wave irradiation terminal (3). The electromagnetic wave irradiation tool drives the microorganism (11) into a resonant vibration state selectively so that the microorganism (11) can be destroyed, without giving damages to biological body (1) for medically treating the disease induced by the microorganism (11).Type: GrantFiled: November 27, 2003Date of Patent: March 22, 2011Inventor: Jun-ichi Nishizawa
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Patent number: 7599409Abstract: An electromagnetic wave generator encompasses a first pump beam emitter (2) configured to emit a first pump beam (hv1) having a wavelength larger than one micrometer; a second pump beam emitter (25) configured to emit a wavelength-tunable second pump beam (hv2) having a wavelength larger than one micrometer, the wavelength of which is different from the wavelength of the first pump beam (hv1); a nonlinear optical crystal (19) configured to generate an electromagnetic wave (hv3) of a difference frequency between the first pump beam (hv1) and second pump beam (hv2); and an optical system (M1, M2, 18) configured to irradiate the first pump beam (hv1) and second pump beam (hv2) to the nonlinear optical crystal (19), by adjusting an external intersection angle between the first pump beam (hv1) and second pump beam (hv2) within 0.5° at the difference frequency of 1 THz.Type: GrantFiled: October 29, 2004Date of Patent: October 6, 2009Assignees: Tohoku UniversityInventors: Jun-ichi Nishizawa, Ken Suto, Tetsuo Sasaki, Tadao Tanabe, Tomoyuki Kimura
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Publication number: 20070160093Abstract: An electromagnetic wave generator encompasses a first pump beam emitter (2) configured to emit a first pump beam (hv1) having a wavelength larger than one micrometer; a second pump beam emitter (25) configured to emit a wavelength-tunable second pump beam (hv2) having a wavelength larger than one micrometer, the wavelength of which is different from the wavelength of the first pump beam (hv1); a nonlinear optical crystal (19) configured to generate an electromagnetic wave (hv3) of a difference frequency between the first pump beam (hv1) and second pump beam (hv2); and an optical system (M1, M2, 18) configured to irradiate the first pump beam (hv1) and second pump beam (hv2) to the nonlinear optical crystal (19), by adjusting an external intersection angle between the first pump beam (hv1) and second pump beam (hv2) within 0.5° at the difference frequency of 1 THz.Type: ApplicationFiled: October 29, 2004Publication date: July 12, 2007Applicant: Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Ken Suto, Tetsuo Sasaki, Tadao Tanabe, Tomoyuki Kimura
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Publication number: 20060113298Abstract: An electromagnetic wave irradiation tool encompasses a narrow tube (endoscope probe) (7) defined by an outside diameter of 0.1 mm-20 mm, having an electromagnetic wave irradiation terminal (3) configured to irradiate an electromagnetic wave (2) having a frequency equal to a characteristic frequency of a microorganism (11) at the top of the narrow tube (7) and an electromagnetic wave generation unit (3) configured to generate the electromagnetic wave (2) and to supply the electromagnetic wave (2) to the electromagnetic wave irradiation terminal (3). The electromagnetic wave irradiation tool drives the microorganism (11) into a resonant vibration state selectively so that the microorganism (11) can be destroyed, without giving damages to biological body (1) for medically treating the disease induced by the microorganism (11).Type: ApplicationFiled: November 27, 2003Publication date: June 1, 2006Applicant: ZAIDAN HOJIN HANDOTAI KENKYU SHINKOKAIInventor: Jun-ichi Nishizawa
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Publication number: 20060054940Abstract: The ultra high-speed vertical short channel insulated-gate static induction transistor with uniform operating characteristic which has the drain layer 3 consisting of an epitaxial single crystal layer on the main surface 2 of substrate 1, the channel layer 4 with thickness 1000 ? or less on the drain layer, the source layer 5 consisting of an epitaxial single crystal layer on the channel layer 4, and the insulated-gates 6 and 7 on the sidewalls of the drain, the channel, and the source layers. Since the thickness of 1000 ? or less is accurately controlled using the molecular layer epitaxial method and the channel layer 4 is grown up, the X-ray photolithography is not needed. Since the gate oxide film is formed by low temperature CVD using active oxygen, impurity re-distribution does not occur.Type: ApplicationFiled: September 9, 2005Publication date: March 16, 2006Applicants: Incorporated Administrative Agency, Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Toru Kurabayashi, Toru Oizumi, Kyouzou Kanamoto, Jun-ichi Nishizawa
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Patent number: 6977406Abstract: The ultra high-speed vertical short channel insulated-gate static induction transistor with uniform operating characteristic which has the drain layer 3 consisting of an epitaxial single crystal layer on the main surface 2 of substrate 1, the channel layer 4 with thickness 1000 ? or less on the drain layer, the source layer 5 consisting of an epitaxial single crystal layer on the channel layer 4, and the insulated-gates 6 and 7 on the sidewalls of the drain, the channel, and the source layers. Since the thickness of 1000 ? or less is accurately controlled using the molecular layer epitaxial method and the channel layer 4 is grown up, the X-ray photolithography is not needed. Since the gate oxide film is formed by low temperature CVD using active oxygen, impurity re-distribution does not occur.Type: GrantFiled: April 26, 2002Date of Patent: December 20, 2005Assignees: National Institute of Information and Communications Technology, Incorporated Administrative Agency, Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Toru Kurabayashi, Toru Oizumi, Kyouzou Kanamoto, Jun-ichi Nishizawa
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Publication number: 20040178442Abstract: The ultra high-speed vertical short channel insulated-gate static induction transistor with uniform operating characteristic which has the drain layer 3 consisting of an epitaxial single crystal layer on the main surface 2 of substrate 1, the channel layer 4 with thickness 1000 Å or less on the drain layer, the source layer 5 consisting of an epitaxial single crystal layer on the channel layer 4, and the insulated-gates 6 and 7 on the sidewalls of the drain, the channel, and the source layers. Since the thickness of 1000 Å or less is accurately controlled using the molecular layer epitaxial method and the channel layer 4 is grown up, the X-ray photolithography is not needed. Since the gate oxide film is formed by low temperature CVD using active oxygen, impurity re-distribution does not occur.Type: ApplicationFiled: October 24, 2003Publication date: September 16, 2004Inventors: Toru Kurabayashi, Toru Oizumi, Kyouzou Kanamoto, Jun-ichi Nishizawa
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Patent number: 5883406Abstract: A multiplicity of field effect type semiconductor memory elements are formed perpendicular to a surface of a semiconductor wafer. Charge carriers are transported in the semiconductor bulk perpendicular to the surface and a potential barrier is formed in the current path to accomplish storing. Since the bulk mobility of a semiconductor is far larger than the surface mobility, the transit time of the carriers is much improved. Furthermore, since each structure of the memory cells is formed perpendicular to the semiconductor surface, the surface occupation area per memory cell is reduced. Thus, a high-speed and high-density semiconductor memory device is provided.Type: GrantFiled: February 24, 1992Date of Patent: March 16, 1999Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 5808328Abstract: A multiplicity of field effect type semiconductor memory elements are formed perpendicular to a surface of a semiconductor wafer. Charge carriers are transported in the semiconductor bulk perpendicular to the surface and a potential barrier is formed in the current path to accomplish storing. Since the bulk mobility of a semiconductor is far larger than the surface mobility, the transit time of the carriers is much improved. Furthermore, since each structure of the memory cells is formed perpendicular to the semiconductor surface, the surface occupation area per memory cell is reduced. Thus, a high-speed and high-density semiconductor memory device is provided.Type: GrantFiled: June 5, 1995Date of Patent: September 15, 1998Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 5585654Abstract: A field effect transistor has the property that the product of its series resistance and its true transconductance is less than one throughout the entire range of drain voltage in the operative state of the transistor, the series resistance being the sum of the resistance from source to channel and the resistance of this channel. In order to prevent an excessive increase in the active resistance of the channel, the channel is made to have an impurity concentration as low as less than 10.sup.15 atoms/cm.sup.3, preferably less than 10.sup.14 atoms/cm.sup.3, so that the depletion layers extending from the gates grow extensively to become contiguous in response to a small increase in the reverse gate voltage applied. As a result, the field effect transistor of this invention has an unsaturated drain current versus drain voltage characteristic.Type: GrantFiled: October 24, 1991Date of Patent: December 17, 1996Assignee: Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 5557119Abstract: A field effect transistor has the property that the product of its active total series resistance and its true transconductance is less than one throughout the entire range of drain voltage in the operative state of this transistor, the active total series resistance being the sum of the active resistance from source to channel, the active resistance of this channel and the active resistance from channel to drain. In order to prevent an excessive increase in the active resistance of the channel, the channel is made to have an impurity concentration as low as less than 10.sup.15 atoms/cm.sup.3, preferably less than 10.sup.14 atoms/cm.sup.3, so that the depletion layers extending from the gates grow extensively to become contiguous in such fashion in response to a small increase in the reverse gate voltage applied, that no narrow lengthy path is formed between the depletion layers. As a result, the field effect transistor of this invention has an unsaturated drain current versus drain voltage characteristic.Type: GrantFiled: May 24, 1995Date of Patent: September 17, 1996Assignee: Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 5552623Abstract: A semiconductor device having a source region, a drain region and a channel region which are formed in a surface portion of a semiconductor substrate, and a gate formed with a material having a relatively high built-in voltage relative to the source region. This semiconductor device may further include, in the semiconductor substrate to extend along the channel region, a highly-doped region having a conductivity type opposite to that of the source region. This highly-closed region may have an impurity concentration gradient which is greater toward its portion facing the abovesaid surface of the substrate. These arrangements serve to prevent extinction of memory due to current leakage during absence of bias voltage which otherwise would develop in semiconductor devices having short-channel and thin gate oxide layer, and due to irradiation of alpha-particle onto the device.Type: GrantFiled: October 12, 1993Date of Patent: September 3, 1996Assignee: Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Tadahiro Ohmi
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Patent number: 5532511Abstract: A semiconductor device includes a substrate crystal of a type for epitaxial growth thereon. The substrate crystal has a (111)A face and a (111)B face. Also provided are at least two semiconductor regions of different conductivity types deposited by way of epitaxial growth on the (111)A face of the substrate crystal according to metal organic chemical vapor deposition, thereby providing a structure having a source and a drain. A gate side includes the (111)B face of the substrate crystal. A gate insulating layer is deposited by way of epitaxial growth on the gate side according to molecular layer epitaxy. Alternatively, the at least two semiconductor regions may be deposited on the (111)B face of the substrate crystal according to molecular layer epitaxy, and the gate insulating layer may be deposited on the (111)A face of the substrate crystal according to metal organic chemical vapor deposition.Type: GrantFiled: March 23, 1995Date of Patent: July 2, 1996Assignees: Research Development Corp. of Japan, Jun-ichi Nishzawa, Zaidan Hojin Handotai Kenkyu ShinokaiInventors: Jun-ichi Nishizawa, Toru Kurabayashi
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Patent number: 5525156Abstract: An apparatus for epitaxially growing a chemical-compound crystal, a plurality of raw-material gases are alternately introduced into a closed chamber of a crystal growing device to grow the crystal placed within the closed chamber. At growing of the crystal, a light from a light source is emitted to a crystal growing film of the crystal. Intensity of a light reflected from the crystal growing film and received by a photo detector is measured. Charge amounts of the respective raw-material gases are controlled by a control system on the basis of a change in the reflected-light intensity, thereby controlling a growing rate of the growing film.Type: GrantFiled: March 10, 1995Date of Patent: June 11, 1996Assignees: Research Development Corporation, Nobuaki Manada, Junji Ito, Toru Kurabayashi, Jun-Ichi NichizawaInventors: Nobuaki Manada, Junji Ito, Toru Kurabayashi, Jun-Ichi Nishizawa
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Patent number: 5500079Abstract: A semiconductor material to be etched is held in a reaction chamber at a predetermined temperature. A reactive etching gas such as a chlorine gas is introduced into the reaction chamber for a first period of time. Thereafter, the reaction chamber is evacuated for a second period of time, and ultraviolet radiation is applied to the semiconductor material for a third period of time within the second period of time for thereby etching the semiconductor material to a depth on the order of a molecular or atomic layer.Type: GrantFiled: May 3, 1994Date of Patent: March 19, 1996Assignee: Research Development Corporation of JapanInventors: Jun-ichi Nishizawa, Kenji Yamamoto
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Patent number: 5485017Abstract: A semiconductor device has an n.sup.+ source region, a first n.sup.- channel region, a barrier layer, a second n.sup.- channel region, a pair of n.sup.+ drain regions, an insulating film, and a pair of metal electrodes over the respective n.sup.+ drain regions, all successively disposed on an upper surface of an n.sup.+ crystal substrate. The drain regions and the metal electrodes jointly provide a storage electric capacitance. A source electrode is disposed on the lower surface of the n.sup.+ crystal substrate. Bit information can be written and read at a high speed by tunneling through the barrier layer. According to a method of manufacturing the above semiconductor device, the n.sup.+ source region, the first n.sup.- channel region, the barrier layer, the second n.sup.- channel region, the n.sup.+ drain regions, the insulating film, and the metal electrodes are successively deposited on the n.sup.+ crystal substrate in a growing apparatus.Type: GrantFiled: May 11, 1994Date of Patent: January 16, 1996Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 5475242Abstract: A notched insulation gate static induction transistor integrated circuit ording to the present invention comprises an enhancement mode CMOS logic circuit including a notched insulation gate static induction transistor in which a threshold voltage is determined to prevent current from flowing in a standby mode, and a depletion enhancement mode CMOS logic circuit including a notched insulation gate static induction transistor in which a threshold voltage is determined to cause current to slightly flow in the standby mode. The enhancement mode CMOS logic circuit and the depletion enhancement mode CMOS logic circuit are formed on a major surface of a substrate, and the depletion enhancement mode CMOS logic circuit is used in a circuit in which an average power consumption in a switching operation is higher than that in the standby mode.Type: GrantFiled: April 17, 1995Date of Patent: December 12, 1995Assignee: Small Power Communication Systems Research Laboratories Co., Ltd.Inventors: Jun-ichi Nishizawa, Nobuo Takeda, Toshiyuki Kishine
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Patent number: 5463977Abstract: In a method of and an apparatus for epitaxially growing a chemical-compound crystal, a plurality of raw-material gasses are alternately introduced into a closed chamber of a crystal growing device to grow the crystal placed within the closed chamber. At growing of the crystal, a light from a light source is emitted to a crystal growing film of the crystal. Intensity of a light reflected from the crystal growing film and received by a photo detector is measured. Charge amounts of the respective raw-material gasses are controlled by a control system on the basis of a change in the reflected-light intensity, thereby controlling a growing rate of the growing film.Type: GrantFiled: July 15, 1993Date of Patent: November 7, 1995Assignees: Research Development Corporation, Nobuaki Manada, Toru Kurabayashi, Jun-Ichi NishizawaInventors: Nobuaki Manada, Junji Ito, Toru Kurabayashi, Jun-ichi Nishizawa
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Patent number: 5426314Abstract: A static induction thyristor has a first semiconductor area having a high impurity concentration of a first conductivity type. A second semiconductor area having low impurity concentration is formed adjacent to the first semiconductor area. A third semiconductor area having a high impurity concentration of a second conductivity type which is the conductivity type opposite to the first conductivity type is formed on a part of a surface of the second semiconductor area so located as to form a fourth semiconductor area located within the third semiconductor area. A fifth semiconductor area having a high impurity concentration of the first conductivity type is formed on the part of the surface of the second semiconductor area in spaced relation to the forth semiconductor area.Type: GrantFiled: April 21, 1994Date of Patent: June 20, 1995Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Sohbe Suzuki
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Patent number: 5384476Abstract: A semiconductor device having a source region, a drain region and a channel region which are formed in a surface portion of a semiconductor substrate, and a gate formed with a material having a relatively high built-in voltage relative to the source region. This semiconductor device may further include, in the semiconductor substrate to extend along the channel region, a highly-doped region having a conductivity type opposite to that of the source region. This highly-closed region may have an impurity concentration gradient which is greater toward its portion facing the abovesaid surface of the substrate. These arrangements serve to prevent extinction of memory due to current leakage during absence of bias voltage which otherwise would develop in semiconductor devices having short-channel and thin gate oxide layer, and due to irradiation of alpha-particle onto the device.Type: GrantFiled: June 9, 1987Date of Patent: January 24, 1995Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Tadahiro Ohmi