Patents by Inventor Jun-ichi Nishizawa
Jun-ichi Nishizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5357361Abstract: A discriminating light-emitting apparatus comprises a transmitting unit capable of optionally setting a coded optical signal or a signal having a specific wavelength, and a receiving unit responsive only to the optionally coded optical signal or the signal having the specific wavelength issued from the transmitting unit, to execute display. Display on the receiving unit is executed in such a manner that one or a plurality of light emitting section or sections is or are turned on and off.Type: GrantFiled: June 10, 1992Date of Patent: October 18, 1994Inventor: Jun-ichi Nishizawa
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Patent number: 5338389Abstract: In a method of epitaxially growing a compound crystal, a plurality of crystal component gasses of a compound and reaction gas chemically reacting with the crystal component gasses are individually directed, in the predetermined order, onto a substrate crystal heated under vacuum. The crystal compound gasses and the reaction gas may be overlapped with each other. In a doping method in the above-described epitaxial growth method, the crystal component gasses and the compound gas of dopant are directed onto the substrate crystal and, subsequently, reaction gas, which chemically reacts with the compound gasses, is directed onto the substrate crystal. Also in this case, the reaction gas may be in overlapped relation to the component gas of dopant.Type: GrantFiled: April 21, 1993Date of Patent: August 16, 1994Assignee: Research Development Corporation of JapanInventors: Jun-ichi Nishizawa, Toru Kurabayashi
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Patent number: 5323029Abstract: A static induction device (SI device) at least shares a structure in which an SI thyristor, an IGT and a capacitor are merged onto the single monolithic chip. The SI thyristor has a cathode, an anode and a gate regions, and a channel. The IGT has a well on a surface of the channel, a source and drain regions within the well, a gate insulating film on the well, and a gate electrode on the gate insulating film. The capacitor comprises the gate region of the SI thyristor, the gate insulating film on the gate region, and the gate electrode. The cathode and the drain region are connected to each other through a high-conductive electrode.Type: GrantFiled: March 2, 1993Date of Patent: June 21, 1994Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 5323028Abstract: In a MOS controlled power device, or MOS composite a static induction thyristor, an static induction thyristor (SI thyristor) unit, a MOS transistor connected in cascode relation to the SI thyristor unit and a voltage regulation element are merged onto the single monolithic chip. The SI thyristor unit has a cathode region of first conductivity type having high impurity concentration, an anode and a gate regions of second conductivity type having high impurity concentration, and a channel region of first conductivity type having low impurity concentration. The MOS transistor has a drain region which is the same region as the cathode region, a well or a base of second conductivity type formed adjacent to the channel region of the SI thyristor unit, and a source region of first conductivity type having high impurity concentration. The source region is formed within the well or above the base.Type: GrantFiled: September 21, 1992Date of Patent: June 21, 1994Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Sohbe Suzuki
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Patent number: 5296403Abstract: A semiconductor device comprises a vertical MIS-SIT which has a smaller source-to-drain distance for operation at ultra-high speed. The semiconductor device has a substrate crystal for epitaxial growth thereon, least two semiconductor regions of different conductivity types deposited by way of epitaxial growth on the substrate crystal according to either metal organic chemical vapor deposition (MO-CVD) or molecular layer epitaxy (MLE), thereby providing a source-drain structure, a gate side formed by etching the semiconductor regions of the source-drain structure, the gate side comprising either a (111)A face or a (111)B face, and a semiconductor region deposited as a gate by way of epitaxial growth on the gate side according to either MO-CVD or MLE.Type: GrantFiled: October 23, 1992Date of Patent: March 22, 1994Assignees: Research Development Corp. of Japan, Jun-ichi Nishizawa, Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Toru Kurabayashi
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Patent number: 5254207Abstract: Material and impurity gases are introduced into a crystal growth chamber to grow a crystal film on a GaAs substrate. A light beam emitted from a variable-wavelength light source is applied to the crystal film being grown on the substrate while varying the wavelength of the light beam. The dependency, on the wavelength of the light beam, of the intensity of light reflected by the crystal film is measured, and an optimum wavelength is selected for measurement depending on the type of molecules adsorbed while the crystal film is being grown. Light is then applied at the optimum wavelength to the crystal film being grown, and a time-dependent change in the intensity of light reflected by the crystal film is measured. The rate at which the material gases are introduced into the crystal growth chamber is adjusted to control the growth rate of the crystal film, the composition ratio of a mixed crystal thereof, and the density of the impurity therein.Type: GrantFiled: November 30, 1992Date of Patent: October 19, 1993Assignees: Research Development Corporation of Japan, Jun-ichi Nishizawa, Zaidan Hojin, Handotai Kenkyu ShinkokaInventors: Jun-ichi Nishizawa, Toru Kurabayashi
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Patent number: 5240685Abstract: In an apparatus for growing a GaAs single crystal from its melt, As vapor which is controlled appropriately of its pressure is applied from an As chamber to the surface of the GaAs melt in a vessel throughout the growing process through an As passage communicating between the melt vessel and the As chamber, while establishing a gentle temperature gradient in the passage leading from the GaAs melt vessel to the As chamber. Whereby, a GaAs single crystal having a large diameter and a good crystal perfection with minimized deviation from stoichiometry and minimized lattice dislocation can be obtained.Type: GrantFiled: April 27, 1992Date of Patent: August 31, 1993Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 5227647Abstract: A semiconductor thyristor of the Static Induction type having a split-gate structure, e.g., driving gates and non-driving gates, for controlling cathode-anode current flow. The split-gate structure comprises a plurality of primary driving gates formed in recesses of the channel region which respond to an external control signal for providing primary current control, and a plurality of secondary non-driving gates which are influenced by electric fields in the channel region extant during thyristor operation for providing secondary current control. In operation, the driving and non-driving gates coact so that the non-driving gates, having an induced potential lower than the potential applied to the driving gates, absorb charge carriers injected in the channel during thyristor operation.Type: GrantFiled: January 11, 1991Date of Patent: July 13, 1993Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Tadahiro Ohmi
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Patent number: 5175598Abstract: A semiconductor thyristor of the Static Induction type having a split-gate structure, e.g., driving gates and non-driving gates, for controlling cathode-anode current flow. The split-gate structure comprises a plurality of primary driving gates formed in recesses of the channel region which respond to an external control signal for providing primary current control, and a plurality of secondary non-driving gates which are influenced by electric fields in the channel region extant during thyristor operation for providing secondary current control. In operation, the driving and non-driving gates coact so that the non-driving gates, having an induced potential lower than the potential applied to the driving gates, absorb charge carriers injected in the channel during thyristor operation.Type: GrantFiled: January 11, 1991Date of Patent: December 29, 1992Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Tadahiro Ohmi
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Patent number: 5169795Abstract: This invention provides a step cut type insulated gate static induction tsistor having a first main electrode formed in one major surface of a semiconductor substrate, a second main electrode formed in a bottom portion of a U-shaped groove formed in one major surface of a semiconductor substrate, a control electrode formed on a side wall of the U-shaped groove and consisting of a thin insulating film and a polysilicon layer, and a low-resistance electrode of a refractory metal layer or a refractory metal silicide layer formed in at least part of the side wall of the polysilicon layer of the control electrode.Type: GrantFiled: August 20, 1991Date of Patent: December 8, 1992Assignee: Small Power Communication Systems Research Laboratories Co., Ltd.Inventors: Jun-ichi Nishizawa, Nobuo Takeda
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Patent number: 5065206Abstract: A semiconductor device comprises a semiconductive substrate of a low impurity concentration, a channel area of a low impurity concentration formed on the substrate, a source area formed on the channel area and having a high impurity concentration of a conductive type opposite to that of the substrate, a drain area formed on the channel area and having a high impurity concentration of a conductive type opposite to that of the substrate, and an accumulating gate area formed on the channel area and having a conductive type same as that of the substrate. The source area and drain area are arranged in a predetermined direction along the substrate. The accumulating gate area comprises a first part sandwiched between the source area and the drain area and extended in a direction crossing the predetermined direction and second and third parts connected with the first part and approximately extended in the predetermined direction.Type: GrantFiled: January 25, 1989Date of Patent: November 12, 1991Assignees: Nikon Corporation, Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-Ichi Nishizawa, Takashige Tamamushi, Hideo Maeda
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Patent number: 5060029Abstract: This invention provides a step cut type insulated gate static induction tsistor having a first main electrode formed in one major surface of a semiconductor substrate, a second main electrode formed in a bottom portion of a U-shaped groove formed in one major surface of a semiconductor substrate, a control electrode formed on a side wall of the U-shaped groove and consisting of a thin insulating film and a polysilicon layer, and a low-resistance electrode of a refractory metal layer or a refractory metal silicide layer formed in at least part of the side wall of the polysilicon layer of the control electrode.Type: GrantFiled: February 23, 1990Date of Patent: October 22, 1991Assignee: Small Power Communication Systems Research Laboratories Co., Ltd.Inventors: Jun-ichi Nishizawa, Nobuo Takeda
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Patent number: 5038188Abstract: An insulated-gate type transistor having a semiconductor body of a low impurity concentration, a heavily-doped source region of a conductivity type opposite to that of the semiconductor body for supplying charge carriers, a heavily-doped region for receiving the carriers supplied form the source region, both of which regions may be provided separately in a main surface of the body, a channel region located between the source and drain regions for the travel of these carriers, an insulated-gate structure inputted with a gate voltage for controlling the travel of those carriers, a semiconductor region formed in the neighborhood of the source region within the body and having a portion located below the source region and another portion extending beyond therefrom toward the drain region and serving to define the channel region and to increase the ratio of the amount of carriers reaching the drain region to the total amount of the carriers supplied from the source region.Type: GrantFiled: March 12, 1990Date of Patent: August 6, 1991Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Tadahiro Ohmi
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Patent number: 5027180Abstract: A double gate static induction thyristor comprises a semiconductor substrate, a first gate region formed at a first principal surface of the substrate, and a first semiconductor region of a first conduction type formed on the same first principal surface. A second gate region is formed at a second principal surface of the substrate, and a second semiconductor region of a second conduction type is formed on the same second principal surface. Gate electrodes are formed on the first and second gate regions, and main electrodes are formed on the first and second semiconductor regions, so that portions of the semiconductor regions surrounded by the gate regions form a current path between the main electrodes. Further, impurity is deeply diffused in portions of the first and second gate regions formed with the gate electrodes.Type: GrantFiled: October 18, 1989Date of Patent: June 25, 1991Assignee: Mitsubishi Electric CorporationInventors: Jun-ichi Nishizawa, Hisao Kondoh
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Patent number: 5021936Abstract: This invention relates to a PWM power converter for switching a plurality of bridge-connected semiconductor switching elements based on PWM signals. As the semiconductor switching elements, elements with a low ON voltage and small conduction loss, and elements with a small switching loss and capable of high-speed switching are combined to improve power conversion efficiency.Type: GrantFiled: June 28, 1990Date of Patent: June 4, 1991Assignees: Zaidan Hojin Handotai Kenkyu Sinkokai, Tohoku Electric Power Company, Incorporated, Tsuken Electric Ind. Co., Ltd.Inventors: Jun-ichi Nishizawa, Takashige Tamamushi, Koichi Mitamura, Hiroo Takahashi, Kiyoo Mitsui, Mitsuo Ikehara, Toyota Wako, Sinpei Maruyama
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Patent number: 5019876Abstract: A high sensitivity semiconductor photo-electric converter is provided by electrically isolating the gate region of a static induction transistor which exhibits non-saturating current versus voltage characteristic. Optically ionized minority carriers are stored in the gate region to control the potential thereof. A semiconductor gate region provided with a insulated gate is very effective to enhance the dynamic range of the converter. Non-saturating characteristic enables enlargement of the output current simply by increasing the drain voltage. A high-speed and high sensitivity image pick-up device can be materialized by integrating a multiplicity of the static induction type photo-electric converter elements. A switching transistor may be merged in the gate region of each photo-electric converter element to enhance the operation speed of the image pick-up device.Type: GrantFiled: April 4, 1989Date of Patent: May 28, 1991Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 5017991Abstract: A thyristor device comprising an SI (Static induction) thyristor or beam base thyristor and an SIT (static induction transistor) or SIT-mode bipolar transistor connected to the gate of the thyristor in order to make it possible to turn-on and-off a direct current and voltage at a high speed with a light. In the thyristor part, the SIT gate structure or SIT-mode beam base structure exists in the first gate or base region or second gate or base region so that, at the time of the triggering operation, a very high switching efficiency will be obtained.Type: GrantFiled: October 14, 1988Date of Patent: May 21, 1991Assignee: Jun-Ichi NishizawaInventors: Jun-ichi Nishizawa, Takashige Tamamushi, Ken-ichi Nonaka
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Patent number: 5001535Abstract: In a static induction type thyristor comprising a low impurity concentration channel region having opposed first and second major surfaces, a first main electrode region having one conductivity type and a second main electrode region having another conductivity type opposite to the one conductivity type and provided on the first and second major surfaces, respectively, and a gate region provided in the vicinity of the first main electrode region, there intervenes, between the channel region and the second main electrode region, a thin layer region having the same conductivity type as that of first main electrode region. The provision of this thin layer region contributes to allowing a markedly low impurity concentration as well as a decreased thickness of the channel region for a given maximum forward blocking voltage, making it feasible to obtain a high maximum forward blocking voltage and a high switching speed.Type: GrantFiled: July 25, 1988Date of Patent: March 19, 1991Inventors: Jun-ichi Nishizawa, Tadahiro Ohmi
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Patent number: 4994872Abstract: An insulated-gate static induction transistor is formed by establishing a potential barrier in a semiconductor region of one conductivity type between the source and the drain regions of the other conductivity type. The height of the potential barrier should be sensitive to the drain voltage as well as to the gate voltage. Therefore, the semiconductor region should have a low impurity concentration and short length. The potential barrier can be established by varying the field effect of the gate voltage in the semiconductor region and/or by the built-in potential between the source region and the semiconductor region.Type: GrantFiled: July 29, 1988Date of Patent: February 19, 1991Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Tadahiro Ohmi
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Patent number: 4994999Abstract: A multiplicity of field effect type semiconductor memory elements are formed perpendicular to a surface of a semiconductor wafer. Charge carriers are transported in the semiconductor bulk perpendicular to the surface and a potential barrier is formed in the current path to accomplish storing. Since the bulk mobility of a semiconductor is far larger than the surface mobility, the transit time of the carriers is much improved. Furthermore, since each structure of the memory cells is formed perpendicular to the semiconductor surface, the surface occupation area per memory cell is reduced. Thus, a high-speed and high-density semiconductor memory device is provided.Type: GrantFiled: August 17, 1987Date of Patent: February 19, 1991Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa