Patents by Inventor Jun-ichi Nishizawa
Jun-ichi Nishizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 4414558Abstract: The emission efficiency of a hetero-junction light-emitting diode is improved by raising the carrier concentration in the radiative region, and by increasing the thickness of the radiative region. On p.sup.+ type GaAs substrate, a p type Ga.sub.1-x Al.sub.x As (0.30<.times.<0.37) layer and an n type Ga.sub.1-y Al.sub.y As (0.40<y<0.70) layer are grown. The emission efficiency are optimized when4.5.times.10.sup.17 cm.sup.-3 <p<2.5.times.10.sup.18 cm.sup.-32.times.10.sup.17 cm.sup.-3 <n<1.times.10.sup.18 cm.sup.-3and the thickness of the p type layer is at least about 5 .mu.m.Type: GrantFiled: February 9, 1981Date of Patent: November 8, 1983Assignees: Zaidan Hojin Handotai Kenkyu Shinkokai, Stanley Electric Co., Ltd.Inventors: Jun-ichi Nishizawa, Toru Teshima
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Patent number: 4408304Abstract: A semiconductor memory is provided with a hook structure composed of first to fourth regions and is capable of non-destructive readout. The third and fourth regions of the hook structure are both made floating and each form one of main electrode regions of each of a write and/or refresh transistor and a readout transistor. Carriers which are injected from the other main electrode region of the write transistor are stored as excess majority carriers in the third region and majority carriers of the fourth region flow out therefrom into the first region via the third and second regions, in consequence of which the fourth region lacks in the majority carrier and voltages of the floating third and fourth regions vary. The voltage variation of the fourth region is read out by the readout transistor. The excess majority carriers stored in the third region flow out therefrom into the other main electrode region of the write transistor and become extinct when it operates as a refresh transistor.Type: GrantFiled: May 4, 1981Date of Patent: October 4, 1983Assignee: Semiconductor Research FoundationInventors: Jun-ichi Nishizawa, Ohmi Tadahiro, Takashige Tamamushi
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Patent number: 4404575Abstract: A semiconductor device which, due to a feedback current flowing through a resistance present between the gate region and a primary current path channel region, exhibits a very steeply rising drain current versus voltage characteristic and has a very small resistance during conduction.Type: GrantFiled: May 3, 1982Date of Patent: September 13, 1983Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 4400710Abstract: A semiconductor device having its carrier-injecting region formed with a Schottky structure, and arranged so that the current flowing through the Schottky barrier by virtue of tunnel effect is controlled by a controlling electrode to thereby control the drain or collector or anode current. Thus, this device has a large current density and a large current gain. This device can be used not only as a discrete one, but also it is quite suitable when applied to integrated circuits.Type: GrantFiled: November 25, 1980Date of Patent: August 23, 1983Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Tadahiro Ohmi, Keishiro Takahashi
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Patent number: 4389256Abstract: A method of manufacturing a pn junction in a substantially n-type ZnSe compound semiconductor crystal grown by relying on a liquid growth method using temperature difference technique, by diffusing therein gold which is a p-type impurity or by forming therein a gold alloy in an inert gas atmosphere. This impurity has such a high diffusion velocity as can suppress the vaporization, from ZnSe crystal, of Se atoms having a vaporization speed lower than the diffusion speed of gold, and thus desired pn junction can be formed.Type: GrantFiled: June 5, 1981Date of Patent: June 21, 1983Assignee: Jun-ichi NishizawaInventors: Jun-ichi Nishizawa, Kazuomi Ito
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Patent number: 4377817Abstract: This invention relates to a semiconductor image sensors and more particularly, to a back-illuminated-type static induction transistor image sensors.FIGS. 4A to 4C show the back illuminated type SIT image sensors operating in the electron depletion storing mode, where the n.sup.+ buried floating region 23 serves as storage region.Type: GrantFiled: March 17, 1980Date of Patent: March 22, 1983Assignee: Semiconductor Research FoundationInventors: Jun-ichi Nishizawa, Tadahiro Ohmi
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Patent number: 4364072Abstract: In a static induction type semiconductor device comprising a semiconductor region having one conductivity type and a low impurity concentration and gate regions having an opposite conductivity type and a high impurity concentration formed in the semiconductor region to thereby define a channel region between these gate regions, there is provided a subsidiary semiconductor region having the one conductivity type and a relatively high impurity concentration either around each gate region to leave an effective channel region in the semiconductor region, or adjacent to the effective channel region in the entire channel region on the drain side. By so constructing the device, this effective channel region has a relatively low potential difference even when the channel region is completely depleted, and provides a relatively wide current path.Type: GrantFiled: March 8, 1979Date of Patent: December 14, 1982Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 4359012Abstract: An apparatus for producing a semiconductor device of epitaxial growth on a substrate utilizing successive solution growth, in which materials to be successively deposited are being dissolved in bore portions respectively interconnecting between holes of the higher temperature portion and holes of the lower temperature portion in a boat, and in which a cooling jig is coupled with the substrate provided at the hole of the lower temperature portion to effectively conduct substantially main part of heat of the dissolved materials through the substrate.Type: GrantFiled: May 22, 1980Date of Patent: November 16, 1982Assignee: Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 4354140Abstract: On a semiconductor substrate of one conductivity type are disposed successively an active semiconductor layer of said one conductivity type, another active semiconductor layer of the other conductivity type and of a low impurity concentration, and a barrier semiconductor layer of the other conductivity type and a high impurity concentration. This another active semiconductor layer constitutes a main radiative region and light emitting in this radiative region is extracted at the side of the barrier layer.The barrier layer is arranged to form a potential barrier of an appropriate height for those minority carriers in that another active semiconductor layer, and reflects the minority carriers back into the active semiconductor layer.Non-radiative recombination is thereby reduced, and radiative recombination is promoted. Thus, the light-emitting efficiency is improved.Type: GrantFiled: May 28, 1980Date of Patent: October 12, 1982Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 4347097Abstract: A method for performing successive mass production of identical semiconductor devices each having a multi-layer structure consisting of a plurality of epitaxial layers successively deposited on a substrate without requiring, for each deposition, any steps of cooling and re-heating a boat provided with a plurality of wells each containing a solution therein. An upper portion of each well is maintained at a predetermined temperature higher than that of a lower portion of the well which communicates with the upper portion so as to establish a constant temperature difference between the upper portion and the lower portion during the deposition of the epitaxial layers. A semiconductive solute material is soaked in the solution contained in the well to maintain the solution at a saturated concentration in the upper portion of the well and at a supersaturated concentration in the lower portion thereof.Type: GrantFiled: August 14, 1980Date of Patent: August 31, 1982Assignee: Handotai Kenkyu ShinkokouInventor: Jun-ichi Nishizawa
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Patent number: 4340827Abstract: A Schottky diode is connected between the collector and the base of a common-base bipolar transistor to form a by-pass of the output current. The output current of this composite three-terminal structure becomes rapidly low when the voltage across the transistor is reduced below a threshold value. This three-terminal structure can be formed in a simple integrated structure and is particularly suited for driving a unipolar transistor of high input impedance, e.g. for use as the injector of an integrated injection logic. The bipolar transistor may also be substituted by a field effect transistor to constitute a three-terminal structure of similar characteristics.Type: GrantFiled: May 15, 1979Date of Patent: July 20, 1982Assignees: Zaidan Hojin Handotai Kenkyu Shinkokai, Agency of Industrial Science and TechnologyInventors: Jun-ichi Nishizawa, Yutaka Hayashi
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Patent number: 4338618Abstract: A composite junction-gate static induction transistor comprising a main static induction transistor (SIT) having a source, a gate and a drain, and an auxiliary static induction transistor having an auxiliary source connected to the source of the main SIT, an auxiliary gate connected to the gate of same SIT and an auxiliary drain connected to the auxiliary gate. An input signal current is applied to the composite gate and charges it up to a certain level, and thereafter it may flow through the auxiliary static induction transistor. Therefore, minority carrier storage in the junction-gate static induction transistor can be greatly reduced.Type: GrantFiled: November 1, 1979Date of Patent: July 6, 1982Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 4337473Abstract: A field effect transistor has the property that the product of its series resistance and its true transconductance is less than one throughout the entire range of drain voltage in the operative state of the transistor, the series resistance being the sum of the resistance from source to channel and the resistance of this channel. In order to prevent an excessive increase in the active resistance of the channel, the channel is made to have an impurity concentration as low as less than 10.sup.15 atoms/cm.sup.3, preferably less than 10.sup.14 atoms/cm.sup.3, so that the depletion layers extending from the gates grow extensively to become contiguous in response to a small increase in the reverse gate voltage applied. As a result, the field effect transistor of this invention has an unsaturated drain current versus drain voltage characteristic.Type: GrantFiled: July 19, 1977Date of Patent: June 29, 1982Assignee: Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 4333989Abstract: A single crystal substrate for epitaxial growth thereon of a semiconductor layer. The substrate consisting essentially of sapphire (aluminum oxide) and at least one additive selected from a group consisting of oxides of gallium. A 87 mol percent content of gallium oxide is most preferred for a silicon layer. Similarly, an additive and its content should most preferably be selected depending on the semiconductor, which may be gallium phosphide, aluminium phosphide, or zinc sulphide.Type: GrantFiled: February 22, 1982Date of Patent: June 8, 1982Assignee: Semiconductor Research FoundationInventors: Jun-Ichi Nishizawa, Kitsuhiro Kimura
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Patent number: 4334235Abstract: In an insulated-gate type static induction transistor having a source region for supplying charge carriers, a channel region through which said carriers travel, an insulated electrode type gate structure to which is inputted a gate voltage for controlling the travel of those carriers. A sharp build-up and non-saturating current vs. voltage characteristic, a high transconductance, and a small inter-electrode capacitance for high-speed operation are achieved by either reducing the channel length, or by reducing the depth of the source region smaller than that of the drain region, or by forming adjacent to the source region a blocking region of high impurity concentration relative to the channel region, or by arranging the effective channel close to the insulated gate.Type: GrantFiled: March 14, 1979Date of Patent: June 8, 1982Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa
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Patent number: 4331737Abstract: The oxynitride film according to the present invention contains Ga and/or Al and has O/N ratio of at least 0.15. This film is obtained by relying on, for example, chemical vapor deposition technique. The O/N ratio in the film may be varied by, for example, varying the distance between the substrate and the substance-supply source, or by varying the proportion of an oxidizing gas contained in a carrier gas. This film is used either as a surface passivation film of III-V compound semiconductors such as GaAs, or as an insulating film for active surface portions of IG-FET, or as an optical anti-reflective film.Type: GrantFiled: December 11, 1980Date of Patent: May 25, 1982Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Ikuo Shiota
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Patent number: 4329625Abstract: A light-responsive light-emitting diode display comprises a light-emitting diode circuit including a series connection of light-emitting diodes and a light-responsive current-controlling circuit connected in series to said light-emitting diode circuit for supplying a current thereto in correspondence with the ambient brightness. A unipolar photo-transistor can provide a current above a predetermined minimum value and increasing with the intensity of incident lights and can absorb excess voltages when applied. Light-responsive current-control reduces the useless power dissipation, and all solid-state display provides a very long service life.Type: GrantFiled: July 17, 1979Date of Patent: May 11, 1982Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventors: Jun-ichi Nishizawa, Yasuo Okuno, Keishiro Takahashi
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Patent number: 4326209Abstract: A static induction transistor of the type wherein carriers are injected from a source to a drain across a potential barrier induced in a current channel and wherein the height of the potential barrier can be varied in response to a gate bias voltage applied to a gate and to a drain bias voltage applied to the drain to thereby control the magnitude of a drain current of the transistor. The product of the channel resistance R.sub.c and the true transconductance G.sub.m of the transistor is maintained less than one and the product of the true transconductance and the series resistance R.sub.s of the transistor is maintained greater than or equal to one in the low drain current region in the operative state of the transistor. The series resistance R.sub.s is the sum of a resistance of the source, a resistance from the source to the current channel, and the channel resistance from the entrance of the current channel to the position of maximum value (extrema point) of the potential barrier in the current channel.Type: GrantFiled: October 19, 1979Date of Patent: April 20, 1982Assignee: Nippon Gakki Seizo Kabushiki KaishaInventors: Jun-ichi Nishizawa, Takashi Yoshida
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Patent number: 4320410Abstract: This invention relates to a GaAs semiconductor device and more particularly to a GaAs static induction transistor integrated circuit which operates at a very high speed. Gallium arsenide has the features that the mobility of electrons is higher than that in silicon and that the band structure has a direct gap. The mobility of electrons in gallium arsenide is several times as high as that in silicon; this is very suitable for the manufacture of a semiconductor device of high-speed operation. Further, since gallium arsenide has the direct gap, the electron-hole recombination rate is high and the minority carrier storage effect is extremely small. By causing the recombination at the direct gap, light emission can be achieved more efficiently. Accordingly, a light receiving and emitting semiconductor device can be obtained through the use of gallium arsenide. As the propagation velocity of light is very fast, signal transfer between semiconductor chips can be achieved at ultra-high speed.Type: GrantFiled: May 3, 1979Date of Patent: March 16, 1982Assignee: Semiconductor Research FoundationInventors: Jun-ichi Nishizawa, Tadahiro Ohmi
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Patent number: 4317127Abstract: A static induction type semiconductor device containing a normal type static induction transistor having the structure that a source region, gate regions and drain regions are arrayed in a main surface of a channel-constituting semiconductor region, and that a sub-drain region is formed in the opposite surface of the channel-constituting semiconductor region so as to extend from a position corresponding to the source region up to a position corresponding to the drain regions. The provision of this sub-drain region makes it possible to realize easy isolation of a normal vertical structure static induction transistor in a semiconductor wafer, the normal vertical structure contributing to increasing the transconductance, and to improving the speed of operation, without sacrificing a high packing density.Type: GrantFiled: September 17, 1979Date of Patent: February 23, 1982Assignee: Zaidan Hojin Handotai Kenkyu ShinkokaiInventor: Jun-ichi Nishizawa