Patents by Inventor Jun Kojima

Jun Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12507453
    Abstract: A semiconductor device includes a gallium nitride substrate and a pattern film disposed on a front surface of the gallium nitride substrate. In the gallium nitride substrate, a Young's modulus in a first direction along the front surface is larger than a Young's modulus in a second direction along the front surface and orthogonal to the first direction. A first ratio R1 obtained by dividing a dimension of the gallium nitride substrate in the first direction by a dimension of the gallium nitride substrate in the second direction and a second ratio R2 obtained by dividing a dimension of the pattern film in the first direction by a dimension of the pattern film in the second direction satisfy a relationship of R1<R2.
    Type: Grant
    Filed: July 3, 2023
    Date of Patent: December 23, 2025
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation, National University Corporation Tokai National Higher Education and Research System
    Inventors: Seiya Hasegawa, Takashi Ushijima, Takashi Ishida, Shoichi Onda, Chiaki Sasaoka, Jun Kojima
  • Patent number: 12476156
    Abstract: A semiconductor chip includes a chip-constituting substrate having one surface, the other surface opposite to the one surface, and two pairs of opposing side surfaces connecting the one surface and the other surface. The one surface and the other surface are along one of a {0001} c-plane, a {1-100} m-plane, and a {11-20} a-plane. One of the two pairs of opposing side surfaces is along another one of the {0001} c-plane, the {1-100} m-plane, and the {11-20} a-plane. The other of the two pairs of opposing side surfaces is along the other of the {0001} c-plane, the {1-100} m-plane, and the {11-20} a-plane. The side surface includes an altered layer containing gallium oxide and gallium metal in a surface layer portion in a depth direction which is a normal direction to the side surface.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: November 18, 2025
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation, HAMAMATSU PHOTONICS K.K., National University Corporation Tokai National Higher Education and Research System
    Inventors: Masatake Nagaya, Hiroki Watanabe, Junji Ohara, Daisuke Kawaguchi, Keisuke Hara, Chiaki Sasaoka, Jun Kojima, Shoichi Onda
  • Patent number: 12467161
    Abstract: A method for manufacturing a semiconductor device includes: preparing a processed wafer having a gallium nitride (GaN) wafer and an epitaxial layer on the GaN wafer; forming a device constituent part in a portion of the processes wafer adjacent to a front surface provided by the epitaxial layer; forming a modified layer inside of the processed wafer by applying a laser beam from a back surface side opposite to the front surface side; and dividing the processed wafer at the modified layer. The processed wafer prepared includes a reflective layer for reflecting the laser beam at a position separated from a planned formation position, where the modified layer is to be formed, by a predetermined distance toward the front surface side. The reflective layer contains a layer having a refractive index different from that of a GaN single crystal of an epitaxial layer.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: November 11, 2025
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation, HAMAMATSU PHOTONICS K.K., National University Corporation Tokai National Higher Education and Research System
    Inventors: Junji Ohara, Takashi Ishida, Yoshitaka Nagasato, Daisuke Kawaguchi, Chiaki Sasaoka, Shoichi Onda, Jun Kojima
  • Patent number: 12334339
    Abstract: A manufacturing method of a semiconductor device, includes: forming a gas vent recess in a first surface of a compound semiconductor substrate, which includes a plurality of device regions adjacent to the first surface, along an interface between the plurality of device regions; forming an altered layer inside the compound semiconductor substrate to extend along the first surface at a depth corresponding to a range of a depth of the gas vent recess by applying a laser beam; dividing the compound semiconductor substrate at the altered layer into a first part including the first surface and a second part including a second surface of the compound semiconductor substrate opposite to the first surface; and forming a metal film to cover a divided surface of the first part while exposing the gas vent recess.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: June 17, 2025
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation, National University Corporation Tokai National Higher Education and Research System, HAMAMATSU PHOTONICS K.K.
    Inventors: Shosuke Nakabayashi, Masatake Nagaya, Chiaki Sasaoka, Shoichi Onda, Jun Kojima, Daisuke Kawaguchi, Ryuji Sugiura, Toshiki Yui, Keisuke Hara, Tomomi Aratani
  • Publication number: 20250180085
    Abstract: A wear information calculation system includes a movement control unit that moves a non-rotating body provided in a brake, between a displaced position where the non-rotating body comes into contact with a rotating body provided in the brake, thereby stopping rotation of the rotating body, and is displaced according to a wear state of at least one of the rotating body and the non-rotating body, and a predetermined fixed position where the non-rotating body is spaced apart from the rotating body, a vibration detection unit that detects vibration occurring when the non-rotating body reaches the fixed position, and a calculation unit that calculates the information on the wear state based on a measurement time from a measurement initiation timing based on a command to move the non-rotating body from the displaced position to the fixed position until the vibration detection unit detects the vibration.
    Type: Application
    Filed: November 27, 2024
    Publication date: June 5, 2025
    Inventors: Nanami TOMURA, Isamu MATSUMURA, Toshinobu KIRA, Kazuya WATANABE, Jun KOJIMA, Takahisa YAMADA
  • Publication number: 20240014272
    Abstract: A semiconductor device includes a gallium nitride substrate and a pattern film disposed on a front surface of the gallium nitride substrate. In the gallium nitride substrate, a Young's modulus in a first direction along the front surface is larger than a Young's modulus in a second direction along the front surface and orthogonal to the first direction. A first ratio R1 obtained by dividing a dimension of the gallium nitride substrate in the first direction by a dimension of the gallium nitride substrate in the second direction and a second ratio R2 obtained by dividing a dimension of the pattern film in the first direction by a dimension of the pattern film in the second direction satisfy a relationship of R1<R2.
    Type: Application
    Filed: July 3, 2023
    Publication date: January 11, 2024
    Inventors: Seiya HASEGAWA, Takashi USHIJIMA, Takashi ISHIDA, Shoichi ONDA, Chiaki SASAOKA, Jun KOJIMA
  • Patent number: 11810783
    Abstract: A gallium nitride semiconductor device includes: a chip formation substrate made of gallium nitride and having one surface and an other surface opposite to the one surface; a one surface side element component disposed on the one surface and providing a component of an one surface side of a semiconductor element; and a metal film constituting a back surface electrode in contact with the other surface. The other surface has an irregularity provided by a plurality of convex portions with a trapezoidal cross section and a plurality of concave portions located between the convex portions; and an upper base surface of the trapezoidal cross section in each of the plurality of convex portions is opposed to the one surface.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: November 7, 2023
    Assignees: DENSO CORPORATION, HAMAMATSU PHOTONICS K.K., National University Corporation Tokai National Higher Education and Research System
    Inventors: Chiaki Sasaoka, Jun Kojima, Shoichi Onda, Masatake Nagaya, Kazukuni Hara, Daisuke Kawaguchi
  • Patent number: 11810821
    Abstract: A semiconductor chip includes: an epitaxial film made of gallium nitride; a semiconductor element disposed in the epitaxial film; a chip formation substrate including the epitaxial film and having a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface; and a convex and a concavity on the side surface.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: November 7, 2023
    Assignees: DENSO CORPORATION, HAMAMATSU PHOTONICS K.K., National University Corporation Tokai National Higher Education and Research System
    Inventors: Masatake Nagaya, Kazukuni Hara, Daisuke Kawaguchi, Toshiki Yui, Chiaki Sasaoka, Jun Kojima, Shoichi Onda
  • Publication number: 20230326748
    Abstract: A manufacturing method of a semiconductor device, includes: forming a gas vent recess in a first surface of a compound semiconductor substrate, which includes a plurality of device regions adjacent to the first surface, along an interface between the plurality of device regions; forming an altered layer inside the compound semiconductor substrate to extend along the first surface at a depth corresponding to a range of a depth of the gas vent recess by applying a laser beam; dividing the compound semiconductor substrate at the altered layer into a first part including the first surface and a second part including a second surface of the compound semiconductor substrate opposite to the first surface; and forming a metal film to cover a divided surface of the first part while exposing the gas vent recess.
    Type: Application
    Filed: March 23, 2023
    Publication date: October 12, 2023
    Inventors: SHOSUKE NAKABAYASHI, MASATAKE NAGAYA, CHIAKI SASAOKA, SHOICHI ONDA, JUN KOJIMA, DAISUKE KAWAGUCHI, RYUJI SUGIURA, TOSHIKI YUI, KEISUKE HARA, TOMOMI ARATANI
  • Patent number: 11784039
    Abstract: A method for manufacturing a gallium nitride semiconductor device includes: preparing a gallium nitride wafer; forming an epitaxial growth film on the gallium nitride wafer to provide a processed wafer having chip formation regions; perform a surface side process on a one surface side of the processed wafer; removing the gallium nitride wafer and dividing the processed wafer into a chip formation wafer and a recycle wafer; and forming an other surface side element component on an other surface side of the chip formation wafer.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: October 10, 2023
    Assignees: DENSO CORPORATION, HAMAMATSU PHOTONICS K.K., National University Corporation Tokai National Higher Education and Research System
    Inventors: Jun Kojima, Chiaki Sasaoka, Shoichi Onda, Masatake Nagaya, Kazukuni Hara, Daisuke Kawaguchi
  • Publication number: 20230238281
    Abstract: A method of manufacturing a gallium nitride substrate includes preparation of a gallium nitride wafer, formation of a transformation layer, and formation of the gallium nitride substrate. The gallium nitride has a first main surface and a second main surface on a side opposite from the first main surface. The gallium nitride wafer is made of a hexagonal crystal, and each of the first main surface and the second main surface is a {1-100} m-plane of the hexagonal crystal. The transformation layer is formed along a planar direction of the gallium nitride wafer by emitting a laser beam into the gallium nitride wafer. The gallium nitride substrate is formed from the gallium nitride wafer by dividing the gallium nitride wafer at the transformation layer. In the formation of the transformation layer, the laser beam is emitted to form an irradiation mark for forming the transformation layer.
    Type: Application
    Filed: January 12, 2023
    Publication date: July 27, 2023
    Inventors: MASATAKE NAGAYA, SHOSUKE NAKABAYASHI, DAISUKE KAWAGUCHI, TOSHIKI YUI, CHIAKI SASAOKA, SHOICHI ONDA, JUN KOJIMA
  • Publication number: 20230230829
    Abstract: A method of manufacturing a semiconductor element includes formation of a modified layer, detection of a first region, and cutting of a semiconductor wafer. In the formation of the modified layer, a laser is irradiated on the semiconductor wafer to form the modified layer extending along a surface of the semiconductor wafer inside the semiconductor wafer. The surface of the semiconductor wafer includes a peripheral portion having the first region and a second region. The first region is a region in which the modified layer is not located, and the second region is a region in which the modified layer is formed. In the cutting of the semiconductor wafer, the semiconductor wafer is cut at the modified layer starting from the second region.
    Type: Application
    Filed: December 29, 2022
    Publication date: July 20, 2023
    Inventors: SHOSUKE NAKABAYASHI, JUNJI OHARA, MASATAKE NAGAYA, CHIAKI SASAOKA, SHOICHI ONDA, JUN KOJIMA, DAISUKE KAWAGUCHI, RYUJI SUGIURA, TOSHIKI YUI, KEISUKE HARA
  • Publication number: 20230160104
    Abstract: A method for manufacturing a semiconductor device includes: preparing a processed wafer having a gallium nitride (GaN) wafer and an epitaxial layer on the GaN wafer; forming a device constituent part in a portion of the processes wafer adjacent to a front surface provided by the epitaxial layer; forming a modified layer inside of the processed wafer by applying a laser beam from a back surface side opposite to the front surface side: and dividing the processed wafer at the modified layer. The processed wafer prepared includes a reflective layer for reflecting the laser beam at a position separated from a planned formation position, where the modified layer is to be formed, by a predetermined distance toward the front surface side. The reflective layer contains a layer having a refractive index different from that of a GaN single crystal of an epitaxial layer.
    Type: Application
    Filed: November 16, 2022
    Publication date: May 25, 2023
    Inventors: Junji OHARA, Takashi ISHIDA, Yoshitaka NAGASATO, Daisuke KAWAGUCHI, Chiaki SASAOKA, Shoichi ONDA, Jun KOJIMA
  • Publication number: 20230116302
    Abstract: A semiconductor chip includes a chip-constituting substrate having one surface, the other surface opposite to the one surface, and two pairs of opposing side surfaces connecting the one surface and the other surface. The one surface and the other surface are along one of a {0001} c-plane, a {1-100} m-plane, and a {11-20} a-plane. One of the two pairs of opposing side surfaces is along another one of the {0001} c-plane, the {1-100} m-plane, and the {11-20} a-plane. The other of the two pairs of opposing side surfaces is along the other of the {0001} c-plane, the {1-100} m-plane, and the {11-20} a-plane. The side surface includes an altered layer containing gallium oxide and gallium metal in a surface layer portion in a depth direction which is a normal direction to the side surface.
    Type: Application
    Filed: September 20, 2022
    Publication date: April 13, 2023
    Inventors: MASATAKE NAGAYA, Hiroki Watanabe, Junji Ohara, Daisuke Kawaguchi, Keisuke Hara, Chiaki Sasaoka, Jun Kojima, Shoichi Onda
  • Publication number: 20210327757
    Abstract: A semiconductor chip includes: an epitaxial film made of gallium nitride; a semiconductor element disposed in the epitaxial film; a chip formation substrate including the epitaxial film and having a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface; and a convex and a concavity on the side surface.
    Type: Application
    Filed: April 13, 2021
    Publication date: October 21, 2021
    Inventors: Masatake Nagaya, Kazukuni Hara, Daisuke Kawaguchi, Toshiki Yui, Chiaki Sasaoka, Jun Kojima, Shoichi Onda
  • Publication number: 20210327702
    Abstract: A method for manufacturing a gallium nitride semiconductor device includes: preparing a gallium nitride wafer; forming an epitaxial growth film on the gallium nitride wafer to provide a processed wafer having chip formation regions; perform a surface side process on a one surface side of the processed wafer; removing the gallium nitride wafer and dividing the processed wafer into a chip formation wafer and a recycle wafer; and forming an other surface side element component on an other surface side of the chip formation wafer.
    Type: Application
    Filed: April 13, 2021
    Publication date: October 21, 2021
    Inventors: Jun KOJIMA, Chiaki SASAOKA, Shoichi ONDA, Masatake NAGAYA, Kazukuni HARA, Daisuke KAWAGUCHI
  • Publication number: 20210327710
    Abstract: A gallium nitride semiconductor device includes: a chip formation substrate made of gallium nitride and having one surface and an other surface opposite to the one surface; a one surface side element component disposed on the one surface and providing a component of an one surface side of a semiconductor element; and a metal film constituting a back surface electrode in contact with the other surface. The other surface has an irregularity provided by a plurality of convex portions with a trapezoidal cross section and a plurality of concave portions located between the convex portions; and an upper base surface of the trapezoidal cross section in each of the plurality of convex portions is opposed to the one surface.
    Type: Application
    Filed: April 13, 2021
    Publication date: October 21, 2021
    Inventors: Chiaki SASAOKA, Jun KOJIMA, Shoichi ONDA, Masatake NAGAYA, Kazukuni HARA, Daisuke KAWAGUCHI
  • Publication number: 20160257109
    Abstract: A CPU reads out image data from a frame memory line by line, performs logical addition of each bit of readout original image data corresponding to one line and a corresponding bit of each image data acquired by shifting the original image data by one to four bits, and thereby generates image data whose width has been enlarged by four bits. When writing the image data enlarged in the leftward and rightward directions in a ring buffer, the CPU generates image data on a transfer base material which has been enlarged in the upward and downward directions by copying or logical addition. A transfer base material transfer control section outputs the image data on the transfer base material written in the ring buffer for each line to a print head control section under the control of the CPU at predetermined timing.
    Type: Application
    Filed: February 29, 2016
    Publication date: September 8, 2016
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Jun KOJIMA, Tsutomu KOBAYASHI
  • Patent number: D911217
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: February 23, 2021
    Inventor: Jun Kojima
  • Patent number: D941225
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: January 18, 2022
    Inventor: Jun Kojima