Patents by Inventor Jun Liao

Jun Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10617000
    Abstract: A system for a three-dimensional (“3D”) printed circuit board (“PCB”) to printed circuit board interface is provided. A first PCB includes first landing pads disposed on one or more edges of the first PCB. The first landing pads electrically couple to conductive pins or second landing pads disposed on a second PCB. The second landing pads may be disposed in a slot in the second PCB. The interface between the first landing pads and the second landing pads may provide various advantages over traditional PCB to PCB interfaces, such as, improved signal integrity, improved power integrity, increased contact density, decreased clock jitter, etc.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: April 7, 2020
    Assignee: Intel Corporation
    Inventors: Daqiao Du, Zhen Zhou, Jun Liao, James A. McCall, Xiang Li, Kai Xiao, Zhichao Zhang
  • Publication number: 20200107476
    Abstract: An electromagnetic interference (EMI) shielding can be couplable to a circuit board. The EMI shielding can include a fence couplable to the circuit board, a lid couplable to the fence, and a shield arm extending from the lid and being configured to couple to the fence. The shield arm can be hingedly or rotatably coupled to the lid. The shield arm can be magnetically couplable to the lid. The shield arm and/or the fence can include a magnet to provide a magnetic attraction between the shield arm and the fence.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 2, 2020
    Inventors: Jaejin Lee, Chung-Hao Chen, Hao-Han Hsu, Xiang Li, Jun Liao
  • Publication number: 20190342990
    Abstract: Techniques and mechanisms for mitigating signal deterioration in communications between two circuit boards. In an embodiment, a packaged device accommodates coupling to a first circuit board which, in turn, accommodates connection to a second circuit board. In one such embodiment, an amplifier circuit of the packaged device includes an amplifier circuit which comprises a variable resistor and an active circuit element coupled thereto. The device receives via one of the circuit boards a control signal and a voltage which configure the amplifier circuit to provide an impedance matching for communication between the circuit boards. In another embodiment, the device comprises multiple common gate amplifiers which are variously configurable each to provide a respective impedance matching for communications between a motherboard and a dual in-line memory module.
    Type: Application
    Filed: July 18, 2019
    Publication date: November 7, 2019
    Inventors: Jun Liao, Xiang Li, Yunhui Chu, Jong-Ru Guo, James McCall
  • Patent number: 10467160
    Abstract: A method is described. The method includes receiving DDR memory channel signals from a motherboard through a larger DIMM motherboard connector. The method includes routing the signals to one of first and second smaller form factor connectors. The method includes sending the DDR memory channel signals to a DIMM that is connected to the one of the first and second smaller form factor connectors.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: November 5, 2019
    Assignee: Intel Corporation
    Inventors: Xiang Li, Yunhui Chu, Jun Liao, George Vergis, James A. McCall, Charles C. Phares, Konika Ganguly, Qin Li
  • Publication number: 20190311963
    Abstract: Techniques for fabricating a package substrate and/or a stiffener for a semiconductor package are described. For one technique, a package substrate comprises: a routing layer comprising a dielectric layer. A stiffener may be above the routing layer and a conductive line may be on the routing layer, the conductive line comprising first and second portions, the first portion having a first width, the second portion having a second width, the conductive line extending from a first region of the routing layer to a second region of the routing layer, the first region being under the stiffener, the second region being outside the stiffener, the first portion being on the first region, and the second portion being on the second region. One or more portions of the conductive line can be perpendicular to an edge of the stiffener. The perpendicular portion(s) may comprise a transition between the first and second widths.
    Type: Application
    Filed: April 4, 2018
    Publication date: October 10, 2019
    Inventors: Stephen CHRISTIANSON, Stephen HALL, Emile DAVIES-VENN, Dong-Ho HAN, Kemal AYGUN, Konika GANGULY, Jun LIAO, M. Reza ZAMANI, Cory MASON, Kirankumar KAMISETTY
  • Publication number: 20190288421
    Abstract: Embodiments may relate to a connector. The connector may include a plurality of connector pins that are to communicatively couple an element of a printed circuit board (PCB) with an element of an electronic device when the element of the PCB and the element of the electronic device are coupled with the connector. The connector may also include an active circuit that is communicatively coupled with a pin of the plurality of pins. The active circuit may be configured to match an impedance of the element of the PCB with an impedance of the element of the electronic device. Other embodiments may be described or claimed.
    Type: Application
    Filed: June 4, 2019
    Publication date: September 19, 2019
    Applicant: Intel Corporation
    Inventors: Jong-Ru Guo, Yunhui Chu, Jun Liao, Kai Xiao, Jingbo Li, Yuanhong Zhao, Mo Liu, Beomtaek Lee, James A. McCall, Jaejin Lee, Xiaoning Ye, Zuoguo Wu, Xiang Li
  • Publication number: 20190278426
    Abstract: A method includes receiving, by a device, a request to input information through a virtual canvas, the device includes a projector and a camera, the virtual canvas providing an input space to a user of the device, the virtual canvas includes a region of a blank surface illuminated by the projector, based on the received request, enabling the projector and the camera, detecting a distance between the device and the virtual canvas, based on the detected distance, adjusting the projector and the camera to focus on the virtual canvas, capturing a movement made by an object on the virtual canvas, the movement is associated with the information being input, converting the movement into a plurality of frames, each frame is associated with the movement, processing the plurality of frames to obtain the input information, and projecting the input information on the virtual canvas.
    Type: Application
    Filed: March 8, 2018
    Publication date: September 12, 2019
    Inventors: Shiwen He, Rui Shen, Wen Bao Yin, Dan Dan Wang, Jun Liao
  • Patent number: 10406116
    Abstract: Described are pressure-sensitive adhesive polymers (PSAs) useful, for example, for application to the skin, such as in the field of transdermal drug delivery. The PSAs include polar groups modeled on one or more polar portions of skin lipids, which contribute to good skin adhesion properties. Methods of making the PSAs, compositions comprising them, and methods of making and using them also are provided.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: September 10, 2019
    Assignee: NOVEN PHARMACEUTICALS, INC.
    Inventors: Jilin Zhang, Jun Liao, Puchun Liu, Steven Dinh
  • Patent number: 10406115
    Abstract: Described are pressure-sensitive adhesive polymers (PSAs) useful, for example, for application to the skin, such as in the field of transdermal drug delivery. The PSAs include polar groups modeled on one or more polar portions of skin lipids, which contribute to good skin adhesion properties. Methods of making the PSAs, compositions comprising them, and methods of making and using them also are provided.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: September 10, 2019
    Assignee: NOVEN PHARMACEUTICALS, INC.
    Inventors: Jilin Zhang, Jun Liao, Puchun Liu, Steven Dinh
  • Publication number: 20190245309
    Abstract: Embodiments of the present disclosure relate to a connector to connect a printed circuit board (PCB) with a memory device, where the connector includes a housing couplable with the PCB; a first signal pin coupled with the housing, where the first signal pin includes a first portion that includes a first curve, and a second portion that extends from the first portion and includes a second curve; and a second signal pin coupled with the housing, where the second signal pin includes a third portion that includes a third curve, and a fourth portion that extends from the third portion and includes a fourth curve, where the first curve is curved in a first opposite direction relative to the third curve, and where the second curve is curved in a second opposite direction relative to the fourth curve.
    Type: Application
    Filed: April 19, 2019
    Publication date: August 8, 2019
    Inventors: Jaejin Lee, Jun Liao, Xiang Li, George Vergis, Christopher E. Cox
  • Publication number: 20190229473
    Abstract: A device includes a printed circuit board (PCB) and a shield for the PCB. The shield can reduce high frequency electromagnetic frequency (EMF) noise generated by one or more components of the PCB. The PCB includes pads to interface with a corresponding connector. For example, for a dual inline memory module (DIMM) PCB, the PCB includes pads to insert into a DIMM connector. The shield includes a gap in its perimeter that aligns with clips in the corresponding connector. The gaps will correspond to similar features of the PCB that interface with the corresponding connector to allow the shield to attach to the PCB. The shield includes lock fingers to extend from a connector-facing edge of the shield to interface with the corresponding connector to align the shield with the corresponding connector.
    Type: Application
    Filed: March 29, 2019
    Publication date: July 25, 2019
    Inventors: Jaejin LEE, Jun LIAO, Xiang LI, Christopher E. COX
  • Publication number: 20190227717
    Abstract: Embodiments of the present invention provide a method, system, and computer program product for allocating storage extents. Extent input/output information pertaining to an extent on a storage device is received, by a computer, where the extant input/output information includes an access rate of data stored on the extent. The computer determines one or more periods of time where the input/output information exceeds a preconfigured threshold. The computer generates one or more of a first policy and a second policy based on the determined one or more periods where the first policy includes allocating the extent to a high performance disk within a tier storage system when data is stored during the determined periods and the second policy includes reallocating the extent from a low performance disk within the tier storage system to a high performance storage device within the tier storage system during the one or more determined periods.
    Type: Application
    Filed: April 3, 2019
    Publication date: July 25, 2019
    Inventors: Liang Fang, Shiwen He, JUN LIAO, JUN WEI ZHANG
  • Publication number: 20190216729
    Abstract: The present invention relates to gastric retention delivery systems and controlled release compositions containing a pharmaceutically acceptable active agent and a delivery agent.
    Type: Application
    Filed: December 18, 2017
    Publication date: July 18, 2019
    Inventors: Jun Liao, Puchun Liu, Steven Dinh, Brahma Singh, Shingai Majuru, Prateek N. Bhargava
  • Patent number: 10289311
    Abstract: Embodiments of the present invention provide a method, system, and computer program product for allocating storage extents. Extent input/output information pertaining to an extent on a storage device is received, by a computer, where the extant input/output information includes an access rate of data stored on the extent. The computer determines one or more periods of time where the input/output information exceeds a preconfigured threshold. The computer generates one or more of a first policy and a second policy based on the determined one or more periods where the first policy includes allocating the extent to a high performance disk within a tier storage system when data is stored during the determined periods and the second policy includes reallocating the extent from a low performance disk within the tier storage system to a high performance storage device within the tier storage system during the one or more determined periods.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: May 14, 2019
    Assignee: International Business Machines Corporation
    Inventors: Liang Fang, Shiwen He, Jun Liao, Jun Wei Zhang
  • Publication number: 20190102331
    Abstract: A method is described. The method includes receiving DDR memory channel signals from a motherboard through a larger DIMM motherboard connector. The method includes routing the signals to one of first and second smaller form factor connectors. The method includes sending the DDR memory channel signals to a DIMM that is connected to the one of the first and second smaller form factor connectors.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Inventors: Xiang LI, Yunhui CHU, Jun LIAO, George VERGIS, James A. McCALL, Charles C. PHARES, Konika GANGULY, Qin LI
  • Patent number: 10231977
    Abstract: Described are transdermal drug delivery systems for the transdermal administration of levonorgestrel and ethinyl estradiol, comprising an acrylic polymer matrix. Methods of making and using such systems also are described.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: March 19, 2019
    Assignee: NOVEN PHARMACEUTICALS, INC.
    Inventors: Prashant Patel, Viet Nguyen, Jun Liao
  • Publication number: 20190043796
    Abstract: An apparatus is described. The apparatus includes an electro-mechanical interface having angled signal interconnects, wherein, the angling of the signal interconnects is to reduce noise coupling between the angled signal interconnects.
    Type: Application
    Filed: June 25, 2018
    Publication date: February 7, 2019
    Inventors: Zhen ZHOU, Jun LIAO, Xiang LI, Kevin STONE, Tom DU, Tae-Young YANG, Ling ZHENG, James A. McCALL
  • Publication number: 20190045632
    Abstract: Various aspects are related to a connector, e.g., for connecting two boards with one another. The connector may include a housing and a plurality of pins. The housing may include a first housing surface and a second housing surface opposite the first housing surface. Each pin of the plurality of pins may include a first portion protruding arcuately from the first housing surface and a second portion protruding arcuately from the second housing surface.
    Type: Application
    Filed: August 1, 2018
    Publication date: February 7, 2019
    Inventors: Xiang Li, Jun Liao, Yunhui CHU, George Vergis, Chong Zhao
  • Publication number: 20190044289
    Abstract: A shielded SODIMM system for reducing RF emissions of a SODIMM connector is disclosed herein. SODIMM connector RFI presently interferes with connectivity and is also an obstacle for higher speed memory applications. The shielded SODIMM system includes a SODIMM connector that is at least partially housed by a SODIMM connector shield, to partially and/or substantially reduce or block RF emissions from the SODIMM connector. The SODIMM connector shield is at least partially conductive and is coupled to landing pads on a surface of a motherboard printed circuit board (“PCB”). The landing pads of the motherboard PCB that are coupled to the SODIMM connector shield are coupled to ground, which grounds the SODIMM connector shield. Grounding the SODIMM connector shield that at least partially houses the SODIMM connector reduces RF emissions from the SODIMM connector during information transfer operations.
    Type: Application
    Filed: February 20, 2018
    Publication date: February 7, 2019
    Applicant: Intel Corporation
    Inventors: XIANG LI, JAEJIN LEE, JUN LIAO, HAO-HAN HSU, GEORGE VERGIS, YUN LING, DONG-HO HAN, YUNHUI CHU
  • Publication number: 20190045622
    Abstract: An apparatus is described. The apparatus includes a semiconductor chip having cross-talk noise cancellation circuitry disposed between a disturber trace and a trace to be protected from cross-talk noise emanating from the disturber trace. The trace is to be coupled to a receiver disposed on a different semiconductor chip.
    Type: Application
    Filed: November 17, 2017
    Publication date: February 7, 2019
    Inventors: Jun LIAO, Zhen ZHOU, James A. McCALL, Jong-Ru GUO, Xiang LI, Yunhui CHU, Zuoguo WU