Abstract: A computer includes a processor and a memory, and the memory stores instructions executable by the processor to receive a first image frame from a first camera of a vehicle and a second image frame from a second camera of the vehicle, identify a common point in the first image frame and the second image frame, determine a projected position of the common point projected onto a plane based on the first image frame and the second image frame, and determine a position of the common point based on the projected position. A first optical axis defined by the first camera and a second optical axis defined by the second camera are in the plane.

Abstract: A gallium nitride (GaN) device with field plate structure, including a substrate, a gate on the substrate and a passivation layer covering on the gate, a source and a drain on the substrate and the passivation layer, a stop layer on the source, the drain and the passivation layer, and dual-damascene interconnects connecting respectively with the source and the drain, wherein the dual-damascene interconnect is provided with a via portion under the stop layer and a trench portion on the stop layer, and the via portion is connected with the source or the drain, and the trench portion of one of the dual-damascene interconnects extends horizontally toward the drain and overlaps the gate below in vertical direction, thereby functioning as a field plate structure for the GaN device.

Abstract: A semiconductor structure includes a SOI substrate having a device layer and a buried oxide layer contiguous with the device layer; a transistor disposed on the device layer; a dielectric layer surrounding the transistor; an interconnect structure disposed on the dielectric layer and electrically connected to a gate of the transistor; a charge trapping layer contiguous with the buried oxide layer; a capping layer contiguous with the charge trapping layer; and a conductive via penetrating through the capping layer, the charge trapping layer, the buried oxide layer, the device layer, and the dielectric layer. The conductive via is electrically connected to the interconnect structure.

Abstract: The present disclosure relates to technical field of woodworking drills, and in particular to a woodworking drill including: a cutter body; wherein an outer side wall of the cutter body defines a plurality of chip discharge slots that are spirally disposed, and the plurality of chip discharge slots are disposed circumferentially about a center axis of the cutter body; a cutter shank, connected to an end of the cutter body; and an alloy main drill structure, arranged at another end of the cutter body back away from the cutter shank; wherein a plurality of secondary cutting edges are formed on the outer side wall of the cutter body by the plurality of chip discharge slots, and the alloy main drill structure is configured for main drilling wood.

Abstract: A semiconductor package includes a RDL interposer having a first surface and a second surface; fanout pads and peripheral pads on the second surface; a first semiconductor die on the first surface and electrically connected to the fanout pads; a molding compound surrounding the first semiconductor die and the first surface of the RDL interposer; through mold vias in the molding compound around the first semiconductor die; peripheral solder bumps within the through mold vias and directly disposed on the peripheral pads; through silicon via pads on the rear surface of the first semiconductor die; a second semiconductor die bonded to the through silicon via pads of the first semiconductor die and the peripheral solder bumps within the through mold vias.

Abstract: An antenna system comprises a driven antenna element connected to a printed circuit board (PCB), and a plurality of PCB extenders provided by electrical conductors connected to a PCB ground plane for cooperation with the driven antenna element in signal communication. In an eyewear device that incorporates the antenna system, the plurality of PCB extenders are provided by conductive structural elements incorporated in an eyewear frame.

Abstract: A memory device includes a memory cell and a sense amplifier. The sense amplifier has a reference circuit configured to output a reference voltage and a sensing circuit connected to the memory cell. A comparator includes a first input and a second input, with the first input connected to the reference circuit to receive the reference voltage, and the second input connected to the memory cell. A precharger is configured to selectively precharge the sensing circuit to a predetermined precharge voltage.

Abstract: A housing assembly for an electronics-enabled device includes a housing wall having parallel inner and outer faces, with a hinge base affixed through the wall. The hinge base has a shank extending through the wall and a joint mount exterior to the housing for hingedly mounting an external component. An anchor plate inside the housing is welded to the shank, preventing axial withdrawal of the hinge base by obstruction against the inner face. The welded connection rotationally keys the anchor plate to the hinge base. The assembly enables integration of electronics components mounted on the anchor plate, which can serve as a thermal conductor between heat-generating components and an external heatsink via the hinge base. In electronics-enabled eyewear, the hinge base provides hinged connection of a temple to an eyewear frame. Manufacturing involves locating the hinge base and anchor plate, translationally fastening them together threadedly, and spot-welding for rotational keying.

Abstract: A semiconductor device includes a device layer, an interlayer dielectric layer disposed above the device layer, a first interconnection structure, a second interconnection structure, and a first dielectric layer. The interlayer dielectric layer includes a first portion and a second portion disposed above a first device region and a second device region, respectively. A top surface of the first portion is lower than a top surface of the second portion in a vertical direction. The first interconnection structure includes first conductive lines partly located in the first portion. The second interconnection structure includes second conductive lines located in the second portion. The first dielectric layer is disposed on the first portion, a part of the first dielectric layer is sandwiched between two adjacent first conductive lines, and a bottom surface of the first dielectric layer is lower than the top surface of the second portion in the vertical direction.

Abstract: A fiber optic distribution box includes a box unit, a protective shield unit pivotally mounted on the box unit, and a plurality of mounting units detachably installed to the box unit for accommodating a plurality of adapters. The box unit includes a box body defining an interior space and a plurality of base brackets disposed on the box body and accommodated in the interior space. Each mounting unit includes a flanged seat and a tubular portion extending obliquely upwardly from the flanged seat.

Abstract: The present disclosure provides a device and a method for controllable forging of a forming flow line of a complex-shaped component. The device includes a frame, a shaping unit, a cushioning unit, and a cleaning unit, and the frame is used to mount and fix the shaping unit, the cushioning unit, and the cleaning unit; the shaping unit is used to improve a shaping capacity of processed parts; the cushioning unit is used to reduce a vibration in a metal shaping process to avoid an impact on the shaping of the metal; the cleaning unit is used to clean up a surface of a mold after shaping; when the metal is put into the mold, the metal is extruded and shaped through the shaping unit, and at the same time, the cushioning unit is used to offset the vibration generated by the shaping unit during the shaping process.

Abstract: An MRAM structure includes a first memory unit and a second memory unit. A conductive line is disposed between the first memory unit and the second memory unit. An SOT metal conductive line contacts and electrically connects an end of the first memory unit, an end of the conductive line and an end of the second memory unit. A first switch element is electrically connected to an end of the SOT metal conductive line, and a second switch element is electrically connected to the other end of the SOT metal conductive line. A third switch element is electrically connected to the other end of the first memory unit. A fourth switch element is electrically connected to the other end of the conductive line. A fifth switch element is electrically connected to the other end of the second memory unit.

Abstract: A semiconductor device includes an aluminum (Al) pad on a substrate, a wire bonded onto the Al pad, a cobalt (Co) layer between and directly contacting the Al pad and the wire, and a Co—Pd alloy on the Al pad and divide the Co layer into a first portion, a second portion, and a third portion. Preferably, the wire includes a copper (Cu) wire and a palladium (Pd) layer coated on the Cu wire.

Abstract: A method of forming a semiconductor structure, includes forming a fin structure over a substrate in a Z-direction; forming a dummy gate structure extending in a Y-direction and over the fin structure; and forming gate spacers on sidewalls of the dummy gate structure. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method further includes removing a portion of the dummy gate structure to form a first trench that exposes upper portions of the gate spacers; forming an insulating material in the first trench; partially removing the insulating material to form insulating layers on sidewalls of the upper portions of the gate spacers; removing a remaining portion of the dummy gate structure to expose lower portions of the gate spacers; and partially etching the lower portions of the gate spacers.

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) on a substrate, forming a top electrode on the MTJ, forming an inter-metal dielectric (IMD) layer around the top electrode and the MTJ, forming a landing layer on the IMD layer and the MTJ, and then patterning the landing layer to form a landing pad. Preferably, the landing pad is disposed on the top electrode and the IMD layer adjacent to one side of the top electrode.

Abstract: This application discloses an Ethernet coding method and apparatus, to adapt to a scenario in which a higher transmission bit error rate is caused by a high bandwidth. The method includes: a transmit end encodes first to-be-encoded information by using a first forward error correction (FEC) codeword, to obtain first encoded data, where the first forward error correction FEC codeword is a Reed-Solomon forward error correction (RS-FEC) codeword; and the transmit end encodes the first encoded data by using a second FEC codeword, to obtain second encoded data, where a code length N and an information bit length K of the second FEC codeword satisfy the following formula: M ? 1 * N K ? M ? 2 , where M1 is a throughput of the first encoded data, and M2 is a throughput of the second encoded data.

Abstract: Provided is a process for manufacturing a graphene material, the process comprising (a) injecting a rust stock into a first end of a continuous reactor having a toroidal vortex flow, wherein the first stock comprises graphite and a non-oxidizing liquid (or, alternatively, graphite, an acid, and an optional oxidizer) and the continuous flow reactor is configured to produce the toroidal vortex flow, enabling the formation of a reaction product suspension or slurry at the second end, downstream from the first end, of the continuous reactor; and (b) introducing the reaction product suspension/slurry from the second end back to enter the continuous reactor at or near the first end, allowing the reaction product suspension/slurry to form a toroidal vortex flow and move down to or near the second end to produce a graphene suspension or graphene oxide slurry. The process may further comprise repeating step (b) for at least one time.

Abstract: A semiconductor device includes an error correction code circuit and a register circuit. The error correction code circuit is configured to generate first data according to second data. The register circuit is configured to generate reset information according to a difference between the first data and the second data, for adjusting a memory cell associated with the second data. A method is also disclosed herein.

Abstract: A method of operating a memory circuit includes generating, by a first memory cell array, a first current in response to a first voltage, generating, by a tracking circuit, a second set of leakage currents, generating, by a first current source, a second write current, and mirroring, by a first current mirror. The first current includes a first set of leakage currents and a first write current. The first current is in a first path with a second current in a second path. The second current includes the second set of leakage currents and the second write current. The first write current corresponds to the second write current. The first set of leakage currents corresponds to the second set of leakage currents. The second set of leakage currents is configured to track the first set of leakage currents of the first memory cell array.

Abstract: A carry case for an electronics-enabled eyewear device, such as smart glasses, has charging contacts that are movable relative to a storage chamber in which the eyewear device is receivable. The charging contacts are connected to a battery carried by the case for charging the eyewear device via contact coupling of the charging contacts to corresponding contact formations on an exterior of the eyewear device. The charging contacts are in some instances mounted on respective flexible walls defining opposite extremities of the storage chamber. The contact formations on the eyewear device are in some instances provided by hinge assemblies that couple respective temples to a frame of the eyewear device.