Patents by Inventor Jun Murata

Jun Murata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6951688
    Abstract: The present invention relates to a charging member for charging a surface of a member to be charged in an image forming apparatus, and one aspect of the present invention provides a charging member having an outermost surface layer containing a conductive elastic material. The conductive elastic material comprises a polymer including a polar polymer, primarily including (i) acrylonitrile butadiene rubber, (ii) an ethylene oxide-propylene oxide-allyl glycidyl ether terpolymer, and (iii) a homopolymer of epichlorohydrin. The weights x, y and z of the components (i), (ii) and (iii), respectively, have a relationship of 0.2<y/(x+y+z)?0.5 and 4<y/z?20. This charging member can realize uniform charging and is small in resistance variation, even when used for a long time.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: October 4, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hisao Kato, Yoshiaki Nishimura, Jun Murata
  • Patent number: 6949387
    Abstract: A technique for a semiconductor device is provided that includes forming circuit regions on a device formation region and device isolation regions on a semiconductor substrate, a ratio of the width of a device isolation region to the width of adjacent circuit regions thereto is set at 2 to 50. A design method is also provided and includes conducting measurements such as of thicknesses of a pad oxide film and a nitride film, the internal stress of the nitride film, the width of both device formation and isolation regions, the depth of the etched portion of the nitride film for forming the groove in a device isolation region, conducting stress analysis in the proximity of the groove due to thermal oxidation, and setting values pertaining to the width of the device formation region and of the device isolation region which do not lead to occurrence of dislocation.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: September 27, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Miura, Makoto Ogasawara, Hiroo Masuda, Jun Murata, Noriaki Okamoto
  • Publication number: 20040232573
    Abstract: When a molded lens is taken out from a molding die, it may be broken or damaged. The present invention provides a molding die comprising an upper die for lens molding, a lower die for lens molding, a support die, and a mold. At least either the upper die or lower die has no flange. The support die is provided below the die having no flanges. One or more through-holes are formed in the support die so that lifting pins can be inserted through the respective through holes. The upper and lower dies and can be slid relative to the mold.
    Type: Application
    Filed: June 15, 2004
    Publication date: November 25, 2004
    Inventors: Shoji Nakamura, Jun Murata, Yoshiyuki Shimizu, Seiji Moriguchi, Masaaki Sunohara
  • Publication number: 20040214355
    Abstract: A technique for a semiconductor device is provided that includes forming circuit regions on a device formation region and device isolation regions on a semiconductor substrate, a ratio of the width of a device isolation region to the width of adjacent circuit regions thereto is set at 2 to 50. A design method is also provided and includes conducting measurements such as of thicknesses of a pad oxide film and a nitride film, the internal stress of the nitride film, the width of both device formation and isolation regions, the depth of the etched portion of the nitride film for forming the groove in a device isolation region, conducting stress analysis in the proximity of the groove due to thermal oxidation, and setting values pertaining to the width of the device formation region and of the device isolation region which do not lead to occurrence of dislocation.
    Type: Application
    Filed: July 25, 2003
    Publication date: October 28, 2004
    Inventors: Hideo Miura, Makoto Ogasawara, Hiroo Masuda, Jun Murata, Noriaki Okamoto, Jun Murata, Noriaki Okamoto
  • Publication number: 20040155289
    Abstract: A method of manufacturing a semiconductor integrated circuit device having a switching MISFET and a capacitor element formed over a semiconductor substrate, such as a DRAM, is disclosed. The dielectric film of the capacitor element is formed to be co-extensive with the capacitor electrode layer over it. The upper electrode of the capacitor element is formed to be larger than the lower electrode.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 12, 2004
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Publication number: 20040136753
    Abstract: The present invention relates to a charging member for charging a surface of a member to be charged in an image-forming apparatus, and one aspect of the present invention provides a charging member having an outermost surface layer containing a conductive elastic material.
    Type: Application
    Filed: October 7, 2003
    Publication date: July 15, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hisao Kato, Yoshiaki Nishimura, Jun Murata
  • Patent number: 6737318
    Abstract: A method of manufacturing a semiconductor integrated circuit device having a switching MISFET and a capacitor element formed over a semiconductor substrate, such as a DRAM, is disclosed. The dielectric film of the capacitor element is formed to be co-extensive with the capacitor electrode layer over it. The upper electrode of the capacitor element is formed to be larger than the lower electrode.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: May 18, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Patent number: 6620704
    Abstract: A method is provided of fabricating a semiconductor device that includes forming a silicon oxide film on a semiconductor substrate. A silicon nitrite film may be formed on the silicon oxide film. A portion of the silicon nitrite film and the silicon oxide film may be removed at a desired portion. Additionally, a groove may be formed in the semiconductor substrate in the portion in which the silicon oxide film is removed. A part of the silicon oxide film may be etched back around the groove with hydrofluoric acid type at the portion in which the silicon nitrite film is located above. Additionally, an oxidized film may be formed in the groove of the semiconductor substrate and the groove may be oxidized.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: September 16, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Miura, Makoto Ogasawara, Hiroo Masuda, Jun Murata, Noriaki Okamoto
  • Publication number: 20030153730
    Abstract: The present invention relates, in general, to autotaxin. In particular, the present invention relates to a DNA segment encoding autotaxin; recombinant DNA molecules containing the DNA segment; cells containing the recombinant DNA molecule; a method of producing autotaxin; antibodies to autotaxin; and identification of functional domains in autotaxin.
    Type: Application
    Filed: May 15, 2002
    Publication date: August 14, 2003
    Inventors: Mary Stracke, Lance Liotta, Elliott Schiffmann, Henry Krutzch, Jun Murata
  • Patent number: 6559210
    Abstract: A charging member is provided, in which the electrical resistance is controlled with ease, the electrical resistances are uniform, and the electrical resistance, chemical properties, mechanical properties, etc., are suppressed to change with time so as to exhibit superior durability. The charging member primarily contains 100 parts by weight of at least one kind of polar rubber including at least a nitrile rubber, and further contains at least 0.01 parts by weight or more and 5 parts by weight or less of diazabicycloamine compound and 0.01 parts by weight or more and 10 parts by weight or less of weakly acidic compound.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: May 6, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventor: Jun Murata
  • Publication number: 20020127793
    Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it.
    Type: Application
    Filed: December 3, 2001
    Publication date: September 12, 2002
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Publication number: 20020093060
    Abstract: A width of a circuit device isolation region and a width of a device region formed on a semiconductor substrate are determined in such a manner as to satisfy a condition which prevents the occurrence of dislocation due to thermal oxidation for forming the isolation region. A semiconductor device can be fabrication which includes a semiconductor substrate, a plurality of circuit regions formed on a device formation region in the semiconductor substrate and having a width of 0.1 to 125 &mgr;m and device isolation regions so formed on the semiconductor substrate as to isolate a plurality of circuit regions from one another and having a width of 0.05 to 2.5 &mgr;m, and wherein a ratio of the width of the device isolation region to the width of a plurality of circuit regions adjacent to the device isolation region is from 2 to 50.
    Type: Application
    Filed: June 29, 2001
    Publication date: July 18, 2002
    Inventors: Hideo Miura, Makoto Ogasawara, Hiroo Masuda, Jun Murata, Noriaki Okamoto, Yasunobu Tanizaki, Eiji Wakimoto, Shinji Sakata
  • Patent number: 6417338
    Abstract: The present invention relates, in general, to autotaxin. In particular, the present invention relates to a DNA segment encoding autotaxin; recombinant DNA molecules containing the DNA segment; cells containing the recombinant DNA molecule; a method of producing autotaxin; antibodies to autotaxin; and identification of functional domains in autotaxin.
    Type: Grant
    Filed: January 17, 2000
    Date of Patent: July 9, 2002
    Assignee: The United States of America as represented by the Department of Health and Human Services
    Inventors: Mary Stracke, Lance Liotta, Elliott Schiffman, Henry Krutzch, Jun Murata
  • Publication number: 20020028574
    Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected,, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it.
    Type: Application
    Filed: July 27, 2001
    Publication date: March 7, 2002
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Patent number: 6310384
    Abstract: A width of a circuit device isolation region and a width of a device region formed on a semiconductor substrate are determined in such a manner as to satisfy a condition which prevents the occurrence of dislocation due to thermal oxidation for forming the isolation region. In accordance with the manufacturing scheme, a semiconductor device produced includes a semiconductor substrate, a plurality of circuit regions formed on a device formation region in the semiconductor substrate and having a width of 0.1 to 125 &mgr;m and device isolation regions so formed on the semiconductor substrate as to isolate a plurality of circuit regions from one another and having a width of 0.01 to 2.5 &mgr;m. In such a schemed device, a ratio of the width of the device region to the width of the device isolation region is from 2 to 50.
    Type: Grant
    Filed: April 17, 1997
    Date of Patent: October 30, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Miura, Makoto Ogasawara, Hiroo Masuda, Jun Murata, Noriaki Okamoto
  • Publication number: 20010021736
    Abstract: A charging member is provided, in which the electrical resistance is controlled with ease, the electrical resistances are uniform, and the electrical resistance, chemical properties, mechanical properties, etc., are suppressed to change with time so as to exhibit superior durability. The charging member primarily contains 100 parts by weight of at least one kind of polar rubber including at least a nitrile rubber, and further contains at least 0.01 parts by weight or more and 5 parts by weight or less of diazabicycloamine compound and 0.01 parts by weight or more and 10 parts by weight or less of weakly acidic compound.
    Type: Application
    Filed: February 23, 2001
    Publication date: September 13, 2001
    Inventor: Jun Murata
  • Patent number: 6281071
    Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: August 28, 2001
    Assignee: Hiatchi, Ltd.
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Patent number: 6243552
    Abstract: A charging member is provided for charging a member to be charged, which exhibits less nonuniformity in resistance, uniform chargeability and excellent processability, which is non-adhesive and thus causes neither adhesion to nor contamination of a photosensitive member, and which causes less residual strain with excellent durabiltiy even in long-term pressure contact, and an electrophotographic apparatus using the charging member. The charging member is composed of a conductive elastomer formed by vulcanizing a rubber composition containing nitrile rubber having a cross-linked polybutadiene structure in its molecule.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: June 5, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventor: Jun Murata
  • Patent number: 6084069
    Abstract: The present invention relates, in general, to autotaxin. In particular, the present invention relates to a DNA segment encoding autotaxin; recombinant DNA molecules containing the DNA segment; cells containing the recombinant DNA molecule; a method of producing autotaxin; antibodies to autotaxin; and identification of functional domains in autotaxin.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: July 4, 2000
    Assignee: The United States of America as represented by the Department of Health and Human Services
    Inventors: Mary Stracke, Lance Liotta, Elliott Schiffmann, Henry Krutzch, Jun Murata
  • Patent number: 6078778
    Abstract: This invention provides an improved electrifying member capable of that can have an electric voltage applied to it to electrify a surface of another member which is to be electrified. In particular, said electrifying member comprises an electrically conductive elastomer obtained by vulcanizing a mixture containing a nitryl rubber, a liquid nitryl rubber, and a non-polar polymer. Therefore, the invention provides an improved electrophotograph apparatus employing the above improved electrifying member, which has a relatively uniform electric resistance and uniform electrifying characteristics, has almost no change in its characteristics even if it has been used for a long time period, and is non-viscous and thus will not stick to a photosensitive body (to be electrified) so that it will not contaminate the photosensitive body.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: June 20, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventors: Jun Murata, Yoshiaki Nishimura, Nobutoshi Hayashi