Abstract: A backplane to be attached to an adhesive layer that is disposed on one surface of a display layer for displaying an image includes a pixel electrode disposed such that the adhesive layer is sandwiched between the display layer and the pixel electrode, and an insulating layer disposed between the pixel electrode and the adhesive layer.

Abstract: A display device includes a base substrate, a thin film transistor layer provided on the base substrate and including a low-resistance conductive layer including a copper film, the low-resistance conductive layer being disposed corresponding to each subpixel of a plurality of subpixels constituting a display region, and a light-emitting element layer provided on the thin film transistor layer and including a plurality of first electrodes, a plurality of light-emitting function layers, and a common second electrode sequentially layered corresponding to the plurality of subpixels, in which each of the first electrodes includes a silver film and is electrically connected to the low-resistance conductive layer, and the low-resistance conductive layer is covered with a first metal layer having etching resistance to an etching solution for the silver film.

Abstract: A display device includes: a thin film transistor layer and a light-emitting element layer. A terminal portion is provided with a first terminal layer formed of a second metal film, a first protection layer and a second protection layer formed of a second inorganic insulating film and a third inorganic insulating film are provided on the first terminal layer so as to expose a part of the first terminal layer and cover the other part of the first terminal layer, and a second terminal layer formed in the same layer and formed of the same material as each of transparent electrodes is provided on the first terminal layer exposed from the first protection layer and the second protection layer so as to cover the first terminal layer.

Abstract: A display device includes: a display panel including a HIGH power supply line and a LOW power supply line; and a scan signal line drive circuit including a unit circuit, wherein the unit circuit includes: a SET terminal; a RESET terminal; an output terminal; a first thin film transistor; a second thin film transistor including a second semiconductor layer, a second gate electrode, a second source electrode, and a second drain electrode, the second gate electrode being electrically connected to the SET terminal, one of the second source electrode and the second drain electrode being electrically connected to an internal node; and a third thin film transistor, the second gate electrode is an upper gate electrode, another one of the second source electrode and the second drain electrode is electrically connected to the HIGH power supply line, and the second thin film transistor further includes a lower gate electrode.

Abstract: A scanning signal line drive circuit as a GDM circuit is composed of a plurality of cascade-connected unit circuits and is operated by a multi-phase clock signal in which pulses partially overlap. The nth stage unit circuit includes: an internal node; a diode-connected set transistor connected to a set input terminal; a reset transistor including a drain terminal connected to the internal node, a source terminal connected to a reset state voltage terminal, and a gate terminal connected to the reset input terminal; and an output circuit including an output transistor connected to a clock input terminal and a capacitor, a scanning signal G(n?2), a scanning signal G(n+2), and a scanning signal G(n+1) being supplied to the set input terminal, the reset input terminal, and the reset state voltage terminal, respectively.

Abstract: In each of unit circuits that constitute a shift register, a first conduction terminal of a second thin-film transistor that controls the output of an output signal serving as a scanning signal is given a second input clock signal having a amplitude larger than the amplitude of a first input clock signal that is given to a first conduction terminal of a first thin-film transistor that controls the output of an output signal serving as a control signal for controlling another unit circuit. The channel length of the second thin-film transistor is set to be greater than the channel length of the first thin-film transistor, so that the breakdown voltage of the second thin-film transistor is higher than the breakdown voltage of the first thin-film transistor.

Abstract: A display device includes: a display panel including a HIGH power supply line and a LOW power supply line; and a scan signal line drive circuit including a unit circuit, wherein the unit circuit includes: a SET terminal; a RESET terminal; an output terminal; a first thin film transistor; a second thin film transistor including a second semiconductor layer, a second gate electrode, a second source electrode, and a second drain electrode, the second gate electrode being electrically connected to the SET terminal, one of the second source electrode and the second drain electrode being electrically connected to an internal node; and a third thin film transistor, the second gate electrode is an upper gate electrode, another one of the second source electrode and the second drain electrode is electrically connected to the HIGH power supply line, and the second thin film transistor further includes a lower gate electrode.

Abstract: There is provided a technology capable of controlling the occurrence of “migration” of a foam material to a contact object. The present technology provides a package material containing: a fibrous material that includes waste paper and/or pulp; a binder; sodium hydrogen carbonate; a surfactant; and a water-soluble softener, the water-soluble softener being a urea derivative having a chemical structural formula of R1,R2—N—CO—N—R3,R4 (R1 to R4 are each H or a saturated and/or unsaturated hydrocarbon group having 1 to 4 carbon atoms) and/or a water-soluble polyhydric alcohol having 3 to 15 carbon atoms, the number of carbon atoms and the number of hydroxyl (OH) groups in a molecular structure of the water-soluble polyhydric alcohol satisfying a relationship of the number of hydroxy groups<the number of carbon atoms.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for performing highlight recovery. One of the methods includes receiving raw image data of an image, the raw image data comprising, for each of a plurality of highlight regions in the image, original channel values for one or more channels of the highlight region; processing the raw image data to generate updated image data, wherein the updated image data comprises updated channel values for each highlight region in the image, and wherein, for each of one or more highlight regions of the image, one or more updated channel values of the highlight region exceed a maximum channel value according to a predetermined data precision; and performing a hue correction process on the updated channel values of the one or more highlight regions of the image to generate final channel values that satisfy the predetermined data precision.

Abstract: An active matrix substrate includes a thin film transistor including an oxide semiconductor layer, an interlayer insulating layer covering the thin film transistor, a pixel electrode provided above the interlayer insulating layer and electrically connected to the thin film transistor, a common electrode provided between the pixel electrode and the interlayer insulating layer, a first dielectric layer provided between the common electrode and the pixel electrode, and an alignment film covering the pixel electrode. The first dielectric layer includes a plurality of openings each of which exposes a part of the common electrode and includes the alignment film positioned therein.

Abstract: An active matrix substrate includes a pixel TFT provided corresponding to each pixel region, a pixel electrode electrically connected to the pixel TFT, a plurality of gate wirings extending in a row direction, and a plurality of source wirings extending in a column direction. Each gate wiring has a multilayer structure including a lower gate wiring electrically connected to a lower gate electrode included in the pixel TFT and an upper gate wiring electrically connected to an upper gate electrode included in the pixel TFT. In a case where the number of the gate wirings is defined as m and the number of the source wirings is defined as n, each gate wiring has 3 or more and less than n contact portions, each contact portion is positioned in any of n intersection regions, and the number of the contact portions overlapping each source wiring is less than m.

Abstract: An active matrix substrate includes a pixel TFT provided corresponding to each pixel region, a pixel electrode electrically connected to the pixel TFT, a plurality of gate wirings extending in a row direction, and a plurality of source wirings extending in a column direction. Each gate wiring has a multilayer structure including a lower gate wiring electrically connected to a lower gate electrode included in the pixel TFT and an upper gate wiring electrically connected to an upper gate electrode included in the pixel TFT. In a case where the number of the gate wirings is defined as m and the number of the source wirings is defined as n, each gate wiring has 3 or more and less than n contact portions, each contact portion is positioned in any of n intersection regions, and the number of the contact portions overlapping each source wiring is less than m.

Abstract: A set circuit in a unit circuit in a gate driver of a display device includes a setting transistor, a first auxiliary transistor, and a second auxiliary transistor. The setting transistor includes a source terminal connected to an internal node, a gate terminal connected to a set input terminal, and a drain terminal connected to the set input terminal via the first auxiliary transistor and also connected to an input terminal via the second auxiliary transistor in a diode-connected form. Each transistor is controlled to be in an on state and an off state during normal drive and is controlled to be in the off state and the on state during a pause period by a control signal supplied to the input terminal.

Abstract: In each of unit circuits that constitute a shift register, a first conduction terminal of a second thin-film transistor that controls the output of an output signal serving as a scanning signal is given a second input clock signal having a amplitude larger than the amplitude of a first input clock signal that is given to a first conduction terminal of a first thin-film transistor that controls the output of an output signal serving as a control signal for controlling another unit circuit. The channel length of the second thin-film transistor is set to be greater than the channel length of the first thin-film transistor, so that the breakdown voltage of the second thin-film transistor is higher than the breakdown voltage of the first thin-film transistor.

Abstract: Provided is an image display system that allows many persons to use multiple monitors without feeling color differences between the monitors. An image display system for displaying images on display devices includes multiple display devices, a spectral data acquisition unit, a candidate color matching function acquisition unit, a color difference calculation unit, and a color matching function selection unit. The spectral data acquisition unit is configured to acquire spectral data of the display devices. The candidate color matching function acquisition unit is configured to acquire multiple selection candidate color matching functions that are candidate color matching functions that may be selected by the color matching function selection unit. The color difference calculation unit is configured to calculate color differences between the display devices with respect to each of the selection candidate color matching functions using the spectral data.

Abstract: An active matrix substrate includes first and second TFTs. The first TFT includes a first lower electrode, a first insulating layer, a first oxide semiconductor layer, and a first gate electrode. The first oxide semiconductor layer includes a first channel region overlapping the first gate electrode when viewed in a normal direction of the substrate. The first lower electrode has a first light-shielding portion overlapping the entire first channel region and including a first metal film. The second TFT includes a second lower electrode, the first insulating layer, a second oxide semiconductor layer, and a second gate electrode. The second oxide semiconductor layer includes a second channel region overlapping the second gate electrode when viewed in the normal direction. The second lower electrode has a light-transmitting portion overlapping the second channel region and including a first transparent conductive film but not a light-shielding metal film.

Abstract: Provided is an image display system that allows many persons to use multiple monitors without feeling color differences between the monitors. An image display system for displaying images on display devices includes multiple display devices, a spectral data acquisition unit, a candidate color matching function acquisition unit, a color difference calculation unit, and a color matching function selection unit. The spectral data acquisition unit is configured to acquire spectral data of the display devices. The candidate color matching function acquisition unit is configured to acquire multiple selection candidate color matching functions that are candidate color matching functions that may be selected by the color matching function selection unit. The color difference calculation unit is configured to calculate color differences between the display devices with respect to each of the selection candidate color matching functions using the spectral data.

Abstract: A shift register includes stages each constituted by a unit circuit provided with a thin-film transistor (separation transistor) that separates a control node into an output-side first control node and an input-side second control node and a capacitor whose first end is connected to the second control node. The thin-film transistor (separation transistor) has a control terminal that is supplied with a high-level DC power supply voltage. Typically, the channel width of a thin-film transistor (first output control transistor) that controls output from a unit circuit is ten or more times greater than the channel width of the thin-film transistor (separation transistor).

Abstract: A set circuit in a unit circuit in a gate driver of a display device includes a setting transistor, a first auxiliary transistor, and a second auxiliary transistor. The setting transistor includes a source terminal connected to an internal node, a gate terminal connected to a set input terminal, and a drain terminal connected to the set input terminal via the first auxiliary transistor and also connected to an input terminal via the second auxiliary transistor in a diode-connected form. Each transistor is controlled to be in an on state and an off state during normal drive and is controlled to be in the off state and the on state during a pause period by a control signal supplied to the input terminal.

Abstract: An active matrix substrate includes a gate driver including a shift register including a plurality of unit circuits connected in multiple stages. Each of the plurality of unit circuits includes an output node, a first node, a first TFT including a first gate terminal supplied with the set signal, a first source terminal connected to the first node, and a first drain terminal supplied with a first power supply potential higher than a low-level potential of the set signal, and a second TFT including a second gate terminal connected to the first node, a second source terminal connected to the output node, and a second drain terminal supplied with the clock signal. The first TFT includes a semiconductor layer, and a first and a second gate electrodes disposed on a side of the semiconductor layer opposite to the substrate and connected to the first gate terminal.