Abstract: A method, apparatus and system for performing a demosaic operation are described. In one embodiment, the apparatus comprises: a plurality of interpolation modules to perform a plurality of interpolation operations to generate color pixel values of a first color for a plurality of pixel locations in an image region that do not have color pixel values of the first color; a first module to generate a set of color pixel values of the first color for the image region, one or more color pixel values in the set of pixel values being generated based on color pixel values of the first color from one of the plurality of interpolation modules; and a second module to select the one interpolation module based on an interpolation direction determined by color intensity gradient calculations that involve pixel values of the first color and at least one other color.

Abstract: A scalable rank filter and method that performs rank filtering based on input data samples are disclosed. In one embodiment, the rank filter comprises a pipeline that receives input data samples and generates an output based on the input data samples as a result of completing execution of the pipeline. The rank filter includes output logic to determine the output prior completing execution of the pipeline and outputs an indication of a median.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, interconnect portions, a conductive layer, a stacked body, and columnar portions. At least one portion of the interconnect portions is provided inside the substrate, each of the interconnect portions extends in a first direction along a surface of the substrate, and the interconnect portions are arranged along a second direction crossing the first direction. The conductive layer is provided on the interconnect portions. The stacked body is provided on the conductive layer and includes electrode layers stacked to be separated from each other, and each of the electrode layers extends in the second direction. The columnar portions are provided inside the stacked body, each of the columnar portions includes a semiconductor portion extending in a stacking direction of the electrode layers and a charge storage film provided between the semiconductor portion and the stacked body.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor portion, and an insulating portion. The insulating portion is provided in the stacked body and extends in a stacking direction and a first direction along a surface of the substrate, the first direction crossing the stacking direction. The insulating portion includes a first insulating film containing silicon oxide, a second insulating film containing silicon oxide, and a third insulating film located between the first insulating film and the second insulating film and containing silicon nitride.

Abstract: An example apparatus for image processing includes a motion-adaptive image enhancer to receive motion data and an image with reduced noise. The motion-adaptive image enhancer can process an occluded region of the image based on the motion data. The motion-adaptive image enhancer can generate an enhanced image.

Abstract: A method and system for joint edge enhancement and mosaic are described. In one embodiment, the system comprises an image capture unit having an image capture sensor; and an image processor comprising a first module operable to perform joint edge enhancement and demosaic processing.

Abstract: Techniques related to temporal noise reduction of images are discussed. Such techniques may include generating a noise stream corresponding to an input image and adaptively re-combining the noise stream with a reference image corresponding to the input image and a spatially noise reduced image corresponding to the input image to generate a temporal noise reduced output image.

Abstract: The present invention provides a thin film transistor substrate and a display device that prevent peeling. The thin film transistor substrate includes: an insulating substrate; a thin film transistor; a first inorganic insulating layer; an organic insulating layer stacked on the first inorganic insulating layer; and a second inorganic insulating layer stacked on the organic insulating layer. The organic insulating layer includes a side covered with the second inorganic insulating layer. The first inorganic insulating layer may contain silicon oxide. The organic insulating layer may contain photosensitive resin. The second inorganic insulating layer may contain silicon nitride.

Abstract: According to one embodiment, a first transistor includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a first gate insulating film, and a first gate electrode. The first semiconductor region is provided in a first semiconductor layer extending in a second direction substantially perpendicular to the surface of the semiconductor substrate from the first line. The second semiconductor region is provided above the first semiconductor region in the first semiconductor layer. The third semiconductor region is provided above the second semiconductor region in the first semiconductor layer. The first gate insulating film covers a first side face of the first semiconductor layer. The first gate electrode covers the first side face of the first semiconductor layer through the first gate insulating film. The first transistor has an asymmetrical structure with respect to a center face of the second semiconductor region in the second direction.

Abstract: A scalable rank filter and method for performing rank filtering are disclosed. In one embodiment, the rank filter comprises a W staged pipeline with W stages to receive N input data samples and operable to generate an output based on the N input data samples as a result of the W stages completing execution, where W is a bit length of the inputs and W and N are integers greater than two; and output logic coupled to the W staged pipeline to determine the output prior to all W stages completing execution and to output the median.

Abstract: A method, apparatus and system for performing a demosaic operation are described. In one embodiment, the apparatus comprises: a plurality of interpolation modules to perform a plurality of interpolation operations to generate color pixel values of a first color for a plurality of pixel locations in an image region that do not have color pixel values of the first color; a first module to generate a set of color pixel values of the first color for the image region, one or more color pixel values in the set of pixel values being generated based on color pixel values of the first color from one of the plurality of interpolation modules; and a second module to select the one interpolation module based on an interpolation direction determined by color intensity gradient calculations that involve pixel values of the first color and at least one other color.

Abstract: A scalable rank filter and method for performing rank filtering are disclosed. In one embodiment, the rank filter comprises a W staged pipeline with W stages to receive N input data samples and operable to generate an output based on the N input data samples as a result of the W stages completing execution, where W is a bit length of the inputs and W and N are integers greater than two; and output logic coupled to the W staged pipeline to determine the output prior to all W stages completing execution and to output the median.

Abstract: An image forming apparatus includes: a main body storage portion that stores control information which defines a control condition of an option device; and a main body control portion that makes a printing portion perform operation in accordance with the control condition of the option device, and based on the control condition of the option device, gives an operation instruction to an option control portion, wherein in a case where an unsuitableness error, the option control portion transmits the control information stored in the option storage portion to the main body control portion, and the main body control portion updates the control information such that the control information stored in the main body storage portion becomes the control information suitable for specifications of the option device.

Abstract: A person extraction unit extracts a person from an image input into an image input unit. An attribute extraction unit obtains an attribute of the person extracted by the person extraction unit. A motion path creation unit creates a motion path of the person from positional information within the image of the person extracted by the person extraction unit. A measurement reference coordinate setting unit sets a measurement line (a first measurement line to a third measurement line) for the motion path corresponding to the person according to the attribute of the person extracted by the attribute extraction unit. A people number counting unit counts the number of people based on positional relation between the motion path of the person created by the motion path creation unit and the measurement line set within the image.

Abstract: A semiconductor memory device according to an embodiment includes a memory cell array including memory cells, the memory cells each configured having a current rectifier element and a variable resistance element connected in series therein. Each of the memory cells has formed on a side surface thereof: a first insulating film provided on a side surface of the current rectifier element and the variable resistance element and having a composition ratio of a non-silicon element to silicon which is a first value; a silicon oxide film provided on a side surface of the first insulating film; and a second insulating film provided on a side surface of the silicon oxide film and having a composition ratio of a non-silicon element to silicon which is a second value. The first value is smaller than the second value.

Abstract: A source and drain electrode layer (3s/3d) of an oxide TFT element (3) is formed by a first conductive layer. A gate electrode (3g) of the oxide TFT element (3) and a gate electrode (5g) of an a-Si TFT element (5) are formed by a single conductive layer, that is, a second conductive layer. A source and drain electrode layer (5s/5d) of the a-Si TFT element (5) is formed by a third conductive layer. The third conductive layer is formed above the second conductive layer in a thickness direction in which each conductive layer is stacked on an insulating substrate (2). Further, the first conductive layer is formed below the second conductive layer in the thickness direction. Therefore, it is possible to provide a circuit board that can have an improved degree of integration of transistor elements formed on the insulating substrate.

Abstract: According to one embodiment, a first transistor includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a first gate insulating film, and a first gate electrode. The first semiconductor region is provided in a first semiconductor layer extending in a second direction substantially perpendicular to the surface of the semiconductor substrate from the first line. The second semiconductor region is provided above the first semiconductor region in the first semiconductor layer. The third semiconductor region is provided above the second semiconductor region in the first semiconductor layer. The first gate insulating film covers a first side face of the first semiconductor layer. The first gate electrode covers the first side face of the first semiconductor layer through the first gate insulating film. The first transistor has an asymmetrical structure with respect to a center face of the second semiconductor region in the second direction.

Abstract: To provide a human attribute estimation system capable of improving estimation accuracy irrespective of an environment-dependent attribute is provided. An age/gender estimation system as a human attribute estimation system is provided with: a monitoring camera photographing a human targeted by attribute estimation and generating an image; an age/gender estimating section estimating an attribute of the human shown in the image generated by the monitoring camera using an estimation parameter; and an environment-dependent attribute specifying section specifying an environment-dependent attribute, which is an attribute dependent on an installation environment of the monitoring camera.

Abstract: An image forming apparatus includes: a main body storage portion that stores control information which defines a control condition of an option device; and a main body control portion that makes a printing portion perform operation in accordance with the control condition of the option device, and based on the control condition of the option device, gives an operation instruction to an option control portion, wherein in a case where an unsuitableness error, the option control portion transmits the control information stored in the option storage portion to the main body control portion, and the main body control portion updates the control information such that the control information stored in the main body storage portion becomes the control information suitable for specifications of the option device.

Abstract: According to one embodiment, a first transistor includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a first gate insulating film, and a first gate electrode. The first semiconductor region is provided in a first semiconductor layer extending in a second direction substantially perpendicular to the surface of the semiconductor substrate from the first line. The second semiconductor region is provided above the first semiconductor region in the first semiconductor layer. The third semiconductor region is provided above the second semiconductor region in the first semiconductor layer. The first gate insulating film covers a first side face of the first semiconductor layer. The first gate electrode covers the first side face of the first semiconductor layer through the first gate insulating film. The first transistor has an asymmetrical structure with respect to a center face of the second semiconductor region in the second direction.