Patents by Inventor Jun-sik Hwang

Jun-sik Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110075879
    Abstract: A micro speaker includes a substrate having a cavity formed therein, a diaphragm formed on the substrate overlapping the cavity. The diaphragm includes a first vibration membrane formed in a first area corresponding to a center portion of the cavity and a second vibration membrane formed in a second area corresponding to an edge portion of the cavity and formed of material different from that used for the first vibration membrane. A piezoelectric actuator is formed including a first electrode layer formed on the first vibration membrane, a piezoelectric layer formed on the first electrode layer, and a second electrode layer formed on the piezoelectric layer, and first and second curved lead wires, respectively connected to the first and second electrode layers across the second area, which are symmetrical to the center of the piezoelectric actuator.
    Type: Application
    Filed: March 31, 2010
    Publication date: March 31, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-kyun KIM, Byung-gil JEONG, Seok-whan CHUNG, Jun-sik HWANG
  • Publication number: 20110064250
    Abstract: A piezoelectric micro speaker and a method of manufacturing the same are provided. The piezoelectric micro speaker includes a substrate having a cavity formed therein and a diaphragm that is disposed on the substrate that overlaps the cavity. A plurality of first vibrating membranes having concentric annular ring shapes are disposed in a first region of the diaphragm corresponding to a center of the cavity. A second vibrating membrane including a different material from that of the first vibrating membranes is formed in the second region of the diaphragm corresponding to an edge of the cavity. A piezoelectric actuator for vibrating the first vibrating membranes is formed on and between the concentric annular rings of the first vibrating membranes.
    Type: Application
    Filed: February 11, 2010
    Publication date: March 17, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Byung-gil JEONG, Dong-kyun KIM, Seok-whan CHUNG, Jun-sik HWANG
  • Publication number: 20110051985
    Abstract: Provided are a piezoelectric micro speaker having a piston diaphragm and a method of manufacturing the piezoelectric micro speaker. The piezoelectric micro speaker includes: a substrate having a cavity formed therein; a vibrating membrane that is disposed on the substrate and covers at least a center part of the cavity; a piezoelectric actuator disposed on the vibrating membrane so as to vibrate the vibrating membrane; and a piston diaphragm that is disposed in the cavity and performs piston motion by vibration of the vibrating membrane. When the vibrating membrane vibrates by the piezoelectric actuator, the piston diaphragm, which is connected to the vibrating membrane through a piston bar, performs a piston motion in the cavity.
    Type: Application
    Filed: January 29, 2010
    Publication date: March 3, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jun-sik HWANG, Dong-kyun KIM, Seok-whan CHUNG, Byung-gil JEONG
  • Patent number: 7893792
    Abstract: A high-integrated duplexer and a fabrication method thereof. The duplexer has a first filter to pass a signal of a transmitted frequency band, a second filter to pass a signal of a received frequency band, an embedded PCB having the first and second filters bonded on a certain area of a surface of an upper side in a predetermined distance from each other, and an isolation part to prevent a signal interference between the first and second filters, and a packaging substrate to package the entire upper side of the embedded PCB so that the packaging substrate is located above and separated from the first and second filters by a predetermined distance. The fabricated high-integrated duplexer has a small size and high performance.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: February 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-sik Hwang, Yun-kwon Park, Il-jong Song, Byeoung-ju Ha
  • Patent number: 7793395
    Abstract: A film bulk acoustic resonator, and a method for manufacturing the same. The film bulk acoustic resonator includes a substrate, a protection layer vapor-deposited on the substrate, a membrane vapor-deposited on the protection layer and at a predetermined distance from an upper side of the substrate, and a laminated resonance part vapor-deposited on the membrane. Further, the manufacturing method includes vapor-depositing a membrane on a substrate, forming protection layers on both sides of the membrane, vapor-depositing a laminated resonance part on the membrane, and forming an air gap by removing a part of the substrate disposed between the protection layers. Accordingly, the membrane can be formed in a simple structure and without stress, and the whole manufacturing process is simplified.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: September 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byeoung-ju Ha, Yun-kwon Park, In-sang Song, Il-jong Song, Jong-seok Kim, Duck-hwan Kim, Jun-sik Hwang
  • Patent number: 7755151
    Abstract: A wafer level package for a surface acoustic wave device and a fabrication method thereof include a SAW device formed with a SAW element on an upper surface of a device wafer; a cap wafer joined on an upper part of the SAW element; a cavity part housing the SAW element between the cap wafer and the SAW device; a cap pad formed on an upper surface of the cap wafer; and a metal line formed to penetrate through the cap wafer to electrically connect the cap pad and the SAW element, the device wafer and the cap wafer being made of the same materials.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: July 13, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-hyuk Lim, Jun-sik Hwang, Woon-bae Kim, Suk-jin Ham, Jong-oh Kwon, Moon-chul Lee, Chang-youl Moon
  • Patent number: 7675154
    Abstract: A radio frequency (RF) module and a multi RF module including the same include a base substrate, a first element capable of processing RF signals formed on the base substrate, a second element capable of processing RF signals separated from and disposed over the first element, a cap substrate coupled with the base substrate to encapsulate the first and second elements including a plurality of through electrodes that electrically connect the first and second elements to the outside, and a bonding pad that encapsulates and joins the base substrate and the cap substrate and electrically connects the first and second elements to the through electrodes.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: March 9, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seog-woo Hong, In-sang Song, Byeong-ju Ha, Hae-seok Park, Jun-sik Hwang, Joo-ho Lee
  • Publication number: 20100053083
    Abstract: A portable electronic device including a first input/output unit including a monostable display element, a second input/output unit including a bistable display element, a main setting unit configured to selectively set either one of the first and second input/output units as a main input/output unit and the other one of the first and second input/output units as a sub input/output unit, and a conversion unit configured to convert the sub input/output unit into a touch pad for inputting a command on the main input/output unit.
    Type: Application
    Filed: August 28, 2009
    Publication date: March 4, 2010
    Inventor: Jun-Sik HWANG
  • Patent number: 7626258
    Abstract: A cap wafer, fabrication method, and a semiconductor chip are provided. The cap wafer includes a cap wafer substrate; a penetrated electrode formed to penetrate the cap wafer substrate; and an electrode pad connected with a lower portion of the penetrated electrode on a lower surface of the cap wafer substrate, wherein the penetrated electrode has an oblique section which gradually widens from an upper surface to the lower surface of the cap wafer substrate. The fabrication method includes forming an oblique-via hole on a lower surface of a cap wafer substrate, the oblique-via hole having an oblique section which gradually narrows in a direction moving away from the lower surface of the cap wafer substrate; and forming a penetrated electrode in the oblique-via hole. The semiconductor chip includes a base wafer; a cap wafer; a cavity; a penetrated electrode; and a pad bonding layer.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: December 1, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ji-hyuk Lim, Jun-sik Hwang, Woon-bae Kim
  • Patent number: 7579685
    Abstract: A wafer level packaging cap and method thereof for a wafer level packaging are provided. The wafer level packaging cap covering a device wafer with a device thereon, includes a cap wafer having on a bottom surface a cavity providing a space for receiving the device, and integrally combined with the device wafer, a plurality of metal lines formed on the bottom surface of the cap wafer to correspond to a plurality of device pads formed on the device wafer to be electrically connected to the device, a plurality of buffer portions connected to the plurality of metal lines and comprising a buffer wafer with a plurality of grooves and a metal filled in the plurality of grooves, a plurality of connection rods electrically connected to the plurality of buffer portions and penetrating the cap wafer from a top portion of the buffer portion, and a plurality of cap pads formed on a top surface of the cap wafer and electrically connected to a plurality of connection rods.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: August 25, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-chul Lee, Woon-bae Kim, Kae-dong Back, Qian Wang, Jun-sik Hwang, Kyu-dong Jung
  • Patent number: 7545017
    Abstract: A wafer level package for a surface acoustic wave (SAW) device and a fabrication method thereof. The SAW device wafer level package includes a SAW device in which a SAW element is formed on a top surface of a device wafer, a cap wafer which is bonded with a top surface of the SAW device and has a viahole penetrating the cap wafer, and a conductive member to fill a part of the viahole. The viahole has a first via portion and a second via portion, the first via portion has a gradually smaller diameter from a bottom surface of the cap wafer until a certain depth, and the second via portion has a gradually greater diameter from the first via portion until a top surface of the cap wafer.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: June 9, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-chul Lee, Jun-sik Hwang, Ji-hyuk Lim, Woon-bae Kim
  • Patent number: 7510968
    Abstract: A cap for a semiconductor device package, including a body formed at a predetermined thickness with a cavity. The cap further includes a first seed layer formed on an inner circumference of a first via hole formed at a predetermined depth from the cavity formation surface of the body, a second seed layer formed on an inner circumference of a second via hole formed at a predetermined depth from the opposite surface to the cavity formation surface of the body, and plating materials filled in the first via hole and the second via hole.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: March 31, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-chul Lee, Jong-oh Kwon, Kae-dong Back, Qian Wang, Jun-sik Hwang, Kyu-dong Jung
  • Patent number: 7452809
    Abstract: A fabrication method of a packaging substrate includes the steps of: forming a recess by etching a predetermined area of a lower surface of a substrate; depositing a seed layer on an upper surface of the substrate; in the recess, etching predetermined area(s) of the lower surface of the substrate and forming at least one via hole that reaches the seed layer; and plating the inside of the via hole by using the seed layer, and forming electrode(s) for electrically coupling the upper and lower parts of the substrate. First and second pads coupled to the electrode(s) may be formed on the upper and lower parts of the substrate, respectively. Thus, using the second pads as bonding materials, the packaging process becomes easier, which resultantly simplifies the fabrication process of the packaging substrate and the packaging process.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: November 18, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-chul Lee, Woon-bae Kim, Jun-sik Hwang, Chang-youl Moon
  • Patent number: 7449366
    Abstract: A wafer level packaging cap for covering a device wafer with a device thereon and a fabrication method thereof are provided. The method includes operations of forming a plurality of connection grooves on a wafer, forming a seed layer on the connection grooves, forming connection parts by filling the connection grooves with a metal material, forming cap pads on a top surface of the wafer to be electrically connected to the connection parts, bonding a supporting film with the top surface of the wafer on which the cap pads are formed, forming a cavity on a bottom surface of the wafer to expose the connection parts through the cavity, and forming metal lines on the bottom surface of the wafer to be electrically connected to the connection parts.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: November 11, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-chul Lee, Jong-oh Kwon, Woon-bae Kim, Ji-hyuk Lim, Suk-jin Ham, Jun-sik Hwang, Chang-youl Moon
  • Publication number: 20080213966
    Abstract: An inductor embedded in a substrate, including a substrate, a coil electrode formed by filling a metal in a spiral hole formed on the substrate, an insulation layer formed on the substrate, and an external connection pad formed on the insulation layer to be connected to the coil electrode. The inductor-embedded substrate can be used as a cap for a micro device package by forming a cavity on its bottom surface.
    Type: Application
    Filed: February 8, 2008
    Publication date: September 4, 2008
    Inventors: Moon-chul LEE, Jong-oh Kwon, Woon-bae Kim, Jea-shik Shin, Jun-sik Hwang, Eun-sung Lee
  • Patent number: 7417525
    Abstract: An inductor is provided which includes a plurality of via holes vertically passing through a substrate, the substrate having insulating properties, vertical conductive portions filling the via holes, and horizontal conductive portions connecting each individual vertical conductive portions at the top and the bottom of the substrate to form a single coil structure with the vertical conductive portions.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: August 26, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon Chul Lee, Jong Oh Kwon, Woon Bae Kim, Jun Sik Hwang, Chang youl Moon, In Sang Song
  • Patent number: 7408257
    Abstract: A packaging chip in which a circuit module is packaged and a method of packaging a circuit module are provided. The packaging chip includes a base wafer; a circuit module on the base wafer; a packaging wafer having a cavity and combined with the base wafer so that the circuit module fits inside the cavity; a connecting electrode connecting upper and lower surfaces of the cavity; and a seed layer between the connecting electrode and the packaging wafer. The method includes etching a lower surface of the packaging wafer to form a cavity, stacking a metal layer in an area of the lower surface, combining the base wafer with the packaging wafer, polishing the packaging wafer, forming a viahole through the packaging wafer, stacking a seed layer on the packaging wafer, plating the inside of the viahole, removing the seed layer and forming an electrode.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: August 5, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu-dong Jung, Woon-bae Kim, In-sang Song, Moon-chul Lee, Jun-sik Hwang, Suk-jin Ham
  • Patent number: 7408434
    Abstract: An inductor embedded in a substrate, including a substrate, a coil electrode formed by filling a metal in a spiral hole formed on the substrate, an insulation layer formed on the substrate, and an external connection pad formed on the insulation layer to be connected to the coil electrode. The inductor-embedded substrate can be used as a cap for a micro device package by forming a cavity on its bottom surface.
    Type: Grant
    Filed: April 10, 2006
    Date of Patent: August 5, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-chul Lee, Jong-oh Kwon, Woon-bae Kim, Jea-shik Shin, Jun-sik Hwang, Eun-sung Lee
  • Patent number: 7372261
    Abstract: A printed circuit board integrated with a two-axis fluxgate sensor includes a first soft magnetic core formed lengthwise in a first axial direction, a first excitation coil formed of a metal film and wound around the first soft magnetic core, a first pick-up coil formed of a metal film and wound around the first soft magnetic core and the first excitation coil, a second soft magnetic core formed lengthwise in a second axial direction, the second axial direction being perpendicular to the first axial direction, a second excitation coil formed of a metal film and wound around the second soft magnetic core, a second pick-up coil formed of a metal film and wound around the second soft magnetic core and the second excitation coil, and a pad for establishing conductivity between the first and second excitation coils and the first and second pick-up coils and an external circuit.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: May 13, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Won-youl Choi, Sang-on Choi, Jun-sik Hwang, Myung-sam Kang
  • Publication number: 20080067664
    Abstract: A cap wafer, fabrication method, and a semiconductor chip are provided. The cap wafer includes a cap wafer substrate; a penetrated electrode formed to penetrate the cap wafer substrate; and an electrode pad connected with a lower portion of the penetrated electrode on a lower surface of the cap wafer substrate, wherein the penetrated electrode has an oblique section which gradually widens from an upper surface to the lower surface of the cap wafer substrate. The fabrication method includes forming an oblique-via hole on a lower surface of a cap wafer substrate, the oblique-via hole having an oblique section which gradually narrows in a direction moving away from the lower surface of the cap wafer substrate; and forming a penetrated electrode in the oblique-via hole. The semiconductor chip includes a base wafer; a cap wafer; a cavity; a penetrated electrode; and a pad bonding layer.
    Type: Application
    Filed: January 24, 2007
    Publication date: March 20, 2008
    Applicant: Samsung Electro-Mechanics Co., LTD.
    Inventors: Ji-hyuk Lim, Jun-sik Hwang, Woon-bae Kim