Abstract: The present invention is related to a novel positive electrode active material for lithium-ion battery. The positive electrode active material is expressed by the following formula: Li1.2NixMn0.8-x-yZnyO2, wherein x and y satisfy 0<x?0.8 and 0<y?0.1. In addition, the present invention provides a method of manufacturing the positive electrode active material. The present invention further provides a lithium-ion battery which uses said positive electrode active material.

Abstract: An optical device and the prism module thereof are provided. The prism module includes a first prism, a second prism, and a third prism. The second prism is disposed beside the first prism. The third prism is adhered to the second prism. First light enters the first prism, is reflected plural times in the first prism, enters the second prism, and is emitted from the second prism. Second light enters the second prism, is reflected plural times in the second prism, and is emitted from the second prism. Third light sequentially passes through the third prism and the second prism, enters the first prism, is reflected plural times in the first prism, and is emitted from the first prism.

Abstract: A supported metallocene catalyst includes a carrier and a metallocene component. The carrier includes an inorganic oxide particle and an alkyl aluminoxane material. The inorganic oxide particle includes at least one inorganic oxide compound selected from the group consisting of an oxide of Group 3A and an oxide of Group 4A. The alkyl aluminoxane material includes an alkyl aluminoxane compound and an alkyl aluminum compound that is present in amount ranging from greater than 0.01 wt % to less than 14 wt % base on 100 wt % of the alkyl aluminoxane material. The metallocene component is supported on the carrier, and includes one of a metallocene compound containing a metal from Group 3B, a metallocene compound containing a metal from Group 4B, and a combination thereof. A method for preparing the supported metallocene catalyst and a method for preparing polyolefin using the supported metallocene catalyst are also disclosed.

Abstract: The disclosure provides a power management method. The power management method is applicable to an electronic device. The electronic device is electrically coupled to an adapter, and includes a system and a battery. The adapter has a feed power. The battery has a discharge power. The power management method of the disclosure includes: reading a power value of the battery; determining a state of the system; and discharging power to the system, when the system is in a power-on state and the power value is greater than a charging stopping value, by using the battery, and controlling, according to the discharge power and the feed power, the adapter to selectively supply power to the system. The disclosure further provides an electronic device using the power management method.

Abstract: An electronic package is provided. The electronic package includes a carrier, a first electronic component, a bonding element, and a barrier. The carrier has a conductive layer. The first electronic component is disposed adjacent to the carrier and has a first terminal and a second terminal. The bonding element is configured to electrically connect the conductive layer to the first terminal. The barrier is configured to avoid electrically bypassing an electrical path in the first electronic component and between the first terminal and the second terminal.

Abstract: An electronic package is provided. The electronic package includes a carrier, a first electronic component, a bonding element, and a barrier. The carrier has a conductive layer. The first electronic component is disposed adjacent to the carrier and has a first terminal and a second terminal. The bonding element is configured to electrically connect the conductive layer to the first terminal. The barrier is configured to avoid electrically bypassing an electrical path in the first electronic component and between the first terminal and the second terminal.

Abstract: A semiconductor package structure and a method of manufacturing the same are provided. A semiconductor package structure includes a first electronic component and a light emitter. The photonic component includes a substrate and a first port. The light emitter is disposed over the substrate of the photonic component. The light emitter is configured to emit light through the first port. A coupling loss between the first port of the photonic component and the light emitter is less than 3 dB.

Abstract: A display system and a method for forming an output buffer of a source driver are provided. The display system includes a plurality of pixels coupled to a plurality of gate lines and a plurality of source lines. A gate driver provides a plurality of gate signals to the plurality of gate lines. A source driver provides a plurality of image signals to the plurality of source lines. The source driver includes an output buffer. The output buffer includes a transistor. The transistor is either a native transistor device, a depletion-mode transistor device or a low-threshold transistor device.

Abstract: A display system and a method for forming an output buffer of a source driver are provided. The display system includes a plurality of pixels coupled to a plurality of gate lines and a plurality of source lines. A gate driver provides a plurality of gate signals to the plurality of gate lines. A source driver provides a plurality of image signals to the plurality of source lines. The source driver includes an output buffer. The output buffer includes a transistor. The transistor is either a native transistor device, a depletion-mode transistor device or a low-threshold transistor device.

Abstract: A display system and a method for forming an output buffer of a source driver are provided. The display system includes a plurality of pixels coupled to a plurality of gate lines and a plurality of source lines. A gate driver provides a plurality of gate signals to the plurality of gate lines. A source driver provides a plurality of image signals to the plurality of source lines. The source driver includes an output buffer. The output buffer includes a transistor. The transistor is either a native transistor device, a depletion-mode transistor device or a low-threshold transistor device.

Abstract: A semiconductor structure includes a first high-voltage MOS device region having a first light doping region in a substrate. The conductive type of the substrate is similar to that of the first light doping region. A first well is in the substrate. The first well substantially contacts a side of the first light doping region and does not extend under the first light doping region. The conductive type of the first well is opposite that of the first light doping region. A first gate stack is disposed on a part of the first light doping region and a first well. A first heavy doping region is disposed in the first well and the first light doping region at two sides of the first gate stack. The conductive type of the first heavy doping region is opposite that of the first light doping region.

Abstract: The invention provides a semiconductor device, including a buried oxide layer disposed on a substrate. A semiconductor layer is disposed on the buried oxide layer. A first well is disposed in the semiconductor layer. A second well and a third well are disposed to opposite sides of the first well and separated from the first well. An isolation feature covers the first well and the third well. A poly field plate is disposed on the isolation feature and over the semiconductor layer between the first well and the third well. A first anode doped region is disposed on the second well. A second anode doped region and a third anode doped region are disposed on the second well. The second anode doped region is positioned directly on the third anode doped region. A first cathode doped region is coupled to the third well.

Abstract: A semiconductor structure includes a first high-voltage MOS device region having a first light doping region in a substrate. The conductive type of the substrate is similar to that of the first light doping region. A first well is in the substrate. The first well substantially contacts a side of the first light doping region and does not extend under the first light doping region. The conductive type of the first well is opposite that of the first light doping region. A first gate stack is disposed on a part of the first light doping region and a first well. A first heavy doping region is disposed in the first well and the first light doping region at two sides of the first gate stack. The conductive type of the first heavy doping region is opposite that of the first light doping region.

Abstract: A semiconductor structure is provided, which includes a first high-voltage MOS device region having a first well and a first light-doping region in a part of the first well, wherein the conductive type of the first well and the conductive type of the first light-doping region are opposite. The first high-voltage MOS device region also includes a first gate stack on a part of the first well and a part of the first light-doping region, and first heavy-doping regions in the first well and the first light-doping region at two sides of the gate stack, wherein the conductive type of the first heavy-doping region and the conductive type of the first well are the same. The first light-doping region between the first well and the first heavy-doping regions is a channel region of the first high-voltage MOS device region.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate having a first conductivity type. An epitaxial layer having the first conductivity type is disposed on the substrate, and a trench is formed in the epitaxial layer. A polysilicon layer having the first conductivity type fills the trench, and a first doping region having a second conductivity type that is different from the first conductivity type is disposed in the epitaxial layer and on sidewalls of the trench. A method for forming the semiconductor device is also provided.

Abstract: A Schottky diode is provided, which includes a well of a first conductive type and a lightly doped region of a second conductive type on the well, wherein the first conductive type is opposite to the second conductive type. The Schottky diode includes a heavily doped region of the second conductive type on the well, and a gate structure on a part of the lightly doped region. The gate structure includes a gate electrode and a gate dielectric layer. The lightly doped region not covered by the gate structure and the heavily doped region are disposed at two opposite sides of the gate structure, respectively. The Schottky diode includes a first contact electrically connecting the heavily doped region and a first electrode, a second contact electrically connecting the gate electrode and a second electrode, and a third contact electrically connecting the lightly doped region and the second electrode.

Abstract: A semiconductor device and a method for forming the same are provided. The semiconductor device includes a substrate having a first conductive type and an epitaxial layer having the first conductive type disposed over the substrate, wherein a trench is formed in the epitaxial layer. The semiconductor device also includes a polysilicon layer having the first conductive type disposed in the trench. The semiconductor device further includes a doped region having a second conductive type disposed along a sidewall and a bottom of the trench in the epitaxial layer, wherein a thickness along the sidewall and the bottom of the trench is uniform, and wherein the thickness is a vertical distance between the outermost side of the trench to the sidewall or the bottom of the trench.

Abstract: A liquid-crystal film includes a liquid crystal mixture with the gel state. The liquid crystal mixture is formed of at least one ?-conjugated polymer gelator and a liquid-crystal unit. The concentration of the at least one ?-conjugated polymer gelator is 0.05-5 wt %. The concentration of the liquid-crystal unit is 95-99.95 wt %. The at least one ?-conjugated polymer gelator is aligned through the liquid-crystal unit and combined together to form a plurality of fibers. The fibers include at least 60% arranged regularly in direction and some of the fibers are linked with one another to form a network structure.

Abstract: An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.

Abstract: A method of fabricating a solar cell is provided. A first type semiconductor substrate having a first surface and a second surface is provided. A second type doped diffusion region is formed in parts of the first type semiconductor substrate. The second type doped diffusion region extends within the first type semiconductor substrate from the first surface. An anti-reflection coating (ARC) in contact with second type doped diffusion region is formed over the first surface. A conductive paste including conductive particles and dopant is formed over the ARC. A co-firing process for enabling the conductive paste to penetrate the ARC to form a first contact conductor embedded in the ARC is performed. During the co-firing process, the dopant diffuses into the second type doped diffusion region and a second type heavily doped diffusion region is formed. A second contact conductor is formed on the second surface.