Abstract: An apparatus of processing a semiconductor substrate include a chuck, a holder, a liquid supplying system and a positive pressure unit. The chuck has a principal surface and at least a hole formed thereon. The holder is capable of holding a semiconductor substrate at a position above the principal surface. The liquid supplying system is configured to provide a liquid film onto the principal surface through the hole. The positive pressure unit is configured for providing a gas flow to a space over the chuck. A method of processing a semiconductor substrate is disclosed herein as well.

Abstract: A nozzle for emitting a fluid comprises a channel, a light source and a light sensor. The channel is configured to flow the fluid. The light source is configured to emit light towards a surface on which the fluid is applied and the light sensor is configured to receive reflected light from the surface.

Abstract: A semiconductor structure for isolating a first circuit and a second circuit of various operating voltages includes a first isolation ring surrounding the first and second circuits on a semiconductor substrate. A buried layer continuously extending underneath the first and second circuits is formed on the semiconductor substrate, wherein the buried layer interfaces with the first isolation ring for isolating the first and second circuits from a backside bias of the semiconductor substrate. An ion enhanced isolation layer is interposed between the buried layer and well regions on which devices of the first and second circuits are formed, wherein the ion enhanced isolation layer is doped with impurities of a polarity type different from that of the buried layer.

Abstract: A semiconductor device includes multiple low voltage N-well (LVNW) areas biased at different potentials and isolated from a substrate by a common N+ buried layer (NBL) and at least one high voltage N-well (HVNW) area. The LVNW areas are coupled to the common, subjacent NBL through a common P+ buried layer (PBL). The method for forming the substrate usable in a semiconductor device includes forming the NBL in a designated low voltage area of a negatively biased P-type semiconductor substrate, forming the PBL in a section of the NBL area by implanting P-type impurity ions such as indium into the PBL, and growing a P-type epitaxial layer over the PBL using conditions that cause the P-type impurity ions to diffuse into the P-type epitaxial layer such that the PBL extends into the NBL. Low-voltage P-well areas are also formed in the P-type epitaxial layer and contact the PBL.

Abstract: A high-voltage transistor device with an interlayer dielectric (ILD) etch stop layer for use in a subsequent contact hole process is provided. The etch stop layer is a high-resistivity film having a resistivity greater than 10 ohm-cm, thus leakage is prevented and breakdown voltage is improved when driving a high voltage greater than 5V at the gate site. A method for fabricating the high-voltage device is compatible with current low-voltage device processes and middle-voltage device processes.

Abstract: A method is provided for forming at least three devices with different gate oxide thicknesses and different associated operating voltages, in the same integrated circuit device. The method includes forming a plurality of gate oxides with different thicknesses in high voltage and low voltage areas in the same integrated circuit device. A dry etching operation is used to remove the relatively thick gate oxide from the high voltage area using photoresist masking of the low voltage area and a hard mask in the high voltage area, to mask the gate oxide films. A wet etching procedure is then used to remove the gate oxide film from the low voltage areas. The hard mask may be formed over a polysilicon structure.

Abstract: Method and apparatus for a semiconductor device including high voltage MOS transistors is described. A substrate is provided with a low voltage and a high voltage region separated one from the other. Isolation regions containing an insulator are formed including at least one formed within one of said wells within the high voltage region. The angle of the transition from the active areas to the isolation regions in the high voltage device region is greater than a predetermined angle, in some embodiments it is greater than 40 degrees from vertical. In some embodiments the isolation regions are formed using shallow trench isolation techniques. In alternative embodiments the isolation regions are formed using field oxide formed by local oxidation of silicon techniques.

Abstract: A semiconductor structure includes an isolation ring disposed on a semiconductor substrate, surrounding first and second circuit areas. A buried isolation layer is continuously extended through the first circuit area and the second circuit area, in the semiconductor substrate. The buried isolation layer interfaces with the isolation ring, thereby isolating the first and second circuit areas from a backside bias of the semiconductor substrate. An ion enhanced isolation layer separates the first well in the first circuit area and the second well in the second circuit areas from the isolation ring and the buried isolation layer, thereby preventing punch-through between the wells of the circuit areas and the buried isolation layer.

Abstract: A semiconductor device includes multiple low voltage N-well (LVNW) areas biased at different potentials and isolated from a substrate by a common N+ buried layer (NBL) and at least one high voltage N-well (HVNW) area. The LVNW areas are coupled to the common, subjacent NBL through a common P+ buried layer (PBL). The method for forming the substrate usable in a semiconductor device includes forming the NBL in a designated low voltage area of a negatively biased P-type semiconductor substrate, forming the PBL in a section of the NBL area by implanting P-type impurity ions such as indium into the PBL, and growing a P-type epitaxial layer over the PBL using conditions that cause the P-type impurity ions to diffuse into the P-type epitaxial layer such that the PBL extends into the NBL. Low-voltage P-well areas are also formed in the P-type epitaxial layer and contact the PBL.

Abstract: A semiconductor structure includes an isolation ring disposed on a semiconductor substrate, surrounding first and second circuit areas. A buried isolation layer is continuously extended through the first circuit area and the second circuit area, in the semiconductor substrate. The buried isolation layer interfaces with the isolation ring, thereby isolating the first and second circuit areas from a backside bias of the semiconductor substrate. An ion enhanced isolation layer separates the first well in the first circuit area and the second well in the second circuit areas from the isolation ring and the buried isolation layer, thereby preventing punch-through between the wells of the circuit areas and the buried isolation layer.

Abstract: A method and system for implementing a variable function circuit within a single semiconductor chip. The semiconductor chip can be configured as a single circuit that provides varying functions according to extrinsic conditions. The single circuit can be permitted to be switched between a particular function and a different particular function, thereby promoting a decreased complexity in circuit design and a decrease in physical dimensions necessary to manufacture the semiconductor chip. Additionally, at least one portion of the semiconductor chip may be designated to the particular function and at least one other portion of the semiconductor chip to the different particular function. The semiconductor chip may thus act as a function switch.

Abstract: Provided are a method and an apparatus to reduce/detect a presence of a gas in fluids employed in semiconductor manufacturing processes. One embodiment of the invention includes creating a flow of cleaning fluids and impinging electromagnetic radiation upon a region of the flow. The electromagnetic radiation is sensitive to phase state changes in the flow, i.e., changes between liquid and gas, so that air bubbles in the liquid flow may be detected. The electromagnetic radiation is sensed and a signal is produced in response to phase state changes in the flow. The flow of the cleaning fluid is terminated in response to the signal. In accordance with another embodiment a system is provided that operates in accordance with the method.

Abstract: A method and system for implementing a variable function circuit within a single semiconductor chip. The semiconductor chip can be configured as a single circuit that provides varying functions according to extrinsic conditions. The single circuit can be permitted to be switched between a particular function and a different particular function, thereby promoting a decreased complexity in circuit design and a decrease in physical dimensions necessary to manufacture the semiconductor chip. Additionally, at least one portion of the semiconductor chip may be designated to the particular function and at least one other portion of the semiconductor chip to the different particular function. The semiconductor chip may thus act as a function switch.