Patents by Inventor Jun-Yao Huang

Jun-Yao Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7816194
    Abstract: A method of manufacturing thin film transistor is provided, in which the method of manufacturing includes a new etching process of island semiconductor. The new etching process of island semiconductor is controlled by a flow rate of etching gas and a regulation of etching power. When etching the island semiconductor, a part of gate insulation layer exposed out of the island semiconductor is etched at the same time. Consequently, the thickness of gate insulation layer over the storage capacitance electrode is reduced, the distance between the pixel electrode and the storage capacitance electrode is decreased, and the storage capacitance of pixel is increased. Finally, the width of storage capacitance electrode is reduced appropriately and the aperture ratio of product is increased.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: October 19, 2010
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Ya-Ju Lu, Jun-Yao Huang, Ming-Chu Chen, Yu-Fang Wang, Chun-Jen Ma
  • Publication number: 20100227442
    Abstract: A method of manufacturing thin film transistor is provided, in which the method of manufacturing includes a new etching process of island semiconductor. The new etching process of island semiconductor is controlled by a flow rate of etching gas and a regulation of etching power. When etching the island semiconductor, a part of gate insulation layer exposed out of the island semiconductor is etched at the same time. Consequently, the thickness of gate insulation layer over the storage capacitance electrode is reduced, the distance between the pixel electrode and the storage capacitance electrode is decreased, and the storage capacitance of pixel is increased. Finally, the width of storage capacitance electrode is reduced appropriately and the aperture ratio of product is increased.
    Type: Application
    Filed: August 20, 2009
    Publication date: September 9, 2010
    Applicant: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Ya-Ju Lu, Jun-Yao Huang, Ming-Chu Chen, Yu-Fang Wang, Chun-Jen Ma
  • Publication number: 20100103138
    Abstract: A manufacture method and structure of a curved capacitive touch panel is disclosed. A flat flexible printed circuit board (FPCB) with capacitive touch sensing/detecting capability is provided, followed by subjecting the flat FPCB to compressing molding to form a curved FPCB. Subsequently, a curved substrate is provided, wherein an outer curved surface of the curved FPCB is bonded to an inner curved surface of the substrate, thereby forming the curved capacitive touch panel.
    Type: Application
    Filed: July 24, 2009
    Publication date: April 29, 2010
    Applicant: TPK TOUCH SOLUTIONS INC.
    Inventors: JUN-YAO HUANG, PO-PIN HUNG
  • Patent number: 7675088
    Abstract: A thin film transistor array substrate and the manufacturing method thereof are disclosed herein. A first patterned metal layer, an insulating layer, a patterned layer, and a second patterned metal layer are sequentially formed on a substrate. Then, a number of scan lines and a number of source lines are disposed on the substrate and define a number of pixel regions. A number of the storage capacitance lines are disposed on the substrate in a direction extending along the scan lines and across the pixel regions, wherein each of the storage capacitance lines is essentially perpendicular to each of the source lines and to form a cross portion. A number of patterned thin films are disposed on the storage capacitance lines and above the cross portion.
    Type: Grant
    Filed: October 22, 2008
    Date of Patent: March 9, 2010
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Jun-Yao Huang, Kuang-Cheng Fu, Jen-Chieh Lin, Chin-Lung Yeh
  • Publication number: 20090061553
    Abstract: A thin film transistor array substrate and the manufacturing method thereof are disclosed herein. A first patterned metal layer, an insulating layer, a patterned layer, and a second patterned metal layer are sequentially formed on a substrate. Then, a number of scan lines and a number of source lines are disposed on the substrate and define a number of pixel regions. A number of the storage capacitance lines are disposed on the substrate in a direction extending along the scan lines and across the pixel regions, wherein each of the storage capacitance lines is essentially perpendicular to each of the source lines and to form a cross portion. A number of patterned thin films are disposed on the storage capacitance lines and above the cross portion.
    Type: Application
    Filed: October 22, 2008
    Publication date: March 5, 2009
    Applicant: Chunghwa Picture Tubes, LTD.
    Inventors: Jun-Yao Huang, Kuang-Cheng Fu, Jen-Chieh Lin, Chin-Lung Yeh
  • Publication number: 20090015069
    Abstract: A shutter circuit is provided for a multi-channel converter to blank the switching noise produced by the switching of the converter. The shutter circuit monitors the switching of the switches in the output stages of the converter, and when one channel performs switching, the shutter circuit will send a signal to other channels to block the current sensors thereof. The current sensors are so blocked for a period not to sense the switching noise. The mutual interference between the channels due to the switching noise of the converter is eliminated.
    Type: Application
    Filed: July 10, 2008
    Publication date: January 15, 2009
    Inventors: An-Tung Chen, Jun-Yao Huang, Fu-Shiang Lai
  • Publication number: 20080054264
    Abstract: A thin film transistor array substrate and the manufacturing method thereof are disclosed herein. A first patterned metal layer, an insulating layer, a patterned layer, and a second patterned metal layer are sequentially formed on a substrate. Then, a plurality of scan lines and a plurality of source lines are disposed on the substrate and define a plurality of pixel regions. A plurality of the storage capacitance lines are disposed on the substrate in a direction extending along the scan lines and across the pixel regions, wherein each of the storage capacitance lines is essentially perpendicular to each of the source lines and to form a cross portion. A plurality of patterned thin films are disposed on the storage capacitance lines and above the cross portion.
    Type: Application
    Filed: January 4, 2007
    Publication date: March 6, 2008
    Inventors: Jun-Yao Huang, Kuang-Cheng Fu, Jen-Chieh Lin, Chin-Lung Yeh
  • Publication number: 20070159631
    Abstract: A transparent wafer with optical alignment function is provided. The transparent wafer includes a transparent substrate with an alignment feature on the edge and an opaque layer at least disposed along the peripheral area on the surface of the transparent substrate. The opaque layer can absorb or reflect the detecting light, thus the transparent wafer can be aligned by detecting the alignment feature. The present invention also includes the fabricating method and alignment method of the transparent wafer with optical alignment function.
    Type: Application
    Filed: April 12, 2006
    Publication date: July 12, 2007
    Inventors: Yu-Lin Huang, Dun-Ying Shu, Kuo-Ting Wu, Jun-Yao Huang