Patents by Inventor Jun Yuan

Jun Yuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11394389
    Abstract: The present disclosure provides a buffer circuit and a buffer. The buffer circuit includes: an input follower circuit for following the voltage change of the first input signal; an input follower linearity boosting circuit for improving follower linearity of the input follower circuit; a first voltage bootstrap circuit for bootstrapping the voltage of the first input signal; a second voltage bootstrap circuit for bootstrapping the voltage of the second input signal; a third voltage bootstrap circuit for providing corresponding quiescent operation point voltage; a compensation follower circuit for following the compensation voltage; a compensation follower linearity boosting circuit for improving follower linearity of the compensation follower circuit; a first load for collecting the buffered voltage; a bias circuit for providing a bias current for the buffer; a bias linearity boosting circuit for improving linearity of the bias circuit; a second load for generating a nonlinear compensation current.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: July 19, 2022
    Assignee: NO.24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
    Inventors: Ting Li, Gangyi Hu, Ruzhang Li, Yong Zhang, Zhengbo Huang, Yabo Ni, Xingfa Huang, Jian'an Wang, Guangbing Chen, Dongbing Fu, Jun Yuan, Zicheng Xu
  • Patent number: 11387335
    Abstract: Disclosed are optimized contract structures and fabrication techniques thereof. At least one aspect includes a semiconductor die. The semiconductor die includes a substrate and a contact disposed within the substrate. The contact includes a first portion with a first vertical cross-section having a first cross-sectional area. The first vertical cross-section has a first width and a first height. The contact also includes a second portion with a second vertical cross-section having a second cross-sectional area less than the first cross-sectional area. The second vertical cross-section includes a lower portion having the first width and a second height less than the first height, and an upper portion disposed above the lower portion and having a second width less than the first width and having a third height less than the first height.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: July 12, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Junjing Bao, Jun Yuan, Peijie Feng
  • Publication number: 20220196883
    Abstract: An antireflection film includes a plurality of convex structures formed on a light transmission surface included in an optical waveguide. A maximum radial length of a surface that is of each convex structure and that is close to the light transmission surface is less than a minimum value of a visible light wavelength. The maximum radial length of each convex structure gradually decreases in a direction away from the light transmission surface. A height of each convex structure is greater than or equal to 310 nm. A distance between geometric centers of surfaces that are of two adjacent convex structures and that are close to the light transmission surface is less than or equal to 220 nm.
    Type: Application
    Filed: April 21, 2020
    Publication date: June 23, 2022
    Inventors: Haishui Ye, Feng Yu, Jun Yuan
  • Publication number: 20220155491
    Abstract: An optical component includes an optical component body and an anti-reflection coating, where the anti-reflection coating is disposed on a surface of the optical component body through which light passes, the anti-reflection coating is configured to reduce reflectance of the surface, and the anti-reflection coating and the optical component body are integrally formed.
    Type: Application
    Filed: March 27, 2020
    Publication date: May 19, 2022
    Inventors: Haishui Ye, Jun Yuan, Feng Yu
  • Publication number: 20220150813
    Abstract: A device may receive, from a user equipment, a token request associated with an application, wherein the token request is associated with a device identifier. The device may generate a device token for the application and the user equipment. The device may provide, using the device identifier, the device token to the user equipment to enable a user to access the application via an application platform. The device may receive, from the application platform, a slice request for a network slice of a network that is to be used for an application session. The device may determine that the user equipment is associated with the application session based on the device token and the device identifier. The device may configure a network slice instance of the network slice. The device may determine a user equipment route selection policy for the application session according to the network slice instance.
    Type: Application
    Filed: January 21, 2022
    Publication date: May 12, 2022
    Applicant: Verizon Patent and Licencing Inc.
    Inventors: Manuel Enrique Caceres, Umesh Kumar Gupta, Mauricio Pati Caldeira De Andrada, Muhammad Salman Nomani, Jyotsna Kachroo, Jun Yuan
  • Publication number: 20220127689
    Abstract: The invention relates to a turnout rail production technology, in particular to a deeply-hardened-surface turnout rail with high degree of undercooling and the preparation method thereof. The invention aims to solve the technical problem by providing a deeply-hardened-surface turnout rail with high degree of undercooling featured in even hardness distribution and a deeply hardened surface layer and the preparation method thereof. The method is described as follows: feeding molten iron for converter smelting?furnace rear argon blowing station?LF refining?RH vacuumization?casting steel blanks?slow cooling in the slow cooling pit?austenitic homogenization?rail rolling?heat treatment; in the converter smelting process, adding 0.2-0.3% Cr, 0.04-0.06 V and 0.75-0.80% C; the heat treatment process is divided into two cooling stages.
    Type: Application
    Filed: October 25, 2021
    Publication date: April 28, 2022
    Inventors: Jun YUAN, Ming ZOU, Yong DENG, Ruoxi LI
  • Patent number: 11317384
    Abstract: To effectively and efficiently provide control information, a broadcast pointer channel (BPCH) may be used to identify the type and perhaps relative location of control information that is being provided in a given frame structure, such as a sub-frame, frame, or superframe. A sub-frame (or like framing entity, such a frame or superframe) may have a BPCH and a corresponding system control information segment in which control information may reside. The system control information segment may have any number of control information blocks, wherein each control information block that is present may correspond to a particular type of control information. The BPCH is used to identify the type of control information that is present in a corresponding system control information segment, and if needed or desired, the relative locations of the various control information.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: April 26, 2022
    Assignee: Apple Inc.
    Inventors: Mo-Han Fong, Hang Zhang, Sophie Vrzic, Robert Novak, Jun Yuan, Dong-Sheng Yu
  • Publication number: 20220123101
    Abstract: Disclosed are examples of 3D metal-insulator-metal (MIM) capacitor structures, e.g., in semiconductor packages. The disclosed 3D MIM capacitors provide high capacitance in small areas. As such, the disclosed 3D MIM capacitors may be used as decoupling capacities for high performance computing (HPC) processors.
    Type: Application
    Filed: October 19, 2020
    Publication date: April 21, 2022
    Inventors: Xia LI, Jun YUAN, Haining YANG, Bin YANG
  • Publication number: 20220109053
    Abstract: Disclosed are optimized contract structures and fabrication techniques thereof. At least one aspect includes a semiconductor die. The semiconductor die includes a substrate and a contact disposed within the substrate. The contact includes a first portion with a first vertical cross-section having a first cross-sectional area. The first vertical cross-section has a first width and a first height. The contact also includes a second portion with a second vertical cross-section having a second cross-sectional area less than the first cross-sectional area. The second vertical cross-section includes a lower portion having the first width and a second height less than the first height, and an upper portion disposed above the lower portion and having a second width less than the first width and having a third height less than the first height.
    Type: Application
    Filed: October 2, 2020
    Publication date: April 7, 2022
    Inventors: Junjing BAO, Jun YUAN, Peijie FENG
  • Patent number: 11279830
    Abstract: Provided is a surface-treated spinel particle (B) including a spinel particle (A) including a magnesium atom, an aluminum atom, and an oxygen atom and a surface treatment layer disposed at least a portion of the surface of the spinel particle (A). The surface treatment layer includes a surface-treating agent including an organic compound or a cured product of the surface-treating agent. The spinel particle (A) further includes molybdenum. The crystallite diameter of the [111] plane of the spinel particle (A) is 220 nm or more. Also provided are a method for producing the surface-treated spinel particle (B), a resin composition including the surface-treated spinel particle (B), and a molded article.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: March 22, 2022
    Assignee: DIC Corporation
    Inventors: Kazuo Itoya, Atsushi Oshio, Hironobu Oki, Masaki Iida, Yasuyo Sakamoto, Masamichi Hayashi, Takayuki Kanematsu, Fumihiko Maekawa, Jian-Jun Yuan, Hiroshi Kinoshita
  • Patent number: 11257917
    Abstract: Gate-all-around (GAA) transistors with an additional bottom channel for reduced parasitic capacitance and methods of fabricating the same include one or more channels positioned between a source region and a drain region. The one or more channels, which may be nanowire or nanoslab semiconductors, are surrounded by gate material. The GAA transistor further includes an additional semiconductor channel between a bottom section of a gate material and a silicon on insulator (SOI) substrate in a GAA transistor. This additional channel, sometimes referred to as a bottom channel, may be thinner than other channels in the GAA transistor and may have a thickness less than its length.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: February 22, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Jun Yuan, Peijie Feng, Stanley Seungchul Song, Kern Rim
  • Patent number: 11252654
    Abstract: A device may receive, from a user equipment, a token request associated with an application, wherein the token request is associated with a device identifier. The device may generate a device token for the application and the user equipment. The device may provide, using the device identifier, the device token to the user equipment to enable a user to access the application via an application platform. The device may receive, from the application platform, a slice request for a network slice of a network that is to be used for an application session. The device may determine that the user equipment is associated with the application session based on the device token and the device identifier. The device may configure a network slice instance of the network slice. The device may determine a user equipment route selection policy for the application session according to the network slice instance.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: February 15, 2022
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Manuel Enrique Caceres, Umesh Kumar Gupta, Mauricio Pati Caldeira De Andrada, Muhammad Salman Nomani, Jyotsna Kachroo, Jun Yuan
  • Publication number: 20220007724
    Abstract: A porous heating body includes a porous body having a first porous portion, a second porous portion and a third porous portion successively disposed in the porous body along a lengthwise direction of the porous body. A cross-sectional area of the first porous portion and a cross-sectional area of the third porous portion are both larger than a cross-sectional area of the second porous portion along a widthwise direction of the porous body. A heating element extends along the lengthwise direction of the porous body is disposed on the porous body. The heating element includes a heating portion. At least one portion of an extension length of the heating portion is overlapped with an extension length of the second porous portion. The porous body is shaped to enhance conductivity of liquid tobacco in a middle thereof, and storing liquid tobacco for replenishing at two bulge ends thereof.
    Type: Application
    Filed: November 6, 2019
    Publication date: January 13, 2022
    Inventors: QING ZHANG, JUN YUAN, YUNKAI ZHANG, ZHENGFA LI, DESHENG HUANG, BAOLING LEI, YONGHAI LI, ZHONGLI XU
  • Patent number: 11214494
    Abstract: A spinel compound oxide particle includes metallic atoms, aluminum atoms, oxygen atoms, and molybdenum atoms, wherein the metallic atoms are selected from the group consisting of zinc atoms, cobalt atoms, and strontium atoms, and a crystallite size in a [111] plane is 100 nm or more. Included are a step (1) of firing a first mixture including a molybdenum compound and a metallic-atom-containing compound or a first mixture including a molybdenum compound, a metallic-atom-containing compound, and an aluminum compound to prepare an intermediate; and a step (2) of firing, at a temperature higher than a temperature selected in the step (1), a second mixture including the intermediate or a second mixture including the intermediate and an aluminum compound.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: January 4, 2022
    Assignee: DIC Corporation
    Inventors: Kazuo Itoya, Masaki Iida, Jian-Jun Yuan, Yasuyo Yoshimoto, Hironobu Oki, Masamichi Hayashi
  • Publication number: 20210400572
    Abstract: A device may receive, from a user equipment, a token request associated with an application, wherein the token request is associated with a device identifier. The device may generate a device token for the application and the user equipment. The device may provide, using the device identifier, the device token to the user equipment to enable a user to access the application via an application platform. The device may receive, from the application platform, a slice request for a network slice of a network that is to be used for an application session. The device may determine that the user equipment is associated with the application session based on the device token and the device identifier. The device may configure a network slice instance of the network slice. The device may determine a user equipment route selection policy for the application session according to the network slice instance.
    Type: Application
    Filed: June 19, 2020
    Publication date: December 23, 2021
    Applicant: Verizon Patent and Licensing Inc.
    Inventors: Manuel Enrique CACERES, Umesh Kumar GUPTA, Mauricio Pati CALDEIRA DE ANDRADA, Muhammad Salman NOMANI, Jyotsna KACHROO, Jun YUAN
  • Publication number: 20210384310
    Abstract: Gate-all-around (GAA) transistors with an additional bottom channel for reduced parasitic capacitance and methods of fabricating the same include one or more channels positioned between a source region and a drain region. The one or more channels, which may be nanowire or nanoslab semiconductors, are surrounded by gate material. The GAA transistor further includes an additional semiconductor channel between a bottom section of a gate material and a silicon on insulator (SOI) substrate in a GAA transistor. This additional channel, sometimes referred to as a bottom channel, may be thinner than other channels in the GAA transistor and may have a thickness less than its length.
    Type: Application
    Filed: June 5, 2020
    Publication date: December 9, 2021
    Inventors: Jun Yuan, Peijie Feng, Stanley Seungchul Song, Kern Rim
  • Patent number: 11145654
    Abstract: A device comprising a substrate and a first transistor formed over the substrate. The first transistor includes a first source disposed over the substrate, a first drain disposed over the substrate, a first plurality of channels coupled to the first source and the first drain, and a first gate surrounding the first plurality of channels. The first plurality of channels is located between the first source and the first drain. At least one channel includes silicon germanium (SiGe). The transistor is a field effect transistor (FET). The transistor is a gate all around (GAA) FET. The transistor may be configured to operate as a negative channel metal oxide semiconductor (NMOS) transistor. The transistor may be configured to operate as a positive channel metal oxide semiconductor (PMOS) transistor.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: October 12, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Kwanyong Lim, Stanley Seungchul Song, Jun Yuan, Kern Rim
  • Publication number: 20210301143
    Abstract: Provided is a surface-treated spinel particle (B) including a spinel particle (A) including a magnesium atom, an aluminum atom, and an oxygen atom and a surface treatment layer disposed at least a portion of the surface of the spinel particle (A). The surface treatment layer includes a surface-treating agent including an organic compound or a cured product of the surface-treating agent. The spinel particle (A) further includes molybdenum. The crystallite diameter of the [111] plane of the spinel particle (A) is 220 nm or more. Also provided are a method for producing the surface-treated spinel particle (B), a resin composition including the surface-treated spinel particle (B), and a molded article.
    Type: Application
    Filed: September 21, 2017
    Publication date: September 30, 2021
    Applicant: DIC Corporation
    Inventors: Kazuo Itoya, Atsushi Oshio, Hironobu Oki, Masaki Iida, Yasuyo Sakamoto, Masamichi Hayashi, Takayuki Kanematsu, Fumihiko Maekawa, Jian-Jun Yuan, Hiroshi Kinoshita
  • Publication number: 20210301144
    Abstract: To provide plate-like alumina particles that are less likely to wear apparatuses. Plate-like alumina particles containing germanium or a germanium compound. The plate-like alumina particles preferably have a molar ratio of Ge to Al, [Ge]/[Al], of 0.08 or more as determined in an XPS analysis. The plate-like alumina particles preferably contain the germanium or germanium compound in a surface layer. The plate-like alumina particles preferably have a density of 3.7 g/cm3 or more and 4.1 g/cm3 or less. The plate-like alumina particles preferably have a molar ratio of Ge to Al, [Ge]/[Al], of 0.08 or less as determined in an XRF analysis.
    Type: Application
    Filed: August 9, 2019
    Publication date: September 30, 2021
    Applicant: DIC Corporation
    Inventors: Shingo Takada, Hironobu Oki, Jian-Jun Yuan, Kazuo Itoya, Yoshiyuki Sano
  • Publication number: 20210291272
    Abstract: Flaky alumina particles including mullite in a surface layer of the flaky alumina particles. A method for producing flaky alumina particles including forming a mixture by mixing together an aluminum compound that contains elemental aluminum, a molybdenum compound that contains elemental molybdenum, and silicon or a silicon compound that contains elemental silicon, the aluminum compound being in an amount greater than or equal to 50 mass %, calculated as Al2O3, the molybdenum compound being in an amount less than or equal to 40 mass %, calculated as MoO3, the silicon or the silicon compound being in an amount of 0.5 mass % or greater and less than 10 mass %, calculated as SiO2, relative to a total mass of the flaky alumina particles taken as 100 mass %; and firing the mixture.
    Type: Application
    Filed: July 26, 2018
    Publication date: September 23, 2021
    Applicant: DIC Corporation
    Inventors: Shingo TAKADA, Kazuo ITOYA, Jian-Jun YUAN, Takayuki KANEMATSU, Masamichi HAYASHI, Fumihiko MAEKAWA, Yoshiyuki SANO