Patents by Inventor Jung Chou

Jung Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230032997
    Abstract: A mobile device for avoiding accidental shutdown includes a battery cell, a controller, and a jack element. The controller defines a first delay time and a second delay time. The first delay time is relative to the ODCP (Over Discharge Current Protection) of the battery cell. The second delay time is relative to the OVP (Over Voltage Protection) of the battery cell. When a plug of a power supply device is unplugged from the jack element, the controller detects an SOH (State of Health) of the battery cell. The controller compares the SOH with a first threshold ratio and a second threshold ratio. Then, the controller extends the first delay time and the second delay time according to a first multiplier, a second multiplier, or a third multiplier.
    Type: Application
    Filed: September 2, 2021
    Publication date: February 2, 2023
    Inventors: Shuo-Jung CHOU, Chuan-Jung WANG, Chih-Chiang CHEN
  • Patent number: 11556691
    Abstract: Disclosed are methods for designing semiconductor devices, conductive layer patterns, and interconnection layer patterns including the operations of analyzing an initial semiconductor design layout to identify excessive open spaces between adjacent conductive elements or lines within an interconnection layer pattern, selecting or generating a dummy pattern to fill a portion of the open space, and generating a modified semiconductor design layout that incorporates the dummy pattern into first interconnection layer pattern to reduce the open space.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: January 17, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Yi Hu, Chih-Ming Chao, Jung-Chou Tsai
  • Patent number: 11532580
    Abstract: An interconnect structure includes a plurality of first pads, a plurality of second pads, a plurality of first conductive lines in a first layer, a plurality of second conductive lines in a second layer, and a plurality of nth conductive lines in an nth layer. The first pads and the second pads respectively are grouped into a first, a second and an nth group. Each of the first pads in first group is connected to one of the second pads in the first group by one of the first conductive lines. Each of the first pads in the second group is connected to one of the second pads in the second group by one of the second conductive lines. Each of the first pads in the nth group is connected to one of the second pads in the nth group by one of the nth conductive lines.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jung-Chou Tsai, Fong-Yuan Chang, Po-Hsiang Huang, Chin-Chou Liu, Yi-Kan Cheng
  • Publication number: 20220382957
    Abstract: A system for generating a layout diagram of a wire routing arrangement in a multi-patterning context having multiple masks (the layout diagram being stored on a non-transitory computer-readable medium), at least one processor, at least one memory and computer program code (for one or more programs) of the system being configured to cause the system to execute generating the layout diagram including: placing, relative to a given one of the masks, a given cut pattern at a first candidate location over a corresponding portion of a given conductive pattern in a metallization layer; determining whether the first candidate location results in at least one of a non-circular group or a cyclic group which violates a design rule; and temporarily preventing placement of the given cut pattern in the metallization layer at the first candidate location until a correction is made which avoids violating the design rule.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Inventors: Fong-Yuan CHANG, Chin-Chou LIU, Hui-Zhong ZHUANG, Meng-Kai HSU, Pin-Dai SUE, Po-Hsiang HUANG, Yi-Kan CHENG, Chi-Yu LU, Jung-Chou TSAI
  • Patent number: 11489210
    Abstract: An electronic device for suppressing battery swelling includes a first battery cell, a first conductive label, a second conductive label, a third conductive label, and a BMU (Battery Management Unit). The first battery cell includes a first nonconductive housing. The first conductive label, the second conductive label, and the third conductive label are disposed on the first nonconductive housing. The BMU outputs a charging voltage to the first battery cell. The BMU determines the voltage level of the charging voltage by detecting the states of the first conductive label, the second conductive label, and the third conductive label.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: November 1, 2022
    Assignee: ACER INCORPORATED
    Inventors: Shuo-Jung Chou, Chuan-Jung Wang, Chih-Chiang Chen
  • Publication number: 20220344293
    Abstract: An interconnect structure includes a plurality of first pads arranged to form a first array and a plurality of second pads arranged to form a second array. Each of the first array has a first row, a second row and an mth row extending along a first direction and parallel to each other along a second direction. The first pads in each of the first row, the second row and the mth row are grouped into a first group, a second group and an nth group extending along the second direction. The second pads in each of the first row, the second row and the mth row are grouped into a first group, a second group and an nth group extending along the second direction. The interconnect structure further includes a plurality of first conductive lines, a plurality of second conductive lines and a plurality of nth conductive lines.
    Type: Application
    Filed: July 12, 2022
    Publication date: October 27, 2022
    Inventors: JUNG-CHOU TSAI, FONG-YUAN CHANG, PO-HSIANG HUANG, CHIN-CHOU LIU, YI-KAN CHENG
  • Publication number: 20220337077
    Abstract: A battery module for monitoring and suppressing battery swelling and interacting with a charging device includes a battery cell disposed in a nonconductive housing, a conductive label affixed to the nonconductive housing, a switch, and a controller. The battery cell is charged via a supply voltage from a charging device. The switch is coupled between the battery cell and the conductive label. The controller detects a resistance variation value ?R of the conductive label as result of swelling of the nonconductive housing, and generates a corresponding control voltage. As the resistance of the conductive label increases, the supply voltage may be adjusted downward according to the control voltage. If the resistance variation value ?R conductive label is greater than or equal to a predetermined threshold, the controller closes the switch, and the battery cell may then fully discharge through the conductive label.
    Type: Application
    Filed: October 18, 2021
    Publication date: October 20, 2022
    Inventors: Shuo-Jung CHOU, Chuan-Jung WANG, Chih-Chiang CHEN
  • Publication number: 20220271351
    Abstract: An electronic device for suppressing battery swelling includes a first battery cell, a first conductive label, a second conductive label, a third conductive label, and a BMU (Battery Management Unit). The first battery cell includes a first nonconductive housing. The first conductive label, the second conductive label, and the third conductive label are disposed on the first nonconductive housing. The BMU outputs a charging voltage to the first battery cell. The BMU determines the voltage level of the charging voltage by detecting the states of the first conductive label, the second conductive label, and the third conductive label.
    Type: Application
    Filed: April 29, 2021
    Publication date: August 25, 2022
    Inventors: Shuo-Jung CHOU, Chuan-Jung WANG, Chih-Chiang CHEN
  • Patent number: 11196270
    Abstract: A charging method is provided for charging a plurality of batteries of a battery module. The charging method includes: obtaining a maximum voltage value and a minimum voltage value of a plurality of battery voltage values of the batteries according to a relative state of charge of the battery module during a charging process; obtaining a difference value between the maximum voltage value and the minimum voltage value; and adjusting a charging voltage value for charging the batteries and a taper voltage value for determining whether the batteries reach a charging saturation state according to the difference value.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: December 7, 2021
    Assignee: Acer Incorporated
    Inventors: Shuo-Jung Chou, Chuan-Jung Wang
  • Publication number: 20210066223
    Abstract: An interconnect structure includes a plurality of first pads, a plurality of second pads, a plurality of first conductive lines in a first layer, a plurality of second conductive lines in a second layer, and a plurality of nth conductive lines in an nth layer. The first pads and the second pads respectively are grouped into a first, a second and an nth group. Each of the first pads in first group is connected to one of the second pads in the first group by one of the first conductive lines. Each of the first pads in the second group is connected to one of the second pads in the second group by one of the second conductive lines. Each of the first pads in the nth group is connected to one of the second pads in the nth group by one of the nth conductive lines.
    Type: Application
    Filed: May 26, 2020
    Publication date: March 4, 2021
    Inventors: JUNG-CHOU TSAI, FONG-YUAN CHANG, PO-HSIANG HUANG, CHIN-CHOU LIU, YI-KAN CHENG
  • Publication number: 20210057922
    Abstract: A charging method is provided for charging a plurality of batteries of a battery module. The charging method includes: obtaining a maximum voltage value and a minimum voltage value of a plurality of battery voltage values of the batteries according to a relative state of charge of the battery module during a charging process; obtaining a difference value between the maximum voltage value and the minimum voltage value; and adjusting a charging voltage value for charging the batteries and a taper voltage value for determining whether the batteries reach a charging saturation state according to the difference value.
    Type: Application
    Filed: November 12, 2019
    Publication date: February 25, 2021
    Applicant: Acer Incorporated
    Inventors: Shuo-Jung Chou, Chuan-Jung Wang
  • Patent number: 10753917
    Abstract: A hydrogen sensing device includes a multi-layered structure member. The multi-layered structure member includes a stack of alternatingly disposed magnetic layers and non-ferromagnetic layers. One of the magnetic layers is a topmost layer of the multi-layered structure member. The topmost layer includes a palladium-based material to detect hydrogen.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: August 25, 2020
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Yuan-Chieh Tseng, Jaw-Yeu Liang, Yun-Chieh Pai, Yu-Jung Chou, Wen-Chin Lin, Chih-Huang Lai
  • Publication number: 20200117257
    Abstract: A power control device including a main battery, an auxiliary battery, a charging circuit, and a control circuit, for supplying power to a load is proposed. The main battery supplies power to the load. A volume, a capacity, and an output voltage of the auxiliary battery are all less than those of the main battery. The charging circuit receives a power input signal from a power supply network via a power adapter. The charging circuit generates a protection signal when changing from a first state that receives the power input signal to a second state that does not receive the power input signal. The control circuit controls the auxiliary battery to supply power to the load via a boosting circuit when receiving the protection signal, where a second output voltage outputted by the auxiliary battery is greater than or equal to a first output voltage outputted by the main battery.
    Type: Application
    Filed: July 1, 2019
    Publication date: April 16, 2020
    Applicant: Acer Incorporated
    Inventors: Shuo-Jung Chou, Chuan-Jung Wang, Chih-Chiang Chen
  • Publication number: 20200104461
    Abstract: Disclosed are methods for designing semiconductor devices, conductive layer patterns, and interconnection layer patterns including the operations of analyzing an initial semiconductor design layout to identify excessive open spaces between adjacent conductive elements or lines within an interconnection layer pattern, selecting or generating a dummy pattern to fill a portion of the open space, and generating a modified semiconductor design layout that incorporates the dummy pattern into first interconnection layer pattern to reduce the open space.
    Type: Application
    Filed: September 17, 2019
    Publication date: April 2, 2020
    Inventors: Wei-Yi HU, Chih-Ming CHAO, Jung-Chou TSAI
  • Patent number: 10498978
    Abstract: A digital imaging device including a sensor array, an analog front end and a digital back end. The sensor array is configured to output black pixel data and normal pixel data. The analog front end is configured to amplify the black pixel data and the normal pixel data with a gain, and calibrate the amplified black pixel data and the amplified normal pixel data with a calibration value. The digital back end is configured to digitize the amplified and calibrated black pixel data, calculate a data offset according to digital black pixel data, determine a dynamic adjust scale, calculate the calibration value according to the gain, the data offset and the dynamic adjust scale, and adjust the gain according to the dynamic adjust scale.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 3, 2019
    Assignee: Pixart Imaging Inc.
    Inventors: Chien-Jung Chou, Han-Chi Liu, Wen-Cheng Yen
  • Patent number: 10483782
    Abstract: A battery control method and a battery control apparatus are provided. The battery control method includes the following steps. Whether a charging voltage value of a battery is greater than a voltage threshold is determined. When the charging voltage value is greater than the voltage threshold, a battery temperature of the battery is obtained. When the battery temperature is less than a first temperature, a time parameter is accumulated according to a first accumulating rate. When the time parameter reaches a time threshold, the charging voltage value of the battery is reduced.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: November 19, 2019
    Assignee: ACER INCORPORATED
    Inventors: Shuo-Jung Chou, Chuan-Jung Wang
  • Publication number: 20190286784
    Abstract: A method (of generating a layout diagram of a wire routing arrangement in a multi-patterning context having multiple masks, the layout diagram being stored on a non-transitory computer-readable medium) includes: placing, relative to a given one of the masks, a given cut pattern at a first candidate location over a corresponding portion of a given conductive pattern in a metallization layer; determining whether the first candidate location results in at least one of a non-circular group or a cyclic group which violates a design rule; and temporarily preventing, if there is a violation, placement of the given cut pattern in the metallization layer at the first candidate location until a correction is made which avoids violating the design rule.
    Type: Application
    Filed: March 12, 2019
    Publication date: September 19, 2019
    Inventors: Fong-Yuan CHANG, Chin-Chou LIU, Hui-Zhong ZHUANG, Meng-Kai HSU, Pin-Dai SUE, Po-Hsiang HUANG, Yi-Kan CHENG, Chi-Yu LU, Jung-Chou TSAI
  • Patent number: 10362691
    Abstract: A USB socket connector includes a columnar housing, a circuit board, and an expansion board. The columnar housing has a front portion and an opposite rear portion. The columnar housing includes an accommodating slot recessed from the front portion toward the rear portion and a receiving slot recessed on the rear portion and in air communication with the accommodating slot. A cross section of the receiving slot is larger than that of the accommodating slot. The circuit board includes a tongue plate portion arranged on one side thereof and having a USB3.1 Type-C interface. The circuit board is inserted into the accommodating slot, and the tongue plate portion is arranged in the front portion. The expansion board is substantially and perpendicularly connected to an end of the circuit board away from the tongue plate portion, and the expansion board is arranged in the receiving slot.
    Type: Grant
    Filed: November 24, 2017
    Date of Patent: July 23, 2019
    Assignees: BCM COMMUNICATION CO., LTD, UFRO INC
    Inventors: Kao-Jung Chou, Hsien-Chuan Kuo, Hung-Yu Lin
  • Publication number: 20190104619
    Abstract: A USB socket connector includes a columnar housing, a circuit board, and an expansion board. The columnar housing has a front portion and an opposite rear portion. The columnar housing includes an accommodating slot recessed from the front portion toward the rear portion and a receiving slot recessed on the rear portion and in air communication with the accommodating slot. A cross section of the receiving slot is larger than that of the accommodating slot. The circuit board includes a tongue plate portion arranged on one side thereof and having a USB3.1 Type-C interface. The circuit board is inserted into the accommodating slot, and the tongue plate portion is arranged in the front portion. The expansion board is substantially and perpendicularly connected to an end of the circuit board away from the tongue plate portion, and the expansion board is arranged in the receiving slot.
    Type: Application
    Filed: November 24, 2017
    Publication date: April 4, 2019
    Inventors: Kao-Jung Chou, Hsien-Chuan Kuo, Hung-Yu Lin
  • Patent number: D855055
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: July 30, 2019
    Assignees: BCM COMMUNICATION CO., LTD, UFRO INC
    Inventors: Kao-Jung Chou, Hsien-Chuan Kuo, Hung-Yu Lin