Patents by Inventor Jung-han Lee

Jung-han Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200111784
    Abstract: An integrated circuit (IC) device includes a first and a second fin-type active region protruding from a first region and a second region, respectively, of a substrate, a first and a second gate line, and a first and a second source/drain region. The first fin-type active region has a first top surface and a first recess has a first depth from the first top surface. The first source/drain region fills the first recess and has a first width. The second fin-type active region has a second top surface and a second recess has a second depth from the second top surface. The second depth is greater than the first depth. The second source/drain region fills the second recess and has a second width. The second width is greater than the first width.
    Type: Application
    Filed: December 6, 2019
    Publication date: April 9, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-han LEE, Sun-ghil LEE, Myung-il KANG, Jeong-yun LEE, Seung-hun LEE, Hyun-jung LEE, Sun-wook KIM
  • Publication number: 20200091286
    Abstract: A semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. A sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. The second slope increases from a bottom toward a top of the second region. The second slope has a value at the bottom of the second region less than the first slope. The third slope is greater than the second slope.
    Type: Application
    Filed: November 25, 2019
    Publication date: March 19, 2020
    Inventors: Jung-Han LEE, Jae-Hwan LEE, Sang-Su KIM, Hwan-Wook CHOI, Tae-Jong LEE, Seung-Mo HA
  • Patent number: 10586852
    Abstract: A semiconductor device including a first fin protruding on a substrate and extending in a first direction; a first gate electrode on the first fin, the first gate electrode intersecting the first fin; a first trench formed within the first fin at a side of the first gate electrode; a first epitaxial layer filling a portion of the first trench, wherein a thickness of the first epitaxial layer becomes thinner closer to a sidewall of the first trench; and a second epitaxial layer filling the first trench on the first epitaxial layer, wherein a boron concentration of the second epitaxial layer is greater than a boron concentration of the first epitaxial layer.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: March 10, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung Han Lee, Myung Il Kang, Jae Hwan Lee, Sun Wook Kim, Seong Ju Kim, Sung Jin Park, Hong Seon Yang, Joo Hee Jung
  • Publication number: 20200049311
    Abstract: Disclosed is a liquefied natural gas storage apparatus. The apparatus includes a heat insulated tank and liquefied natural gas contained in the tank. The tank has heat insulation sufficient to maintain liquefied natural gas therein such that most of the liquefied natural gas stays in liquid. The contained liquefied natural gas has a vapor pressure from about 0.3 bar to about 2 bar. The apparatus further includes a safety valve configured to release a part of liquefied natural gas contained in the tank when a vapor pressure of liquefied natural gas within the tank becomes higher than a cut-off pressure. The cut-off pressure is from about 0.3 bar to about 2 bar.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 13, 2020
    Inventors: Jung Han LEE, Jung Ho CHOI, Sung Kon HAN, Dong Kyu CHOI, Young Sik MOON
  • Patent number: 10559565
    Abstract: An integrated circuit (IC) device includes a first and a second fin-type active region protruding from a first region and a second region, respectively, of a substrate, a first and a second gate line, and a first and a second source/drain region. The first fin-type active region has a first top surface and a first recess has a first depth from the first top surface. The first source/drain region fills the first recess and has a first width. The second fin-type active region has a second top surface and a second recess has a second depth from the second top surface. The second depth is greater than the first depth. The second source/drain region fills the second recess and has a second width. The second width is greater than the first width.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: February 11, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-han Lee, Sun-ghil Lee, Myung-il Kang, Jeong-yun Lee, Seung-hun Lee, Hyun-jung Lee, Sun-wook Kim
  • Patent number: 10553434
    Abstract: A method for manufacturing a semiconductor device includes performing a first ion implantation process on a substrate to form a lower dopant region in the substrate, patterning the substrate having the lower dopant region to form active patterns, and performing a second ion implantation process on the active patterns to form an upper dopant region in an upper portion of each of the active patterns. The lower and upper dopant regions have a same conductivity type.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: February 4, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung Han Lee, Byoung-gi Kim, Jong Pil Kim, Kihwan Lee
  • Patent number: 10508769
    Abstract: Disclosed is a liquefied natural gas storage apparatus. The apparatus includes a heat insulated tank and liquefied natural gas contained in the tank. The tank has heat insulation sufficient to maintain liquefied natural gas therein such that most of the liquefied natural gas stays in liquid. The contained liquefied natural gas has a vapor pressure from about 0.3 bar to about 2 bar. The apparatus further includes a safety valve configured to release a part of liquefied natural gas contained in the tank when a vapor pressure of liquefied natural gas within the tank becomes higher than a cut-off pressure. The cut-off pressure is from about 0.3 bar to about 2 bar.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: December 17, 2019
    Assignee: DAEWOO SHIPBUILDING & MARINE ENGINEERING CO., LTD.
    Inventors: Jung Han Lee, Jung Ho Choi, Sung Kon Han, Dong Kyu Choi, Young Sik Moon
  • Publication number: 20190334163
    Abstract: The present invention relates to a lithium complex oxide, and more specifically, to a lithium complex oxide of which a range of FWHM(104) values maintains a constant relationship with a molar fraction of nickel when measuring XRD defined by a hexagonal lattice having a R-3m space group. The lithium complex oxide according to the present invention exhibits an effect of improving lifetime properties of the cells including high Ni-based cathode active materials accordingly by enabling a range of the FWHM(104) values at (104) peaks defined by the hexagonal lattice having the R-3m space group to maintain a constant relationship with the molar fraction of nickel, thereby maintaining the primary particles in a predetermined size range.
    Type: Application
    Filed: August 20, 2018
    Publication date: October 31, 2019
    Inventors: JUNG HAN LEE, MOON HO CHOI, JUN WON SUH, SUNG JIN JANG, JI HYUN NAM, SEUNG WOO CHOI
  • Publication number: 20190293236
    Abstract: Disclosed is a liquefied natural gas storage apparatus. The apparatus includes a heat insulated tank and liquefied natural gas contained in the tank. The tank has heat insulation sufficient to maintain liquefied natural gas therein such that most of the liquefied natural gas stays in liquid. The contained liquefied natural gas has a vapor pressure from about 0.3 bar to about 2 bar. The apparatus further includes a safety valve configured to release a part of liquefied natural gas contained in the tank when a vapor pressure of liquefied natural gas within the tank becomes higher than a cut-off pressure. The cut-off pressure is from about 0.3 bar to about 2 bar.
    Type: Application
    Filed: June 12, 2019
    Publication date: September 26, 2019
    Inventors: Jung Han LEE, Jung Ho CHOI, Sung Kon HAN, Dong Kyu CHOI, Young Sik MOON
  • Patent number: 10362667
    Abstract: A circuit board is disclosed. In addition to insulating layers, the circuit board includes a structure for heat transfer that includes a first layer that is formed of graphite or graphene, a second layer that is formed of metallic material and disposed on one surface of the first layer, and a third layer that is formed of metallic material and disposed on the other surface of the first layer, and at least a portion of the structure for heat transfer is inserted into an insulation layer. Such a circuit board provides improved heat management. Also disclosed is a method of manufacturing the circuit board.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: July 23, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae-Hong Min, Myung-Sam Kang, Jung-Han Lee, Young-Gwan Ko
  • Patent number: 10352499
    Abstract: This application relates to a liquefied natural gas storage apparatus. The apparatus includes a heat insulated tank and liquefied natural gas contained in the tank. The tank has heat insulation sufficient to maintain liquefied natural gas therein such that most of the liquefied natural gas stays in liquid. The contained liquefied natural gas has a vapor pressure from about 0.3 bar to about 2 bar. The apparatus further includes a safety valve configured to release a part of liquefied natural gas contained in the tank when a vapor pressure of liquefied natural gas within the tank becomes higher than a cut-off pressure. The cut-off pressure is from about 0.3 bar to about 2 bar.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: July 16, 2019
    Assignee: DAEWOO SHIPBUILDING & MARINE ENGINEERING CO., LTD.
    Inventors: Jung Han Lee, Jung Ho Choi, Sung Kon Han, Dong Kyu Choi, Young Sik Moon
  • Publication number: 20190206867
    Abstract: A semiconductor substrate includes a plurality of gate electrodes crossing active patterns on a substrate and extending in a second direction, the gate electrodes spaced apart in the second direction from each other, a gate separation pattern having a major axis in the first direction and between two of the gate electrodes, the two of the gate electrodes adjacent to each other in the second direction, and a plurality of gate spacers covering sidewalls of respective ones of the gate electrodes, the gate spacers crossing the gate separation pattern and extending in the second direction. The gate separation pattern includes a lower portion extending in the first direction, an intermediate portion protruding from the lower portion and having a first width, and an upper portion between two adjacent gate spacers and protruding from the intermediate portion, the upper portion having a second width less than the first width.
    Type: Application
    Filed: July 9, 2018
    Publication date: July 4, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung Han LEE, Sungchul Park, Yunil Lee, Byoung-gi Kim, Yeongmin Jeon, Daewon Ha, Inchan Hwang, Jae Hyun Park, Woocheol Shin
  • Publication number: 20190198497
    Abstract: An integrated circuit (IC) device includes a first and a second fin-type active region protruding from a first region and a second region, respectively, of a substrate, a first and a second gate line, and a first and a second source/drain region. The first fin-type active region has a first top surface and a first recess has a first depth from the first top surface. The first source/drain region fills the first recess and has a first width. The second fin-type active region has a second top surface and a second recess has a second depth from the second top surface. The second depth is greater than the first depth. The second source/drain region fills the second recess and has a second width. The second width is greater than the first width.
    Type: Application
    Filed: February 28, 2019
    Publication date: June 27, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-han LEE, Sun-ghil LEE, Myung-il KANG, Jeong-yun LEE, Seung-hun LEE, Hyun-jung LEE, Sun-wook KIM
  • Publication number: 20190198323
    Abstract: A method for manufacturing a semiconductor device includes performing a first ion implantation process on a substrate to form a lower dopant region in the substrate, patterning the substrate having the lower dopant region to form active patterns, and performing a second ion implantation process on the active patterns to form an upper dopant region in an upper portion of each of the active patterns. The lower and upper dopant regions have a same conductivity type.
    Type: Application
    Filed: July 5, 2018
    Publication date: June 27, 2019
    Inventors: Jung Han Lee, Byoung-gi Kim, Jong Pil Kim, Kihwan Lee
  • Publication number: 20190157660
    Abstract: The present invention relates to a cathode active material for a lithium secondary battery, and more particularly, to a cathode active material for a lithium secondary battery, which includes a core portion and a shell portion surrounding the core portion, in which a total content of cobalt in the core portion and the shell portion is 5 to 12 mol %, and the content of cobalt in the core portion and the shell portion is adjusted to be within a predetermined range. In the cathode active material precursor and the cathode active material for a secondary battery prepared using the same according to the present invention, optimal capacity of a lithium secondary battery may be increased by adjusting the cobalt content in the particles of the cathode active material, and life characteristics may be enhanced by improving stability.
    Type: Application
    Filed: November 21, 2018
    Publication date: May 23, 2019
    Inventors: Sung Jin Jang, Moon Ho Choi, Jun Won Suh, Jung Han Lee, Ji Hyun Nam, Seung Woo Choi
  • Publication number: 20190148717
    Abstract: The present invention relates to a cathode active material composition for a lithium secondary battery and a lithium secondary battery including the same, and more particularly, to a cathode active material composition for a lithium secondary battery, including a mixture of particles which are different in Ni composition and size and prepared at the same heat treatment temperature, and a lithium secondary battery including the same. According to the present invention, optimal capacity manifestation temperatures of a coarse particle and a fine particle may be adjusted to be similar by adjusting an Ni content of the coarse particle and the fine particle, and thus, a lithium secondary battery having enhanced output and lifetime may be manufactured.
    Type: Application
    Filed: November 15, 2018
    Publication date: May 16, 2019
    Inventors: MOON HO CHOI, JUN WON SUH, JUNG HAN LEE, JI HYUN NAM, SUNG JIN JANG, SEUNG WOO CHOI
  • Patent number: 10256237
    Abstract: An integrated circuit (IC) device includes a first and a second fin-type active region protruding from a first region and a second region, respectively, of a substrate, a first and a second gate line, and a first and a second source/drain region. The first fin-type active region has a first top surface and a first recess has a first depth from the first top surface. The first source/drain region fills the first recess and has a first width. The second fin-type active region has a second top surface and a second recess has a second depth from the second top surface. The second depth is greater than the first depth. The second source/drain region fills the second recess and has a second width. The second width is greater than the first width.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: April 9, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-han Lee, Sun-ghil Lee, Myung-il Kang, Jeong-yun Lee, Seung-hun Lee, Hyun-jung Lee, Sun-wook Kim
  • Patent number: 10212803
    Abstract: A circuit board includes an insulating part including insulating layers, metal layers disposed on the insulating layers, vias each passing through at least one insulating layer among the insulating layers and connecting together at least two metal layers among the metal layers; a first thermally conductive structure including a thermally conductive material, at least a part of the thermally conductive structure being inserted into the insulating part, a first via having one surface contacting the first thermally conductive structure, a first metal pattern contacting another surface of the first via, a first bonding member connected to the first metal pattern, and pads to which a first electronic component is connected on an outermost surface of a metal layer disposed on an outermost surface of the insulating part, the pads being at least in a first region and a second region having a higher temperature than the first region.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: February 19, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Hong Min, Myung Sam Kang, Jung Han Lee, Young Gwan Ko
  • Publication number: 20190051728
    Abstract: A semiconductor device including a first fin protruding on a substrate and extending in a first direction; a first gate electrode on the first fin, the first gate electrode intersecting the first fin; a first trench formed within the first fin at a side of the first gate electrode; a first epitaxial layer filling a portion of the first trench, wherein a thickness of the first epitaxial layer becomes thinner closer to a sidewall of the first trench; and a second epitaxial layer filling the first trench on the first epitaxial layer, wherein a boron concentration of the second epitaxial layer is greater than a boron concentration of the first epitaxial layer.
    Type: Application
    Filed: October 10, 2018
    Publication date: February 14, 2019
    Inventors: Jung Han LEE, Myung Il KANG, Jae Hwan LEE, Sun Wook KIM, Seong Ju KIM, Sung Jin PARK, Hong Seon YANG, Joo Hee JUNG
  • Publication number: 20190019864
    Abstract: A semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. A sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. The second slope increases from a bottom toward a top of the second region. The second slope has a value at the bottom of the second region less than the first slope. The third slope is greater than the second slope.
    Type: Application
    Filed: September 7, 2018
    Publication date: January 17, 2019
    Inventors: Jung-Han Lee, Jae-Hwan Lee, Sang-Su Kim, Hwan-Wook Choi, Tae-Jong Lee, Seung-Mo Ha