Patents by Inventor Jung Huang

Jung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240164054
    Abstract: A single-phase immersion cooling system includes an immersion cooling tank having a component area, which is separate from a main chamber and is configured to receive a heat-generating electronic device. A coolant circulates along a flow path, in a chamber path through the main chamber and a component path through the component area. A rotating propeller is mounted within the immersion cooling tank, causing a driven flow path in the component area. The driven flow path is configured to cause contact between the coolant in the driven flow path and the heat-generating electronic device when the heat-generating electronic device is received within the component area. The coolant in the driven flow path circulates at a faster speed than the coolant in the chamber path.
    Type: Application
    Filed: January 13, 2023
    Publication date: May 16, 2024
    Inventors: Chao-Jung CHEN, Yu-Nien HUANG, Chang-Yu CHIANG
  • Publication number: 20240157665
    Abstract: An apparatus and method for expanding a box blank into a box, the apparatus comprising an arm assembly, a controller, a camera and a box blank conveyor. The arm assembly includes a folding arm having a position in a first direction and a rotational angle controlled by the controller based on a position of a feature of the box blank in the field of view of the camera. The camera captures images of the box blank which are used to position the arm assembly and to evaluate the need to reject a box blank.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 16, 2024
    Inventors: Szu-Chen HUANG, Po-Hsien CHIU, Mao-Jung CHIU, Mao-Shun LIEN, Fu-Hsien LI
  • Publication number: 20240154520
    Abstract: A power factor correction (PFC) converter comprises an inductor, a main switch, a voltage divider, a diode, and a controller. The main switch controls the inductor performing magnetization and demagnetization, wherein a voltage difference between two ends of the main switch is a switch voltage. The voltage divider divides the switch voltage and generates a division voltage. The controller performs the following operations periodically in general mode: turning on the main switch; turning off the main switch after the main switch is turned on for a period of time; obtaining the switch voltage according to the division voltage, and determining the period of time for which the main switch is turned on next time according to the switch voltage and a predetermined output voltage of the PFC converter; and obtaining an output voltage according to the switch voltage during a period of time after the main switch is turned off.
    Type: Application
    Filed: March 30, 2023
    Publication date: May 9, 2024
    Applicant: Diodes Incorporated
    Inventors: Haoming Chen, Yi-Chun Wang, Koyen Lee, Feng-Jung Huang
  • Patent number: 11978740
    Abstract: A layer stack including a first bonding dielectric material layer, a dielectric metal oxide layer, and a second bonding dielectric material layer is formed over a top surface of a substrate including a substrate semiconductor layer. A conductive material layer is formed by depositing a conductive material over the second bonding dielectric material layer. The substrate semiconductor layer is thinned by removing portions of the substrate semiconductor layer that are distal from the layer stack, whereby a remaining portion of the substrate semiconductor layer includes a top semiconductor layer. A semiconductor device may be formed on the top semiconductor layer.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Harry-Hak-Lay Chuang, Kuo-Ching Huang, Wei-Cheng Wu, Hsin Fu Lin, Henry Wang, Chien Hung Liu, Tsung-Hao Yeh, Hsien Jung Chen
  • Publication number: 20240145249
    Abstract: A device includes first and second gate structures respectively extending across the first and second fins, and a gate isolation plug between a longitudinal end of the first gate structure and a longitudinal end of the second gate structure. The gate isolation plug comprises a first dielectric layer and a second dielectric layer over the first dielectric layer. The first dielectric layer has an upper portion and a lower portion below the upper portion. The upper portion has a thickness smaller than a thickness of the lower portion of the first dielectric layer.
    Type: Application
    Filed: March 24, 2023
    Publication date: May 2, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ting-Gang CHEN, Wan Chen HSIEH, Bo-Cyuan LU, Tai-Jung KUO, Kuo-Shuo HUANG, Chi-Yen TUNG, Tai-Chun HUANG
  • Publication number: 20240142237
    Abstract: A localization device and a localization method for a vehicle are provided. The localization device includes an inertia measurer, an encoder, an image capturing device, and a processor. The processor obtains an encoded data by the encoder to generate a first odometer data, obtains an inertial data by the inertia measurer to generate a heading angle estimation data, and obtains an environmental image data by the image capturing device to generate a second odometer data. In a first fusion stage, the processor fuses the heading angle estimation data and the first odometer data to generate first fusion data. In a second fusion stage, the processor fuses the first fusion data, the heading angle estimation data and the second odometer data to generate pose estimation data corresponding to the localization device.
    Type: Application
    Filed: January 5, 2023
    Publication date: May 2, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Jhong Chen, Pei-Jung Liang, Ren-Yi Huang
  • Publication number: 20240138718
    Abstract: The present invention provides a non-invasive flexible blood glucose detecting and sleep monitoring device for monitoring the sleep state and blood glucose state of the detected person. The non-invasive flexible blood glucose detecting and sleep monitoring device includes a detection module including: a substrate; a plurality of optical modules, each being an optical cover plates with a coating layer; retaining walls, being disposed on the substrate, and the retaining walls respectively establishing a first space and a second space with the substrate and the optical modules; a light emitting unit, being disposed in the first space; and the sensing unit, being disposed in the second space. The non-invasive flexible blood glucose detecting and sleep monitoring device further includes a flexible piezoelectric module for being placed on the detected person; and a detecting unit, being connected to the detection module and the flexible piezoelectric module.
    Type: Application
    Filed: October 19, 2023
    Publication date: May 2, 2024
    Inventors: Hsiu-Jung HUANG, Sheng-Wei CHEN
  • Patent number: 11973117
    Abstract: Methods of forming contacts for source/drain regions and a contact plug for a gate stack of a finFET device are disclosed herein. Methods include etching a contact opening through a dielectric layer to expose surfaces of a first source/drain contact and repairing silicon oxide structures along sidewall surfaces of the contact opening and along planar surfaces of the dielectric layer to prevent selective loss defects from occurring during a subsequent selective deposition of conductive fill materials and during subsequent etching of other contact openings. The methods further include performing a selective bottom-up deposition of conductive fill material to form a second source/drain contact. According to some of the methods, once the second source/drain contact has been formed, the contact plug may be formed over the gate stack.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, Chang-Ting Chung, Wei-Cheng Lin, Wei-Jung Lin, Chih-Wei Chang
  • Publication number: 20240136213
    Abstract: In an embodiment, a system, includes: a first pressurized load port interfaced with a workstation body; a second pressurized load port interfaced with the workstation body; the workstation body maintained at a set pressure level, wherein the workstation body comprises an internal material handling system configured to move a semiconductor workpiece within the workstation body between the first and second pressurized load ports at the set pressure level; a first modular tool interfaced with the first pressurized load port, wherein the first modular tool is configured to process the semiconductor workpiece; and a second modular tool interfaced with the second pressurized load port, wherein the second modular tool is configured to inspect the semiconductor workpiece processed by the first modular tool.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Chun-Jung HUANG, Yung-Lin HSU, Kuang Huan HSU, Jeff CHEN, Steven HUANG, Yueh-Lun YANG
  • Publication number: 20240135745
    Abstract: An electronic device has a narrow viewing angle state and a wide viewing angle state, and includes a panel and a light source providing a light passing through the panel. In the narrow viewing angle state, the light has a first relative light intensity and a second relative light intensity. The first relative light intensity is the strongest light intensity, the second relative light intensity is 50% of the strongest light intensity, the first relative light intensity corresponds to an angle of 0°, the second relative light intensity corresponds to a half-value angle, and the half-value angle is between ?15° and 15°. In the narrow angle state, a third relative light intensity at each angle between 20° and 60° or each angle between ?20° and ?60° is lower than 20% of the strongest light intensity.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: InnnoLux Corporation
    Inventors: Kuei-Sheng Chang, Po-Yang Chen, Kuo-Jung Wu, I-An Yao, Wei-Cheng Lee, Hsien-Wen Huang
  • Publication number: 20240136423
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 25, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20240136346
    Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.
    Type: Application
    Filed: April 17, 2023
    Publication date: April 25, 2024
    Inventors: Chien Hung LIU, Yu-Sheng CHEN, Yi Ching ONG, Hsien Jung CHEN, Kuen-Yi CHEN, Kuo-Ching HUANG, Harry-HakLay CHUANG, Wei-Cheng WU, Yu-Jen WANG
  • Publication number: 20240128353
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20240128219
    Abstract: A semiconductor die including mechanical-stress-resistant bump structures is provided. The semiconductor die includes dielectric material layers embedding metal interconnect structures, a connection pad-and-via structure, and a bump structure including a bump via portion and a bonding bump portion. The entirety of a bottom surface of the bump via portion is located within an area of a horizontal top surface of a pad portion of the connection pad-and-via structure.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 18, 2024
    Inventors: Hui-Min Huang, Wei-Hung Lin, Kai Jun Zhan, Chang-Jung Hsueh, Wan-Yu Chiang, Ming-Da Cheng
  • Publication number: 20240128148
    Abstract: A method includes attaching a package component to a package substrate, the package component includes: an interposer disposed over the package substrate; a first die disposed along the interposer; and a second die disposed along the interposer, the second die being laterally adjacent the first die; attaching a first thermal interface material to the first die, the first thermal interface material being composed of a first material; attaching a second thermal interface material to the second die, the second thermal interface material being composed of a second material different from the first material; and attaching a lid assembly to the package substrate, the lid assembly being further attached to the first thermal interface material and the second thermal interface material.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 18, 2024
    Inventors: Chang-Jung Hsueh, Po-Yao Lin, Hui-Min Huang, Ming-Da Cheng, Kathy Yan
  • Patent number: 11961817
    Abstract: An apparatus for forming a package structure is provided. The apparatus includes a processing chamber for bonding a first package component and a second package component. The apparatus also includes a bonding head disposed in the processing chamber. The bonding head includes a plurality of vacuum tubes communicating with a plurality of vacuum devices. The apparatus further includes a nozzle connected to the bonding head and configured to hold the second package component. The nozzle includes a plurality of first holes that overlap the vacuum tubes. The nozzle also includes a plurality of second holes offset from the first holes, wherein the second holes overlap at least two edges of the second package component. In addition, the apparatus includes a chuck table disposed in the processing chamber, and the chuck table is configured to hold and heat the first package component.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kai Jun Zhan, Chang-Jung Hsueh, Hui-Min Huang, Wei-Hung Lin, Ming-Da Cheng
  • Patent number: 11960082
    Abstract: An object detection method is suitable for a virtual reality system. The object detection method includes a plurality of first cameras of a head-mounted display (HMD) to capture a plurality of first frames. A plurality of second frames are captured through a plurality of second cameras in a tracker, wherein, the object detector searches for the object position in the first frames and the second frames.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: April 16, 2024
    Assignee: HTC CORPORATION
    Inventors: Jyun-Jhong Lin, Chun-Kai Huang, Heng-Li Hsieh, Yun-Jung Chang
  • Patent number: 11960106
    Abstract: The disclosure provides an augmented reality (AR) device, a notebook, and smart glasses. The AR device includes a laser source, a spatial light modulator (SLM), and a hologram optical element (HOE). The laser source provides a coherent laser ray. The SLM provides a diffraction pattern solely corresponding to the coherent laser ray. When the SLM receives the coherent laser ray, the diffraction pattern diffracts the coherent laser ray as a hologram in response to the coherent laser ray. The HOE provides a concave mirror effect merely in response to a wavelength of the coherent laser ray, wherein the HOE receives the hologram and magnifies the hologram as a stereoscopic virtual image.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: April 16, 2024
    Assignee: Acer Incorporated
    Inventors: Yi-Jung Chiu, Wei-Kuo Shih, Shih-Ting Huang
  • Publication number: 20240120672
    Abstract: A type of electrical connector that replaces the use of a conductive wire with a circuit board for transmitting signals to allow the conductive component of the electrical connector to transmit signals without relying on the conductive wire, addressing the known issue of difficulties in securely positioning the conductive component relative to the conductive wire during the electrical connector manufacturing. This innovation enables automated production of the electrical connector, consequently reducing production costs of the electrical connector.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 11, 2024
    Inventors: YING-CHUNG CHEN, MU-JUNG HUANG
  • Patent number: D1024051
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: Hui-Jung Huang, Hong-Kuan Li, I-Lun Li, Ling-Mei Kuo, Kuan-Ju Chen, Fang-Ying Huang, Kai-Hung Huang, Szu-Wei Yang, Kai-Teng Cheng