Patents by Inventor Jung-Huei Peng

Jung-Huei Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9293445
    Abstract: A device is described in one embodiment that includes a micro-electro-mechanical systems (MEMS) device disposed on a first substrate and a semiconductor device disposed on a second substrate. A bond electrically connects the MEMS device and the semiconductor device. The bond includes an interface between a first bonding layer including silicon on the first substrate and a second bonding layer including aluminum on the second substrate. The physical interface between the aluminum and silicon (e.g., amorphous silicon) can provide an electrical connection.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: March 22, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Liu, Li-Chen Chu, Hung-Hua Lin, H. T. Huang, Jung-Huei Peng, Yuan-Chih Hsieh, Lan-Lin, Chun-Wen Cheng, Chia-Shiung Tsai
  • Patent number: 9269679
    Abstract: In a wafer level chip scale packaging technique for MEMS devices, a deep trench is etched on a scribe line area between two CMOS devices of a CMOS substrate at first. After bonding of the CMOS substrate with a MEMS substrate, the deep trench is opened by thin-down process so that CMOS substrate is singulated while MEMS substrate is not (partial singulation). Electrical test pad on MEMS substrate is exposed and protection material can be filled through the deep trench around bonding layers. After filling the protection material, the wafer is diced to form packaged individual chips with protection from environment outside bonding layer.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: February 23, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Chuan Teng, Jung-Huei Peng, Shang-Ying Tsai, Li-Min Hung, Yao-Te Huang, Chin-Yi Cho
  • Publication number: 20160046482
    Abstract: A device includes a substrate, a routing conductive line over the substrate, a dielectric layer over the routing conductive line, and an etch stop layer over the dielectric layer. A Micro-Electro-Mechanical System (MEMS) device has a portion over the etch stop layer. A contact plug penetrates through the etch stop layer and the dielectric layer. The contact plug connects the portion of the MEMS device to the routing conductive line. An escort ring is disposed over the etch stop layer and under the MEMS device, wherein the escort ring encircles the contact plug.
    Type: Application
    Filed: October 28, 2015
    Publication date: February 18, 2016
    Inventors: Hung-Hua Lin, Hsin-Ting Huang, Lung Yuan Pan, Jung-Huei Peng, Shang-Ying Tsai, Yao-Te Huang
  • Patent number: 9264833
    Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate; a silicon oxide layer formed on one side of the first silicon substrate; a second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates; and a diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates, wherein the first plate and the diaphragm are configured to form a capacitive microphone.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: February 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Yao-Te Huang, Chin-Yi Cho, Li-Min Hung, Chun-Wen Cheng
  • Patent number: 9238581
    Abstract: An integrated circuit structure includes a triple-axis accelerometer, which further includes a proof-mass formed of a semiconductor material; a first spring formed of the semiconductor material and connected to the proof-mass, wherein the first spring is configured to allow the proof-mass to move in a first direction in a plane; and a second spring formed of the semiconductor material and connected to the proof-mass. The second spring is configured to allow the proof-mass to move in a second direction in the plane and perpendicular to the first direction. The triple-axis accelerometer further includes a conductive capacitor plate including a portion directly over, and spaced apart from, the proof-mass, wherein the conductive capacitor plate and the proof-mass form a capacitor; an anchor electrode contacting a semiconductor region; and a transition region connecting the anchor electrode and the conductive capacitor plate, wherein the transition region is slanted.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: January 19, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Shang-Ying Tsai, Jiou-Kang Lee, Jung-Huei Peng
  • Publication number: 20160009089
    Abstract: MEMS devices and methods of fabrication thereof are described. In one embodiment, the MEMS device includes a bottom alloy layer disposed over a substrate. An inner material layer is disposed on the bottom alloy layer, and a top alloy layer is disposed on the inner material layer, the top and bottom alloy layers including an alloy of at least two metals, wherein the inner material layer includes the alloy and nitrogen. The top alloy layer, the inner material layer, and the bottom alloy layer form a MEMS feature.
    Type: Application
    Filed: September 21, 2015
    Publication date: January 14, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jung-Huei Peng, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Ting-Hau Wu
  • Patent number: 9233839
    Abstract: A method for forming a MEMS device is provided. The method includes the following steps of providing a substrate having a first portion and a second portion; fabricating a membrane type sensor on the first portion of the substrate; and fabricating a bulk silicon sensor on the second portion of the substrate.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: January 12, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Jung-Huei Peng, Kuei-Sung Chang, Chun-Wen Cheng
  • Publication number: 20160002027
    Abstract: A method of forming a semiconductor device includes bonding a capping wafer and a base wafer to form a wafer package. The base wafer includes a first chip package portion, a second chip package portion, and a third chip package portion. The capping wafer includes a plurality of isolation trenches. Each isolation trench of the plurality of isolation trenches is substantially aligned with a corresponding trench region of one of the first chip package portion, the second chip package portion or the third chip package portion. The method also includes removing a portion of the capping wafer to expose a first chip package portion contact, a second chip package portion contact, and a third chip package portion contact. The method further includes separating the wafer package into a first chip package configured to perform a first operation, a second chip package configured to perform a second operation, and a third chip package configured to perform a third operation.
    Type: Application
    Filed: September 11, 2015
    Publication date: January 7, 2016
    Inventors: Chun-wen CHENG, Jung-Huei PENG, Shang-Ying TSAI, Hung-Chia TSAI, Yi-Chuan TENG
  • Patent number: 9212050
    Abstract: A cap and substrate having an electrical connection at a wafer level includes providing a substrate and forming an electrically conductive ground structure in the substrate and electrically coupled to the substrate. An electrically conductive path to the ground structure is formed in the substrate. A top cap is then provided, wherein the top cap includes an electrically conductive surface. The top cap is bonded to the substrate so that the electrically conductive surface of the top cap is electrically coupled to the path to the ground structure.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: December 15, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Jung-Huei Peng
  • Publication number: 20150340341
    Abstract: A package system includes a first substrate; and a second substrate electrically coupled with the first substrate. The package system further includes a semiconductor material between the first substrate and the second substrate. The semiconductor material includes a pad, and at least one guard ring surrounding the pad and spaced from the pad. The package system further includes a metallic material bonded to the semiconductor material, wherein the metallic material at least partially fills at least one opening in at least one of the first substrate or the second substrate.
    Type: Application
    Filed: July 31, 2015
    Publication date: November 26, 2015
    Inventors: Chia-Pao SHU, Chun-wen CHENG, Kuei-Sung CHANG, Hsin-Ting HUANG, Shang-Ying TSAI, Jung-Huei PENG
  • Patent number: 9181083
    Abstract: A device includes a substrate, a routing conductive line over the substrate, a dielectric layer over the routing conductive line, and an etch stop layer over the dielectric layer. A Micro-Electro-Mechanical System (MEMS) device has a portion over the etch stop layer. A contact plug penetrates through the etch stop layer and the dielectric layer. The contact plug connects the portion of the MEMS device to the routing conductive line. An escort ring is disposed over the etch stop layer and under the MEMS device, wherein the escort ring encircles the contact plug.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: November 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Ying Tsai, Hung-Hua Lin, Lung Yuan Pan, Yao-Te Huang, Hsin-Ting Huang, Jung-Huei Peng
  • Patent number: 9150404
    Abstract: A method of forming a semiconductor device having through molding vias includes eutectic bonding a capping wafer and a base wafer to form a wafer package. The base wafer includes a first chip package portion, a second chip package portion, and a third chip package portion. The capping wafer includes a plurality of isolation trenches and a plurality of separation trenches having a depth greater than the isolation trenches with respect to a same surface of the capping wafer. The method also includes removing a portion of the capping wafer exposing a first chip package portion contact, a second chip package portion contact, and a third chip package portion contact. The method further includes separating the wafer package to separate the wafer package into a first chip package, a second chip package, and a third chip package.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: October 6, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Publication number: 20150266722
    Abstract: A method includes forming a MEMS device, forming a bond layer adjacent the MEMS device, and forming a protection layer over the bond layer.
    Type: Application
    Filed: June 5, 2015
    Publication date: September 24, 2015
    Inventors: Ping-Yin Liu, Xin-Hua Huang, Hsin-Ting Huang, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
  • Patent number: 9138994
    Abstract: MEMS devices and methods of fabrication thereof are described. In one embodiment, the MEMS device includes a bottom alloy layer disposed over a substrate. An inner material layer is disposed on the bottom alloy layer, and a top alloy layer is disposed on the inner material layer, the top and bottom alloy layers including an alloy of at least two metals, wherein the inner material layer includes the alloy and nitrogen. The top alloy layer, the inner material layer, and the bottom alloy layer form a MEMS feature.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: September 22, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Huei Peng, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Ting-Hau Wu
  • Patent number: 9114396
    Abstract: A method of making a flowcell structure, the method comprising forming a first structure, forming a second structure and bonding the first structure to the second structure. Further, forming the first structure comprises forming one or more first bio-chemicals in a first substrate and printing a first glue layer on the first substrate. Forming the second structure comprises forming one or more second bio-chemicals in a second substrate.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: August 25, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shang-Ying Tsai, Jung-Huei Peng, Li-Ming Hung
  • Patent number: 9112001
    Abstract: A method of forming a package system includes providing a first substrate having a metallic pad and at least one metallic guard ring. The method further includes bonding the metallic pad of the first substrate with a semiconductor pad of a second substrate, wherein the at least one metallic guard ring is configured to at least partially interact with the semiconductor pad to form at least a first portion of an electrical bonding material between the first and second substrates.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: August 18, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Pao Shu, Chun-wen Cheng, Kuei-Sung Chang, Hsin-Ting Huang, Shang-Ying Tsai, Jung-Huei Peng
  • Publication number: 20150197419
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Application
    Filed: January 16, 2014
    Publication date: July 16, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Publication number: 20150196912
    Abstract: A method of making a flowcell structure, the method comprising forming a first structure, forming a second structure and bonding the first structure to the second structure. Further, forming the first structure comprises forming one or more first bio-chemicals in a first substrate and printing a first glue layer on the first substrate. Forming the second structure comprises forming one or more second bio-chemicals in a second substrate.
    Type: Application
    Filed: January 16, 2014
    Publication date: July 16, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shang-Ying TSAI, Jung-Huei PENG, Li-Ming HUNG
  • Publication number: 20150174700
    Abstract: According to an exemplary embodiment of the disclosure, a method of removing a waste part of a substrate is provided. The method includes: using a laser to partially drill the substrate to define the waste part; and applying megasonic vibration to the substrate to remove the waste part from the substrate.
    Type: Application
    Filed: December 23, 2013
    Publication date: June 25, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: CHIN-YI CHO, YI-CHUAN TENG, SHANG-YING TSAI, LI-MIN HUNG, YAO-TE HUANG, JUNG-HUEI PENG
  • Publication number: 20150166329
    Abstract: A method of forming a semiconductor device having through molding vias comprises eutectic bonding a capping wafer and a base wafer to form a wafer package. The base wafer comprises a first chip package portion, a second chip package portion, and a third chip package portion. The capping wafer comprises a plurality of isolation trenches and a plurality of separation trenches having a depth greater than the isolation trenches with respect to a same surface of the capping wafer. The method also comprises removing a portion of the capping wafer exposing a first chip package portion contact, a second chip package portion contact, and a third chip package portion contact. The method further comprises separating the wafer package to separate the wafer package into a first chip package, a second chip package, and a third chip package.
    Type: Application
    Filed: December 16, 2013
    Publication date: June 18, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-wen CHENG, Jung-Huei PENG, Shang-Ying TSAI, Hung-Chia TSAI, Yi-Chuan TENG