Patents by Inventor Jung-Huei Peng

Jung-Huei Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150166331
    Abstract: A method of forming a semiconductor device comprises bonding a capping wafer and a base wafer to form a wafer package. The base wafer comprises a plurality of chip package portions. The capping wafer comprises a plurality of isolation trenches. Each isolation trench of the plurality of isolation trenches is configured to substantially align with a corresponding chip package portion of the plurality of chip package portions. The method also comprises separating the wafer package into a plurality of chip packages. Each chip package of the plurality of chip packages comprises at least one chip package portion of the plurality of chip package portions.
    Type: Application
    Filed: December 30, 2014
    Publication date: June 18, 2015
    Inventors: Chun-wen CHENG, Jung-Huei PENG, Shang-Ying TSAI, Hung-Chia TSAI, Yi-Chuan TENG
  • Patent number: 9054121
    Abstract: A method includes forming a MEMS device, forming a bond layer adjacent the MEMS device, and forming a protection layer over the bond layer. The steps of forming the bond layer and the protection layer include in-situ deposition of the bond layer and the protection layer.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: June 9, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Liu, Xin-Hua Huang, Hsin-Ting Huang, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
  • Patent number: 9034677
    Abstract: The present disclosure provides a method including providing a first substrate; and forming a microelectromechanical system (MEMS) device on a first surface of the first substrate. A bond pad is formed on at least one bonding site on the first surface of the first substrate. The bonding site is recessed from the first surface. Thus, a top surface of the bond pad may lie below the plane of the top surface of the substrate. A device with recessed connective element(s) (e.g., bond pad) is also described. In further embodiments, a protective layer is formed on the recessed connective element during dicing of a substrate.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: May 19, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Ting Huang, Jung-Huei Peng, Shang-Ying Tsai, Yao-Te Huang, Ming-Tung Wu, Ping-Yin Liu, Xin-Hua Huang, Yuan-Chih Hsieh
  • Publication number: 20150123129
    Abstract: In a wafer level chip scale packaging technique for MEMS devices, a deep trench is etched on a scribe line area between two CMOS devices of a CMOS substrate at first. After bonding of the CMOS substrate with a MEMS substrate, the deep trench is opened by thin-down process so that CMOS substrate is singulated while MEMS substrate is not (partial singulation). Electrical test pad on MEMS substrate is exposed and protection material can be filled through the deep trench around bonding layers. After filling the protection material, the wafer is diced to form packaged individual chips with protection from environment outside bonding layer.
    Type: Application
    Filed: November 5, 2013
    Publication date: May 7, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Chuan Teng, Jung-Huei Peng, Shang-Ying Tsai, Li-Min Hung, Yao-Te Huang, Chin-Yi Cho
  • Publication number: 20150093303
    Abstract: The present disclosure provides flow cells and methods of fabricating flow cells. The method includes combining three portions: a first substrate, a second substrate, and microfluidic channels between the first substrate and the second substrate having walls of a photoresist dry film. Through-holes for inlet and outlet are formed in the first substrate or the second substrate. Patterned capture sites are stamped on the first substrate and the second substrate by a nanoimprint lithography process. In other embodiments, parts of the patterned capture sites are selectively attached to a surface chemistry pattern formed of silicon oxide islands each disposed on an outcrop of a soft bottom layer.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Ying Tsai, Li-Min Hung, Jung-Huei Peng
  • Publication number: 20150079704
    Abstract: The present disclosure relates to a micro-fluidic probe card that deposits a fluidic chemical onto a substrate with a minimal amount of fluidic chemical waste, and an associated method of operation. In some embodiments, the micro-fluidic probe card has a probe card body with a first side and a second side. A sealant element, which contacts a substrate, is connected to the second side of the probe card body in a manner that forms a cavity within an interior of the sealant element. A fluid inlet, which provides a fluid from a processing tool to the cavity, is a first conduit extending between the first side and the second side of the probe card body. A fluid outlet, which removes the fluid from the cavity, is a second conduit extending between the first side and the second side of the probe card body.
    Type: Application
    Filed: September 16, 2013
    Publication date: March 19, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Yi-Shao Liu, Fei-Lung Lai, Shang-Ying Tsai
  • Publication number: 20150035089
    Abstract: A method for forming a MEMS device is provided. The method includes the following steps of providing a substrate having a first portion and a second portion; fabricating a membrane type sensor on the first portion of the substrate; and fabricating a bulk silicon sensor on the second portion of the substrate.
    Type: Application
    Filed: August 1, 2013
    Publication date: February 5, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: YU-CHIA LIU, CHIA-HUA CHU, JUNG-HUEI PENG, KUEI-SUNG CHANG, CHUN-WEN CHENG
  • Publication number: 20150031159
    Abstract: A device includes a substrate, a routing conductive line over the substrate, a dielectric layer over the routing conductive line, and an etch stop layer over the dielectric layer. A Micro-Electro-Mechanical System (MEMS) device has a portion over the etch stop layer. A contact plug penetrates through the etch stop layer and the dielectric layer. The contact plug connects the portion of the MEMS device to the routing conductive line. An escort ring is disposed over the etch stop layer and under the MEMS device, wherein the escort ring encircles the contact plug.
    Type: Application
    Filed: September 12, 2014
    Publication date: January 29, 2015
    Inventors: Shang-Ying Tsai, Hung-Hua Lin, Lung Yuan Pan, Yao-Te Huang, Hsin-Ting Huang, Jung-Huei Peng
  • Patent number: 8941152
    Abstract: A method of forming a semiconductor device comprises forming a base wafer comprising a first chip package portion, a second chip package portion, and a third chip package portion. The method also comprises forming a capping wafer comprising a plurality of isolation trenches, each of the plurality of isolation trenches being configured to substantially align with one of the first chip package portion, the second chip package portion or the third chip package portion. The method further comprises eutectic bonding the capping wafer and the base wafer to form a wafer package. The method additionally comprises dicing the wafer package into a first chip package, a second chip package, and a third chip package. The method also comprises placing the first chip package, the second chip package, and the third chip package onto a substrate.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: January 27, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 8905293
    Abstract: A bond free of an anti-stiction layer and bonding method is disclosed. An exemplary method includes forming a first bonding layer; forming an interlayer over the first bonding layer; forming an anti-stiction layer over the interlayer; and forming a liquid from the first bonding layer and interlayer, such that the anti-stiction layer floats over the first bonding layer. A second bonding layer can be bonded to the first bonding layer while the anti-stiction layer floats over the first bonding layer, such that a bond between the first and second bonding layers is free of the anti-stiction layer.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: December 9, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Liu, Li-Cheng Chu, Hung-Hua Lin, Shang-Ying Tsai, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
  • Patent number: 8900905
    Abstract: A method for forming a MEMS device is provided. The method includes the following operations of providing a substrate having a first portion and a second portion; fabricating a membrane type sensor on the first portion of the substrate using a double-side process; and fabricating a bulk silicon sensor on the second portion of the substrate.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: December 2, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Jung-Huei Peng, Kuei-Sung Chang, Chun-Wen Cheng
  • Patent number: 8853801
    Abstract: A device includes a substrate, a routing conductive line over the substrate, a dielectric layer over the routing conductive line, and an etch stop layer over the dielectric layer. A Micro-Electro-Mechanical System (MEMS) device has a portion over the etch stop layer. A contact plug penetrates through the etch stop layer and the dielectric layer. The contact plug connects the portion of the MEMS device to the routing conductive line. An escort ring is disposed over the etch stop layer and under the MEMS device, wherein the escort ring encircles the contact plug.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: October 7, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Ying Tsai, Jung-Huei Peng, Hsin-Ting Huang, Yao-Te Huang, Lung Yuan Pan, Hung-Hua Lin
  • Publication number: 20140283369
    Abstract: A method of forming a structure for a gyroscope sensor includes forming a first dielectric over a substrate and a material layer over the first dielectric layer. A first portion of the material layer is removed to form a recess and a second portion of the material layer is removed to define a first channel between a gyro disk and a frame. A second channel is formed in the substrate corresponding to the first channel, and a portion of the first dielectric is removed to form a second dielectric between the gyro disk and the substrate.
    Type: Application
    Filed: June 10, 2014
    Publication date: September 25, 2014
    Inventors: Ting-Hau WU, Chun-Ren CHENG, Jiou-Kang LEE, Jung-Huei PENG, Shang-Ying TSAI
  • Patent number: 8841201
    Abstract: A method for fabricating a semiconductor device is disclosed. A first substrate is arranged over a second substrate. A wafer bonding process is performed on the semiconductor device. First regions of the device are enclosed by the bonding process. Second regions of the device remain exposed. One or more processes are performed on the exposed second regions, after performing the wafer bonding process. The one or more processes include a fill process that forms a fill material within the exposed second regions. An edge seal material is applied on the first and second substrates after performing the one or more processes.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: September 23, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Chuan Teng, Jung-Huei Peng, Shang-Ying Tsai, Hsin-Ting Huang, Lin-Min Hung, Yao-Te Huang, Chin-Yi Cho
  • Publication number: 20140270272
    Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate; a silicon oxide layer formed on one side of the first silicon substrate; a second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates; and a diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates, wherein the first plate and the diaphragm are configured to form a capacitive microphone.
    Type: Application
    Filed: August 22, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Yao-Te Huang, Chin-Yi Cho, Li-Min Hung, Chun-Wen Cheng
  • Publication number: 20140248730
    Abstract: The present disclosure provides a method including providing a first substrate; and forming a microelectromechanical system (MEMS) device on a first surface of the first substrate. A bond pad is formed on at least one bonding site on the first surface of the first substrate. The bonding site is recessed from the first surface. Thus, a top surface of the bond pad may lie below the plane of the top surface of the substrate. A device with recessed connective element(s) (e.g., bond pad) is also described. In further embodiments, a protective layer is formed on the recessed connective element during dicing of a substrate.
    Type: Application
    Filed: October 18, 2013
    Publication date: September 4, 2014
    Inventors: Hsin-Ting Huang, Jung-Huei Peng, Shang-Ying Tsai, Yao-Te Huang, Ming-Tung Wu, Ping-Yin Liu, Xin-Hua Huang, Yuan-Chih Hsieh
  • Publication number: 20140220735
    Abstract: A wafer seal ring may be formed on a wafer having a pattern structure with a pattern density. The wafer seal ring pattern structure may include a plurality of lines having a width and a spacing that may be approximately equal to a width and a spacing of die bond rings on the wafer. The wafer having the wafer seal ring formed thereon may be bonded to a wafer that may not have a wafer seal ring. A pair of wafers may be formed with respective wafer seal rings formed in a corresponding manner. The pair of wafers may be bonded together with the wafer seal rings aligned and bonded together to form a seal ring structure between the bonded wafers.
    Type: Application
    Filed: February 5, 2013
    Publication date: August 7, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Chuan Teng, Jung-Huei Peng, Shang-Ying Tsai, Hsin-Ting Huang, Li-Min Hung, Yao-Te Huang, Chin-Yi Cho
  • Patent number: 8776600
    Abstract: A gyroscope sensor includes a gyro disk. A first light source is configured to provide a first light beam. A first light receiver is configured to receive the first light beam for sensing a vibration at a first direction of the gyro disk. A second light source is configured to provide a second light beam substantially parallel with the first light beam. A second light receiver is configured to receive the second light beam for sensing a vibration in a second direction of the gyro disk. The second direction is different from the first direction.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: July 15, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Jung-Huei Peng, Shang-Ying Tsai
  • Publication number: 20140170849
    Abstract: A method of forming a package system includes providing a first substrate having a metallic pad and at least one metallic guard ring. The method further includes bonding the metallic pad of the first substrate with a semiconductor pad of a second substrate, wherein the at least one metallic guard ring is configured to at least partially interact with the semiconductor pad to form at least a first portion of an electrical bonding material between the first and second substrates.
    Type: Application
    Filed: February 5, 2014
    Publication date: June 19, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Pao SHU, Chun-wen CHENG, Kuei-Sung CHANG, Hsin-Ting HUANG, Shang-Ying TSAI, Jung-Huei PENG
  • Patent number: 8735260
    Abstract: The present disclosure provide a method of manufacturing a microelectronic device. The method includes forming a bonding pad on a first substrate; forming wiring pads on the first substrate; forming a protection material layer on the first substrate, on sidewalls and top surfaces of the wiring pads, and on sidewalls of the bonding pad, such that a top surface of the bonding pad is at least partially exposed; bonding the first substrate to a second substrate through the bonding pad; opening the second substrate to expose the wiring pads; and removing the protection material layer.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: May 27, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Ying Tsai, Jung-Huei Peng, Hsin-Ting Huang, Hung-Hua Lin, Ming-Tung Wu, Ping-Yin Liu, Yao-Te Huang, Yuan-Chih Hsieh