Patents by Inventor Jung-Huei Peng
Jung-Huei Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20140138853Abstract: A device is described in one embodiment that includes a micro-electro-mechanical systems (MEMS) device disposed on a first substrate and a semiconductor device disposed on a second substrate. A bond electrically connects the MEMS device and the semiconductor device. The bond includes an interface between a first bonding layer including silicon on the first substrate and a second bonding layer including aluminum on the second substrate. The physical interface between the aluminum and silicon (e.g., amorphous silicon) can provide an electrical connection.Type: ApplicationFiled: January 31, 2014Publication date: May 22, 2014Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Martin Liu, Richard Chu, Hung-Hua LIn, H. T. Huang, Jung-Huei Peng, Yuan-Chih Hsieh, Lan-Lin, Chun-Wen Cheng, Chia-Shiung Tsai
-
Patent number: 8728845Abstract: The present disclosure provides various methods for removing an anti-stiction layer. An exemplary method includes forming an anti-stiction layer over a substrate, including over a first substrate region of a first material and a second substrate region of a second material, wherein the second material is different than the first material; and selectively removing the anti-stiction layer from the second substrate region of the second material without using a mask.Type: GrantFiled: March 24, 2011Date of Patent: May 20, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Wei Lin, Ping-Yin Liu, Lan-Lin Chao, Jung-Huei Peng, Chia-Shiung Tsai
-
Patent number: 8686571Abstract: A structure comprises a first semiconductor substrate, a first bonding layer deposited on a bonding side the first semiconductor substrate, a second semiconductor substrate stacked on top of the first semiconductor substrate and a second bonding layer deposited on a bonding side of the second semiconductor substrate, wherein the first bonding layer is of a horizontal length greater than a horizontal length of the second semiconductor substrate, and wherein there is a gap between an edge of the second bonding layer and a corresponding edge of the second semiconductor substrate.Type: GrantFiled: August 9, 2012Date of Patent: April 1, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsin-Ting Huang, Jung-Huei Peng, Shang-Ying Tsai, Li-Min Hung, Yao-Te Huang, Yi-Chuan Teng, Chin-Yi Cho
-
Patent number: 8674495Abstract: A package system includes a first substrate. A second substrate is electrically coupled with the first substrate. At least one electrical bonding material is disposed between the first substrate and the second substrate. The at least one electrical bonding material includes a eutectic bonding material. The eutectic bonding material includes a metallic material and a semiconductor material. The metallic material is disposed adjacent to a surface of the first substrate. The metallic material includes a first pad and at least one first guard ring around the first pad.Type: GrantFiled: February 25, 2011Date of Patent: March 18, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Pao Shu, Chun-Wen Cheng, Kuei-Sung Chang, Hsin-Ting Huang, Shang-Ying Tsai, Jung-Huei Peng
-
Publication number: 20140061730Abstract: A cap and substrate having an electrical connection at a wafer level includes providing a substrate and forming an electrically conductive ground structure in the substrate and electrically coupled to the substrate. An electrically conductive path to the ground structure is formed in the substrate. A top cap is then provided, wherein the top cap includes an electrically conductive surface. The top cap is bonded to the substrate so that the electrically conductive surface of the top cap is electrically coupled to the path to the ground structure.Type: ApplicationFiled: November 22, 2013Publication date: March 6, 2014Inventor: Jung-Huei Peng
-
Publication number: 20140042625Abstract: A structure comprises a first semiconductor substrate, a first bonding layer deposited on a bonding side the first semiconductor substrate, a second semiconductor substrate stacked on top of the first semiconductor substrate and a second bonding layer deposited on a bonding side of the second semiconductor substrate, wherein the first bonding layer is of a horizontal length greater than a horizontal length of the second semiconductor substrate, and wherein there is a gap between an edge of the second bonding layer and a corresponding edge of the second semiconductor substrate.Type: ApplicationFiled: August 9, 2012Publication date: February 13, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsin-Ting Huang, Jung-Huei Peng, Shang-Ying Tsai, Li-Min Hung, Yao-Te Huang, Yi-Chuan Teng, Chin-Yi Cho
-
Patent number: 8647962Abstract: The present disclosure provides a method of bonding a plurality of substrates. In an embodiment, a first substrate includes a first bonding layer. The second substrate includes a second bonding layer. The first bonding layer includes silicon; the second bonding layer includes aluminum. The first substrate and the second substrate are bonded forming a bond region having an interface between the first bonding layer and the second bonding layer. A device having a bonding region between substrates is also provided. The bonding region includes an interface between a layer including silicon and a layer including aluminum.Type: GrantFiled: March 23, 2010Date of Patent: February 11, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Martin Liu, Richard Chu, Hung Hua Lin, Hsin-Ting Huang, Jung-Huei Peng, Yuan-Chih Hsieh, Lan-Lin Chao, Chun-Wen Cheng, Chia-Shiung Tsai
-
Patent number: 8609466Abstract: A cap and substrate having an electrical connection at a wafer level includes providing a substrate and forming an electrically conductive ground structure in the substrate and electrically coupled to the substrate. An electrically conductive path to the ground structure is formed in the substrate. A top cap is then provided, wherein the top cap includes an electrically conductive surface. The top cap is bonded to the substrate so that the electrically conductive surface of the top cap is electrically coupled to the path to the ground structure.Type: GrantFiled: July 15, 2009Date of Patent: December 17, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Jung-Huei Peng
-
Patent number: 8580594Abstract: The present disclosure provides a method including providing a first substrate; and forming a microelectromechanical system (MEMS) device on a first surface of the first substrate. A bond pad is formed on at least one bonding site on the first surface of the first substrate. The bonding site is recessed from the first surface. Thus, a top surface of the bond pad may lie below the plane of the top surface of the substrate. A device with recessed connective element(s) (e.g., bond pad) is also described. In further embodiments, a protective layer is formed on the recessed connective element during dicing of a substrate.Type: GrantFiled: August 9, 2011Date of Patent: November 12, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsin-Ting Huang, Jung-Huei Peng, Shang-Ying Tsai, Yao-Te Huang, Ming-Tung Wu, Ping-Yin Liu, Xin-Hua Huang, Yuan-Chih Hsieh
-
Publication number: 20130277770Abstract: A device includes a substrate, a routing conductive line over the substrate, a dielectric layer over the routing conductive line, and an etch stop layer over the dielectric layer. A Micro-Electro-Mechanical System (MEMS) device has a portion over the etch stop layer. A contact plug penetrates through the etch stop layer and the dielectric layer. The contact plug connects the portion of the MEMS device to the routing conductive line. An escort ring is disposed over the etch stop layer and under the MEMS device, wherein the escort ring encircles the contact plug.Type: ApplicationFiled: April 19, 2012Publication date: October 24, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shang-Ying Tsai, Jung-Huei Peng, Hsin-Ting Huang, Yao-Te Huang, Lung Yuan Pan, Hung-Hua Lin
-
Patent number: 8563400Abstract: Methods and structures using laser bonding for stacking semiconductor substrates are described. In one embodiment, a method of forming a semiconductor device includes forming a trench in a first substrate, and a bond pad on a second substrate comprising active circuitry. A top surface of the bond pad includes a first material. The first substrate is aligned over the second substrate to align the trench over the bond pad. An electromagnetic beam is directed into the trench to form a bond between the first material on the bond pad and a second material at a bottom surface of the first substrate.Type: GrantFiled: February 4, 2013Date of Patent: October 22, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Jung-Huei Peng
-
Patent number: 8455999Abstract: A method of forming an integrated circuit structure including providing a wafer comprising a front surface and a back surface, wherein the wafer comprises a chip; forming an opening extending from the back surface into the chip; filling an organic material in the opening, wherein substantially no portion of the organic material is outside of the opening and on the back surface of the wafer; and baking the organic material to cause a contraction of the organic material.Type: GrantFiled: September 22, 2011Date of Patent: June 4, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Jung-Huei Peng
-
Publication number: 20130099355Abstract: A method includes forming a MEMS device, forming a bond layer adjacent the MEMS device, and forming a protection layer over the bond layer.Type: ApplicationFiled: October 24, 2011Publication date: April 25, 2013Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ping-Yin Liu, Xin-Hua Huang, Hsin-Ting Huang, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
-
Patent number: 8377798Abstract: A method for wafer to wafer bonding in semiconductor packaging provides for roughening the bonding surfaces in one embodiment. Also provided is a method for passivating the bonding surfaces with a lower melting point material that becomes forced away from the bonding interface during bonding. Also provided is a method for forming an eutectic at the bonding interface to reduce the impact of any native oxide formation at the bonding interface.Type: GrantFiled: November 10, 2010Date of Patent: February 19, 2013Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Jung-Huei Peng, Hsin-Ting Huang, Yao-Te Huang, Shang-Ying Tsai, Ping-Yin Liu
-
Publication number: 20130037891Abstract: The present disclosure provides a method including providing a first substrate; and forming a microelectromechanical system (MEMS) device on a first surface of the first substrate. A bond pad is formed on at least one bonding site on the first surface of the first substrate. The bonding site is recessed from the first surface. Thus, a top surface of the bond pad may lie below the plane of the top surface of the substrate. A device with recessed connective element(s) (e.g., bond pad) is also described. In further embodiments, a protective layer is formed on the recessed connective element during dicing of a substrate.Type: ApplicationFiled: August 9, 2011Publication date: February 14, 2013Applicant: Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")Inventors: Hsin-Ting Huang, Jung-Huei Peng, Shang-Ying Tsai, Yao-Te Huang, Ming-Tung Wu, Ping-Yin Liu, Xin-Hua Huang, Yuan-Chih Hsieh
-
Patent number: 8367516Abstract: Methods and structures using laser bonding for stacking semiconductor substrates are described. In one embodiment, a method of forming a semiconductor device includes forming a trench in a first substrate, and a bond pad on a second substrate comprising active circuitry. A top surface of the bond pad includes a first material. The first substrate is aligned over the second substrate to align the trench over the bond pad. An electromagnetic beam is directed into the trench to form a bond between the first material on the bond pad and a second material at a bottom surface of the first substrate.Type: GrantFiled: November 13, 2009Date of Patent: February 5, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Jung-Huei Peng
-
Patent number: 8362578Abstract: An integrated circuit structure includes a triple-axis accelerometer, which further includes a proof-mass formed of a semiconductor material; a first spring formed of the semiconductor material and connected to the proof-mass, wherein the first spring is configured to allow the proof-mass to move in a first direction in a plane; and a second spring formed of the semiconductor material and connected to the proof-mass. The second spring is configured to allow the proof-mass to move in a second direction in the plane and perpendicular to the first direction. The triple-axis accelerometer further includes a conductive capacitor plate including a portion directly over, and spaced apart from, the proof-mass, wherein the conductive capacitor plate and the proof-mass form a capacitor; an anchor electrode contacting a semiconductor region; and a transition region connecting the anchor electrode and the conductive capacitor plate, wherein the transition region is slanted.Type: GrantFiled: March 31, 2010Date of Patent: January 29, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Hau Wu, Chun-Ren Cheng, Shang-Ying Tsai, Jiou-Kang Lee, Jung-Huei Peng
-
Publication number: 20130000409Abstract: A gyroscope sensor includes a gyro disk. A first light source is configured to provide a first light beam. A first light receiver is configured to receive the first light beam for sensing a vibration at a first direction of the gyro disk. A second light source is configured to provide a second light beam substantially parallel with the first light beam. A second light receiver is configured to receive the second light beam for sensing a vibration in a second direction of the gyro disk. The second direction is different from the first direction.Type: ApplicationFiled: September 11, 2012Publication date: January 3, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ting-Hau WU, Chun-Ren CHENG, Jiou-Kang LEE, Jung-Huei PENG, Shang-Ying TSAI
-
Patent number: 8281658Abstract: A gyroscope sensor includes a gyro disk. A first light source is configured to provide a first light beam adjacent to a first edge of the gyro disk. A first light receiver is configured to receive the first light beam for sensing a vibration at a first direction of the gyro disk.Type: GrantFiled: January 12, 2009Date of Patent: October 9, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Jung-Huei Peng, Shang-Ying Tsai
-
Publication number: 20120244677Abstract: The present disclosure provides various methods for removing an anti-stiction layer. An exemplary method includes forming an anti-stiction layer over a substrate, including over a first substrate region of a first material and a second substrate region of a second material, wherein the second material is different than the first material; and selectively removing the anti-stiction layer from the second substrate region of the second material without using a mask.Type: ApplicationFiled: March 24, 2011Publication date: September 27, 2012Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Wei Lin, Ping-Yin Liu, Lan-Lin Chao, Jung-Huei Peng, Chia-Shiung Tsai