Abstract: Provided are a silicon nitride film etching composition, a method of etching a silicon nitride film using the same, and a manufacturing method of a semiconductor device. Specifically, a silicon nitride film may be highly selectively etched as compared with a silicon oxide film, and when the composition is applied to an etching process at a high temperature and a semiconductor manufacturing process, not only no precipitate occurs but also anomalous growth in which the thickness of the silicon oxide film is rather increased does not occur, thereby minimizing defects and reliability reduction.

Abstract: A bonded structure is disclosed. The bonded structure can include a first element that has a first plurality of contact pads. The first plurality of contact pads includes a first contact pad and a second redundant contact pad. The bonded structure can also include a second element directly bonded to the first element without an intervening adhesive. The second element has a second plurality of contact pads. The second plurality of contact pads includes a third contact pad and a fourth redundant contact pad. The first contact pad is configured to connect to the third contact pad. The second contact pad is configured to connect to the fourth contact pad. The bonded structure can include circuitry that has a first state in which an electrical signal is transferred to the first contact pad and a second state in which the electrical signal is transferred to the second contact pad.

Abstract: Provided are a silicon nitride film etching composition, a method of etching a silicon nitride film using the same, and a manufacturing method of a semiconductor device. Specifically, a silicon nitride film may be stably etched with a high selection ratio relative to a silicon oxide film, and when the composition is applied to an etching process at a high temperature and a semiconductor manufacturing process, not only no precipitate occurs but also anomalous growth in which the thickness of the silicon oxide film is rather increased does not occur, thereby minimizing defects and reliability reduction.

Abstract: A method for displaying a message in a messenger service by a user terminal is proposed. The method may include receiving the message from a server. The method may also include receiving a mask command for the message from the server when text information extracted from the message satisfies a preset condition. The method may further include displaying a mask message corresponding to the message in a chat room of the messenger service based on the mask command.

Abstract: For a neural network inference circuit that executes a neural network including multiple computation nodes at multiple layers for which data is stored in a plurality of memory banks, some embodiments provide a method for dynamically putting memory banks into a sleep mode of operation to conserve power. The method tracks the accesses to individual memory banks and, if a certain number of clock cycles elapse with no access to a particular memory bank, sends a signal to the memory bank indicating that it should operate in a sleep mode. Circuit components involved in dynamic memory sleep, in some embodiments, include a core RAM pipeline, a core RAM sleep controller, a set of core RAM bank select decoders, and a set of core RAM memory bank wrappers.

Abstract: Some embodiments provide an IC for implementing a machine-trained network with multiple layers. The IC includes a set of circuits to compute a dot product of (i) a first number of input values computed by other circuits of the IC and (ii) a set of predefined weight values, several of which are zero, with a weight value for each of the input values. The set of circuits includes (i) a dot product computation circuit to compute the dot product based on a second number of inputs and (ii) for each input value, at least two sets of wires for providing the input value to at least two of the dot product computation circuit inputs. The second number is less than the first number. Each input value with a corresponding weight value that is not equal to zero is provided to a different one of the dot product computation circuit inputs.

Abstract: The present disclosure provides chip architectures for FPGAs and other routing implementations that provide for increased memory with high bandwidth, in a reduced size, accessible with reduced latency. Such architectures include a first layer in advanced node and a second layer in legacy node. The first layer includes an active die, active circuitry, and a configurable memory, and the second layer includes a passive die with wiring. The second layer is bonded to the first layer such that the wiring of the second layer interconnects with the active circuitry of the first layer and extends an amount of wiring possible in the first layer.

Abstract: Some embodiments provide a method for a neural network inference circuit that executes a neural network. The method loads a first set of inputs into an input buffer and computes a first dot product between the first set of inputs and a set of weights. The method shifts the first set of inputs in the buffer while loading a second set of inputs into the buffer such that a first subset of the first set of inputs is removed from the buffer, a second subset of the first set of inputs is moved to new locations in the buffer, and a second set of inputs are loaded into locations in the buffer vacated by the shifting. The method computes a second dot product between (i) the second set of inputs and the second subset of the first set of inputs and (ii) the set of weights.

Abstract: Some embodiments provide a neural network inference circuit for executing a neural network that includes multiple layers of computation nodes. At least a subset of the layers include non-convolutional layers. The neural network inference circuit includes multiple cores with memories that store input values for the layers. The cores are grouped into multiple clusters. For each cluster, the neural network inference circuit includes a set of processing circuits for receiving input values from the cores of the cluster and executing the computation nodes of the non-convolutional layers.

Abstract: Some embodiments provide a method for a neural network inference circuit that executes a neural network. The method loads a first set of inputs into an input buffer and computes a first dot product between the first set of inputs and a set of weights. The method shifts the first set of inputs in the buffer while loading a second set of inputs into the buffer such that a first subset of the first set of inputs is removed from the buffer, a second subset of the first set of inputs is moved to new locations in the buffer, and a second set of inputs are loaded into locations in the buffer vacated by the shifting. The method computes a second dot product between (i) the second set of inputs and the second subset of the first set of inputs and (ii) the set of weights.

Abstract: A method of providing information on a social networking service (SNS) activity to a chatroom, performed by a user terminal, includes: transmitting, to a server, an SNS request for each of a plurality of anonymous profiles created to be interlinked with an account of a user for an instant messaging service (IMS); displaying information on an SNS activity performed through a first anonymous profile selected by the user in correspondence with a chatroom in which the user participates in the IMS, from among the plurality of anonymous profiles, in the chatroom; receiving an input of changing a profile of the user, selected corresponding to the to chatroom, from the first anonymous profile to a second anonymous profile; and displaying information on an SNS activity performed through the second anonymous profile in the chatroom.

Abstract: A bonded structure is disclosed. The bonded structure can include a first element that has a first plurality of contact pads. The first plurality of contact pads includes a first contact pad and a second redundant contact pad. The bonded structure can also include a second element directly bonded to the first element without an intervening adhesive. The second element has a second plurality of contact pads. The second plurality of contact pads includes a third contact pad and a fourth redundant contact pad. The first contact pad is configured to connect to the third contact pad. The second contact pad is configured to connect to the fourth contact pad. The bonded structure can include circuitry that has a first state in which an electrical signal is transferred to the first contact pad and a second state in which the electrical signal is transferred to the second contact pad.

Abstract: Some embodiments provide an IC for implementing a machine-trained network with multiple layers. The IC includes a set of circuits to compute a dot product of (i) a first number of input values computed by other circuits of the IC and (ii) a set of predefined weight values, several of which are zero, with a weight value for each of the input values. The set of circuits includes (i) a dot product computation circuit to compute the dot product based on a second number of inputs and (ii) for each input value, at least two sets of wires for providing the input value to at least two of the dot product computation circuit inputs. The second number is less than the first number. Each input value with a corresponding weight value that is not equal to zero is provided to a different one of the dot product computation circuit inputs.

Abstract: Some embodiments provide a neural network inference circuit for executing a neural network that includes multiple layers of computation nodes. At least a subset of the layers include non-convolutional layers. The neural network inference circuit includes multiple cores with memories that store input values for the layers. The cores are grouped into multiple clusters. For each cluster, the neural network inference circuit includes a set of processing circuits for receiving input values from the cores of the cluster and executing the computation nodes of the non-convolutional layers.

Abstract: A bonded structure is disclosed. The bonded structure can include a first element that has a first plurality of contact pads. The first plurality of contact pads includes a first contact pad and a second redundant contact pad. The bonded structure can also include a second element directly bonded to the first element without an intervening adhesive. The second element has a second plurality of contact pads. The second plurality of contact pads includes a third contact pad and a fourth redundant contact pad. The first contact pad is configured to connect to the third contact pad. The second contact pad is configured to connect to the fourth contact pad. The bonded structure can include circuitry that has a first state in which an electrical signal is transferred to the first contact pad and a second state in which the electrical signal is transferred to the second contact pad.

Abstract: Provides a method for adjusting a thermal field of silicon carbide single crystal growth, and steps comprise: (A) screening a silicon carbide source, and filling into a bottom of a graphite crucible; (B) placing a guide inside the graphite crucible; (C) placing a rigid heat conductive material on the guide, so that a gap between the guide and a crucible wall of the graphite crucible is reduced; (D) fixing a seed crystal on a top of the graphite crucible; (E) placing the graphite crucible equipped with the silicon carbide source and the seed crystal in an induction high-temperature furnace used by physical vapor transport method; (F) performing a silicon carbide crystal growth process; and (G) obtaining a silicon carbide single crystal.

Abstract: The present invention relates to a biomarker composition for diagnosing radiation-resistant cancer comprising PMVK as an active ingredient and a method of diagnosing radiation-resistant cancer using the same, and when the PMVK is knocked down, it is confirmed that the survival rate of cancer cells decreases during radiation treatment, and based on this, the possibility as a factor related to radiation therapy resistance to cancer was suggested, and the PMVK can be used as a new target to enhance the effect of radiation therapy on human cancer cells.

Abstract: Provided is a method of enhancing silicon carbide monocrystalline growth yield, including the steps of: (A) filling a bottom of a graphite crucible with a silicon carbide raw material selected; (B) performing configuration modification on a graphite seed crystal platform; (C) fastening a silicon carbide seed crystal to the modified graphite seed crystal platform with a graphite clamping accessory; (D) placing the graphite crucible containing the silicon carbide raw material and the silicon carbide seed crystal in an inductive high-temperature furnace; (E) performing silicon carbide crystal growth process by physical vapor transport; and (F) obtaining silicon carbide monocrystalline crystals. The geometric configuration of the surface of the graphite seed crystal platform is modified to eradicate development of peripheral grain boundary.

Abstract: A method of providing information on a social networking service (SNS) activity to a chatroom, performed by a user terminal, includes: transmitting, to a server, an SNS request for each of a plurality of anonymous profiles created to be interlinked with an account of a user for an instant messaging service (IMS); displaying information on an SNS activity performed through a first anonymous profile selected by the user in correspondence with a chatroom in which the user participates in the IMS, from among the plurality of anonymous profiles, in the chatroom; receiving an input of changing a profile of the user, selected corresponding to the chatroom, from the first anonymous profile to a second anonymous profile; and displaying information on an SNS activity performed through the second anonymous profile in the chatroom.

Abstract: Some embodiments provide a method for a circuit that executes a neural network including multiple nodes. The method loads a set of weight values for a node into a set of weight value buffers, a first set of bits of each input value of a set of input values for the node into a first set of input value buffers, and a second set of bits of each of the input values into a second set of input value buffers. The method computes a first dot product of the weight values and the first set of bits of each input value and a second dot product of the weight values and the second set of bits of each input value. The method shifts the second dot product by a particular number of bits and adds the first dot product with the bit-shifted second dot product to compute a dot product for the node.