Abstract: An integrated circuit with a clock distribution network is provided. The clock distribution network may include configurable clock routing paths linking a clock source to one or more clock tree roots and may also include fixed clock routing paths linking the clock tree roots to corresponding leaf nodes. Both the configurable clock routing paths and the fixed clock routing paths can be implemented using an array of logic regions, where each logic region includes a clock switching box, a horizontal routing segment, a vertical routing segment, and associated logic circuitry. The configurable routing paths may include horizontal/vertical routing segments with bidirectional tristate buffers. The fixed routing paths may include horizontal/vertical routing segments with unidirectional inverters that are configured to form an H-tree.

Abstract: Some embodiments provide a configurable integrated circuit (IC) having a routing fabric that includes configurable storage element in its routing fabric. In some embodiments, the configurable storage element includes a parallel distributed path for configurably providing a pair of transparent storage elements. The pair of configurable storage elements can configurably act either as non-transparent (i.e., clocked) storage elements or transparent configurable storage elements. In some embodiments, the configurable storage element in the routing fabric performs both routing and storage operations by a parallel distributed path that includes a clocked storage element and a bypass connection. In some embodiments, the configurable storage element perform both routing and storage operations by a pair of master-slave latches but without a bypass connection.

Abstract: In a method of fabricating graphite films, mesophase pitch, a polymer material and an organic solvent are used to produce a carbon precursor slurry, and the carbon precursor slurry is coated to produce the graphite films. Since the method of using natural graphite as a raw material in production requires a number of purification processes to manufacture an expanded graphite powder before the graphite films can be produced, and thus the fabricating cost is very high, and other high-priced materials such as polyimide (PI) or graphene also will increase the total cost.

Abstract: The present invention relates to a pharmaceutical composition, which contains a mixture of extracts of Stemonae Radix, Asparagi Tuber, Scutellariae Radix, Schisandrae Fructus, Rehmanniae Radix Preparata, Armeniacae Semen, and Moutan Cortex Radicis, for suppressing the occurrence of inflammatory bowel diseases due to cigarette smoke, a method for preventing or treating inflammatory bowel diseases, a method for suppressing the expression of inflammatory cytokines by using the composition, and to a food composition, which contains a mixture of extracts of Stemonae Radix, Asparagi Tuber, Scutellariae Radix, Schisandrae Fructus, Rehmanniae Radix Preparata, Armeniacae Semen, and Moutan Cortex Radicis, for preventing or ameliorating inflammatory bowel diseases due to cigarette smoke.

Abstract: The present invention relates to a pharmaceutical composition, which comprises a Stemonae Radix extract, for preventing or treating the occurrence of inflammatory bowel diseases due to cigarette smoke, a method for preventing or treating the occurrence of inflammatory bowel diseases using the composition, a method for suppressing the expression of inflammatory cytokines using the composition, and to a food composition, which comprises the Stemonae Radix extract, for preventing or treating the occurrence of inflammatory bowel diseases due to cigarette smoke.

Abstract: Some embodiments provide a configurable integrated circuit (IC) having a routing fabric that includes configurable storage element in its routing fabric. In some embodiments, the configurable storage element includes a parallel distributed path for configurably providing a pair of transparent storage elements. The pair of configurable storage elements can configurably act either as non-transparent (i.e., clocked) storage elements or transparent configurable storage elements. In some embodiments, the configurable storage element in the routing fabric performs both routing and storage operations by a parallel distributed path that includes a clocked storage element and a bypass connection. In some embodiments, the configurable storage element perform both routing and storage operations by a pair of master-slave latches but without a bypass connection.

Abstract: A method and an apparatus for mapping a quadrature amplitude modulation (QAM) symbol. The QAM symbol mapping apparatus includes a frequency checker, which checks frequencies of sub-carriers in an orthogonal frequency division multiplexing (OFDM) symbol; and a data categorizer, which maps data coded for error correction and uncoded data to the sub-carriers based on the checked frequencies, wherein the data categorizer maps a combination of the coded data and the uncoded data with respect to sub-carriers having frequencies lower than a reference frequency.

Abstract: An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a row of the configurable logic circuits and multiple configuration retrieval circuits for providing configuration bits to the row of configurable logic circuits. The IC also includes a row configuration controller for forcing the multiple configuration retrieval circuits to output a particular configuration value based on a user signal that is received at runtime.

Abstract: A non-volatile memory device includes a substrate; a first conductive layer over the substrate, a second conductive layer over the first conductive layer, a stacked structure disposed over the second conductive layer, wherein the stacked structure includes a plurality of first inter-layer dielectric layers and a plurality of third conductive layers alternately stacked, a pair of first channels that penetrate the stacked structure and the second conductive layer, a second channel which is buried in the first conductive layer, covered by the second conductive layer, and coupled to lower ends of the pair of the first channels; and a memory layer formed along internal walls of the first and second channels.

Abstract: The present embodiments relate to a dye for a dye-sensitized solar cell and a dye-sensitized solar cell prepared from the same. The dye includes a fluorenyl-containing compound. The dye according to the present embodiments is applied to a light absorption layer to improve photovoltaic efficiency and increase an open-circuit voltage.

Abstract: A method for forming a polysilicon layer includes forming an amorphous silicon layer over a substrate, performing a first thermal treatment of the amorphous silicon layer by performing an implantation with a gas that includes silicon (Si), and performing a second thermal treatment on the thermally treated layer at a temperature higher than a temperature of the first thermal treatment.

Abstract: A method and an apparatus for mapping a quadrature amplitude modulation (QAM) symbol. The QAM symbol mapping apparatus includes a frequency checker, which checks frequencies of sub-carriers in an orthogonal frequency division multiplexing (OFDM) symbol; and a data categorizer, which maps data coded for error correction and uncoded data to the sub-carriers based on the checked frequencies, wherein the data categorizer maps a combination of the coded data and the uncoded data with respect to sub-carriers having frequencies lower than a reference frequency.

Abstract: An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a row of the configurable logic circuits and multiple configuration retrieval circuits for providing configuration bits to the row of configurable logic circuits. The IC also includes a row configuration controller for forcing the multiple configuration retrieval circuits to output a particular configuration value based on a user signal that is received at runtime.

Abstract: A method for forming a polysilicon layer includes forming an amorphous silicon layer over a substrate, performing a first thermal treatment of the amorphous silicon layer by performing an implantation with a gas that includes silicon (Si), and performing a second thermal treatment on the thermally treated layer at a temperature higher than a temperature of the first thermal treatment.

Abstract: A method for fabricating a semiconductor device includes etching a substrate to form a plurality of trenches, forming first liner layers over bottom surfaces and inner sidewalls of the trenches to a first height, forming sacrificial liner layers on one of the inner sidewalls of the trenches where the first liner layers are formed, forming third sacrificial layers to a second height, so that the third sacrificial layers are buried over the trenches where the sacrificial liner layers are formed, removing portions of the sacrificial liner layers exposed by the third sacrificial layers to form sacrificial patterns, forming second liner layers on the inner sidewalls of the trenches exposed by the third sacrificial layers, and removing the third sacrificial layers to form side contact regions opening one of the inner sidewalls of the trenches in a line form.

Abstract: A solar cell module includes lower and upper substrates that are spaced apart from each other, a plurality of spaced apart solar cells, a plurality of gratings, and a light-transmissive encapsulant disposed between the lower and upper substrates to encapsulate the solar cells and the gratings. Each of the gratings has a grating center, and four reflecting regions formed around the grating center. Each of the reflecting regions has a light entrance face that has a plurality of valleys and peaks. The valleys and peaks alternate with each other along a direction from the grating center to a corresponding one of the corners of a corresponding one of the four adjacent solar cells.

Abstract: A non-volatile memory device includes a substrate; a first conductive layer over the substrate, a second conductive layer over the first conductive layer, a stacked structure disposed over the second conductive layer, wherein the stacked structure includes a plurality of first inter-layer dielectric layers and a plurality of third conductive layers alternately stacked, a pair of first channels that penetrate the stacked structure and the second conductive layer, a second channel which is buried in the first conductive layer, covered by the second conductive layer, and coupled to lower ends of the pair of the first channels; and a memory layer formed along internal walls of the first and second channels.

Abstract: A method for fabricating a semiconductor device includes etching a substrate to form a plurality of trenches, forming first liner layers over bottom surfaces and inner sidewalls of the trenches to a first height, forming sacrificial liner layers on one of the inner sidewalls of the trenches where the first liner layers are formed, forming third sacrificial layers to a second height, so that the third sacrificial layers are buried over the trenches where the sacrificial liner layers are formed, removing portions of the sacrificial liner layers exposed by the third sacrificial layers to form sacrificial patterns, forming second liner layers on the inner sidewalls of the trenches exposed by the third sacrificial layers, and removing the third sacrificial layers to form side contact regions opening one of the inner sidewalls of the trenches in a line form.

Abstract: A ruthenium complex having at least one selected from an alkyl thiophene unit and a unit in which thiophenes are linked to aromatic rings in the form of a pentagonal ring and a dye-sensitized solar cell using the same.

Abstract: A spirobifluorene-based compound and a dye-sensitized solar cell using the spirobifluorene-based compound as a dye.