Patents by Inventor Jung-Kuo Tu
Jung-Kuo Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10510912Abstract: A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration.Type: GrantFiled: December 17, 2018Date of Patent: December 17, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Chin Huang, Tzu-Jui Wang, Szu-Ying Chen, Dun-Nian Yaung, Jen-Cheng Liu, Bruce C. S. Chou, Jung-Kuo Tu, Cheng-Chieh Hsieh
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Publication number: 20190256347Abstract: A method includes forming a recess in a first substrate, bonding a micro-electro-mechanical systems (MEMS) substrate to the first substrate after forming the recess in the first substrate, forming an anti-stiction layer over the micro-electro-mechanical systems (MEMS) substrate, pattering the anti-stiction layer, etching the MEMS substrate to form a MEMS device, and bonding the MEMS device and the first substrate to a second substrate. The patterned anti-stiction layer is between the MEMS device and the second substrate.Type: ApplicationFiled: April 29, 2019Publication date: August 22, 2019Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Hsien CHANG, Tzu-Heng WU, Chun-Ren CHENG, Shih-Wei LIN, Jung-Kuo TU
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Publication number: 20190140112Abstract: A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration.Type: ApplicationFiled: December 17, 2018Publication date: May 9, 2019Inventors: Kuo-Chin Huang, Tzu-Jui Wang, Szu-Ying Chen, Dun-Nian Yaung, Jen-Cheng Liu, Cheng San Chou, Jung-Kuo Tu, Cheng-Chieh Hsieh
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Patent number: 10273140Abstract: A substrate structure for a micro electro mechanical system (MEMS) device, a semiconductor structure and a method for fabricating the same are provided. In various embodiments, the substrate structure for the MEMS device includes a substrate, the MEMS device, and an anti-stiction layer. The MEMS device is over the substrate. The anti-stiction layer is on a surface of the MEMS device, and includes amorphous carbon, polytetrafluoroethene, hafnium oxide, tantalum oxide, zirconium oxide, or a combination thereof.Type: GrantFiled: January 16, 2015Date of Patent: April 30, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Hsien Chang, Tzu-Heng Wu, Chun-Ren Cheng, Shih-Wei Lin, Jung-Kuo Tu
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Patent number: 10269586Abstract: A semiconductor device includes a first die having a first active surface and a first backside surface opposite the first active surface, a second die having a second active surface and a second backside surface opposite the second active surface, and an interposer, the first active surface of the first die being electrically coupled to a first side of the interposer, the second active surface of the second die being electrically coupled to a second side of the interposer. The semiconductor device also includes a first connector over the interposer, a first encapsulating material surrounding the second die, the first encapsulating material having a first surface over the interposer, and a via electrically coupling the first connector and the interposer. A first end of the via is substantially coplanar with the first surface of the first encapsulating material.Type: GrantFiled: February 13, 2015Date of Patent: April 23, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Bruce C. S. Chou, Chih-Hsien Lin, Hsiang-Tai Lu, Jung-Kuo Tu, Tung-Hung Hsieh, Chen-Hua Lin, Mingo Liu
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Patent number: 10164133Abstract: A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration.Type: GrantFiled: July 31, 2017Date of Patent: December 25, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Chin Huang, Tzu-Jui Wang, Szu-Ying Chen, Dun-Nian Yaung, Jen-Cheng Liu, Bruce C.S. Chou, Jung-Kuo Tu, Cheng-Chieh Hsieh
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Publication number: 20170330979Abstract: A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration.Type: ApplicationFiled: July 31, 2017Publication date: November 16, 2017Inventors: Kuo-Chin Huang, Tzu-Jui Wang, Szu-Ying Chen, Dun-Nian Yaung, Jen-Cheng Liu, Bruce C.S. Chou, Jung-Kuo Tu, Cheng-Chieh Hsieh
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Patent number: 9786628Abstract: A package component includes a surface dielectric layer including a planar top surface, a metal pad in the surface dielectric layer and including a second planar top surface level with the planar top surface, and an air trench on a side of the metal pad. The sidewall of the metal pad is exposed to the air trench.Type: GrantFiled: November 21, 2016Date of Patent: October 10, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Bruce C. S. Chou, Chen-Jong Wang, Ping-Yin Liu, Jung-Kuo Tu, Tsung-Te Chou, Xin-Hua Huang, Hsun-Chung Kuang, Lan-Lin Chao, Chia-Shiung Tsai, Xiaomeng Chen
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Patent number: 9722109Abstract: A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration.Type: GrantFiled: April 18, 2016Date of Patent: August 1, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Chin Huang, Tzu-Jui Wang, Szu-Ying Chen, Dun-Nian Yaung, Jen-Cheng Liu, Bruce C. S. Chou, Jung-Kuo Tu, Cheng-Chieh Hsieh
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Publication number: 20170069593Abstract: A package component includes a surface dielectric layer including a planar top surface, a metal pad in the surface dielectric layer and including a second planar top surface level with the planar top surface, and an air trench on a side of the metal pad. The sidewall of the metal pad is exposed to the air trench.Type: ApplicationFiled: November 21, 2016Publication date: March 9, 2017Inventors: Bruce C.S. Chou, Chen-Jong Wang, Ping-Yin Liu, Jung-Kuo Tu, Tsung-Te Chou, Xin-Hua Huang, Hsun-Chung Kuang, Lan-Lin Chao, Chia-Shiung Tsai, Xiaomeng Chen
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Patent number: 9561954Abstract: A method for forming an integrated circuit having Micro-electromechanical Systems (MEMS) includes forming at least two recesses into a first layer, forming at least two recesses into a second layer, the at least two recesses of the second layer being complementary to the recesses of the first layer. An intermediate layer is bonded onto the second layer, the intermediate layer includes through-holes corresponding to the recesses of the second layer. The first layer is bonded to the intermediate layer such that cavities are formed, the cavities to act as operating environments for MEMS devices. The two cavities have different pressures.Type: GrantFiled: December 19, 2014Date of Patent: February 7, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shyh-Wei Cheng, Jui-Chun Weng, Hsi-Cheng Hsu, Chih-Yu Wang, Jung-Kuo Tu, Che-Jung Chu, Yu-Ting Hsu
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Patent number: 9502396Abstract: A package component includes a surface dielectric layer including a planar top surface, a metal pad in the surface dielectric layer and including a second planar top surface level with the planar top surface, and an air trench on a side of the metal pad. The sidewall of the metal pad is exposed to the air trench.Type: GrantFiled: February 12, 2016Date of Patent: November 22, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Bruce C. S. Chou, Chen-Jong Wang, Ping-Yin Liu, Jung-Kuo Tu, Tsung-Te Chou, Xin-Hua Huang, Hsun-Chung Kuang, Lan-Lin Chao, Chia-Shiung Tsai, Xiaomeng Chen
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Patent number: 9443796Abstract: A package component includes a surface dielectric layer including a planar top surface, a metal pad in the surface dielectric layer and including a second planar top surface level with the planar top surface, and an air trench on a side of the metal pad. The sidewall of the metal pad is exposed to the air trench.Type: GrantFiled: May 15, 2013Date of Patent: September 13, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Bruce C. S. Chou, Chen-Jong Wang, Ping-Yin Liu, Jung-Kuo Tu, Tsung-Te Chou, Xin-Hua Huang, Xin-Chung Kuang, Lan-Lin Chao, Chia-Shiung Tsai, Xiaomeng Chen
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Patent number: 9422155Abstract: A device includes a semiconductor substrate, and a capacitive sensor having a back-plate, wherein the back-plate forms a first capacitor plate of the capacitive sensor. The back-plate is a portion of the semiconductor substrate. A conductive membrane is spaced apart from the semiconductor substrate by an air-gap. A capacitance of the capacitive sensor is configured to change in response to a movement of the polysilicon membrane.Type: GrantFiled: April 21, 2015Date of Patent: August 23, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Bruce C. S. Chou, Jung-Kuo Tu, Chen-Chih Fan
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Publication number: 20160233347Abstract: A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration.Type: ApplicationFiled: April 18, 2016Publication date: August 11, 2016Inventors: Kuo-Chin Huang, Tzu-Jui Wang, Szu-Ying Chen, Dun-Nian Yaung, Jen-Cheng Liu, Bruce C.S. Chou, Jung-Kuo Tu, Cheng-Chieh Hsieh
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Publication number: 20160207756Abstract: A substrate structure for a micro electro mechanical system (MEMS) device, a semiconductor structure and a method for fabricating the same are provided. In various embodiments, the substrate structure for the MEMS device includes a substrate, the MEMS device, and an anti-stiction layer. The MEMS device is over the substrate. The anti-stiction layer is on a surface of the MEMS device, and includes amorphous carbon, polytetrafluoroethene, hafnium oxide, tantalum oxide, zirconium oxide, or a combination thereof.Type: ApplicationFiled: January 16, 2015Publication date: July 21, 2016Inventors: Yi-Hsien CHANG, Tzu-Heng WU, Chun-Ren CHENG, Shih-Wei LIN, Jung-Kuo TU
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Publication number: 20160163684Abstract: A package component includes a surface dielectric layer including a planar top surface, a metal pad in the surface dielectric layer and including a second planar top surface level with the planar top surface, and an air trench on a side of the metal pad. The sidewall of the metal pad is exposed to the air trench.Type: ApplicationFiled: February 12, 2016Publication date: June 9, 2016Inventors: Bruce C.S. Chou, Chen-Jong Wang, Ping-Yin Liu, Jung-Kuo Tu, Tsung-Te Chou, Xin-Hua Huang, Hsun-Chung Kuang, Lan-Lin Chao, Chia-Shiung Tsai, Xiaomeng Chen
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Patent number: 9318528Abstract: A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration.Type: GrantFiled: October 12, 2015Date of Patent: April 19, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Chin Huang, Tzu-Jui Wang, Szu-Ying Chen, Dun-Nian Yaung, Jen-Cheng Liu, Bruce C. S. Chou, Jung-Kuo Tu, Cheng-Chieh Hsieh
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Publication number: 20160035771Abstract: A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration.Type: ApplicationFiled: October 12, 2015Publication date: February 4, 2016Inventors: Kuo-Chin Huang, Tzu-Jui Wang, Szu-Ying Chen, Dun-Nian Yaung, Jen-Cheng Liu, Bruce C.S. Chou, Jung-Kuo Tu, Cheng-Chieh Hsieh
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Publication number: 20150344297Abstract: A device includes a semiconductor substrate, and a capacitive sensor having a back-plate, wherein the back-plate forms a first capacitor plate of the capacitive sensor. The back-plate is a portion of the semiconductor substrate. A conductive membrane is spaced apart from the semiconductor substrate by an air-gap. A capacitance of the capacitive sensor is configured to change in response to a movement of the polysilicon membrane.Type: ApplicationFiled: April 21, 2015Publication date: December 3, 2015Inventors: Bruce C.S. Chou, Jung-Kuo Tu, Chen-Chih Fan