Patents by Inventor Jung Liao

Jung Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160330506
    Abstract: A data processing apparatus supporting simultaneous playback includes a processor, two tuners, a receiving element and a transmitting element. The first tuner generates first television data transmitted via a first frequency range, and provides the first television data to an internal playback device. The second tuner generates second television data transmitted via a second frequency range. The receiving element receives a data request for a selected television channel from an external electronic device. In response to the data request, the processor controls the second tuner to generate the second television data including video/audio data of the selected television channel. When the internal playback device performs playback according to the first television data, the transmitting element transmits the video/audio data of the selected television channel to the external electronic device for playback.
    Type: Application
    Filed: July 14, 2015
    Publication date: November 10, 2016
    Inventor: Wen-Jung Liao
  • Patent number: 9376181
    Abstract: A water craft able to offer fast rescue includes a water craft provided with a pressurization pump and a high pressure air reservoir to have air pressurized and poured into the high pressure air reservoir and stored therein. The water craft is formed with a concealed storage space having an uninflated rescue device received therein. The rescue device communicates with the high pressure air reservoir so that the rescue device can be inflated via the high pressure air reservoir. Thus, before inflated, the rescue device can be entirely received in the concealed storage space, letting the water craft have good maneuverability and, after inflated, the rescue device will be ejected out of the concealed storage space for carrying many persons thereon, thus advantageous to carry out rescue mission.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: June 28, 2016
    Assignee: SHIP AND OCEAN INDUSTRIES R&D CENTER
    Inventors: Tsai-Min Chiang, Chien-Hung Liu, Fan-Bin Tseng, Jung Liao
  • Publication number: 20160176483
    Abstract: A water craft able to offer fast rescue includes a water craft provided with a pressurization pump and a high pressure air reservoir to have air pressurized and poured into the high pressure air reservoir and stored therein. The water craft is formed with a concealed storage space having an uninflated rescue device received therein. The rescue device communicates with the high pressure air reservoir so that the rescue device can be inflated via the high pressure air reservoir. Thus, before inflated, the rescue device can be entirely received in the concealed storage space, letting the water craft have good maneuverability and, after inflated, the rescue device will be ejected out of the concealed storage space for carrying many persons thereon, thus advantageous to carry out rescue mission.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Inventors: Tsai-Min Chiang, Chien-Hung Liu, Fan-Bin Tseng, Jung Liao
  • Patent number: 9298286
    Abstract: A finger control device for controlling an electronic device to switch an operating mode thereof includes a main body, a sensor unit and a control unit. The main body includes a first securing part to be disposed on a palm, and a second securing part to be disposed on a finger. The sensor unit includes a first sensor element disposed at a first section of the finger, and a second sensor element disposed at a second section of the finger. Interaction between the two sensor elements is controlled through bending of the finger. The control unit controls the electronic device to operate in a first mode when the first sensor element interacts with the second sensor element, and to operate in a second mode when the first sensor element does not interact with the second sensor element.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: March 29, 2016
    Assignee: WISTRON CORPORATION
    Inventor: Chien-Jung Liao
  • Publication number: 20160019330
    Abstract: The invention provides a thermal uniformity compensating method and apparatus. The steps of the method includes: respectively measuring a plurality of first resistances of a plurality of hot spot patterns of a chip over an hot spot effect, wherein a plurality of pattern densities of the hot spot patterns are different; respectively measuring a plurality of second resistances of each of the hot spot patterns of the chip by a plurality of test keys over the hot spot effect, wherein a plurality of distances between the test keys and the corresponding hot spot pattern are different; establishing a look-up information according to the first and second resistances; analyzing a layout data of the chip for obtaining a pattern density information; and generating a calibrated layout data according to the pattern density information and the look-up information.
    Type: Application
    Filed: July 17, 2014
    Publication date: January 21, 2016
    Inventors: Chun-Ming Chang, Wen-Jung Liao, Chen-Wei Lee, Chun-Liang Hou
  • Patent number: 9235677
    Abstract: The invention provides a thermal uniformity compensating method and apparatus. The steps of the method includes: respectively measuring a plurality of first resistances of a plurality of hot spot patterns of a chip over an hot spot effect, wherein a plurality of pattern densities of the hot spot patterns are different; respectively measuring a plurality of second resistances of each of the hot spot patterns of the chip by a plurality of test keys over the hot spot effect, wherein a plurality of distances between the test keys and the corresponding hot spot pattern are different; establishing a look-up information according to the first and second resistances; analyzing a layout data of the chip for obtaining a pattern density information; and generating a calibrated layout data according to the pattern density information and the look-up information.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: January 12, 2016
    Assignee: United Microelectronics Corp.
    Inventors: Chun-Ming Chang, Wen-Jung Liao, Chen-Wei Lee, Chun-Liang Hou
  • Patent number: 9230871
    Abstract: A test key structure includes a plurality of transistors formed on a scribe line of a wafer and arranged in a 2*N array having 2 columns and N rows. The transistors arranged in the 2*N array respectively includes a gate, a source, a drain, and a body. All of the sources of the transistors arranged in the 2*N array are electrically connected to each other.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: January 5, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chien-Kuo Wang, Chun-Liang Hou, Wen-Jung Liao
  • Patent number: 9223341
    Abstract: A hinge assembly includes a guiding rail, at least one protruding block, a slidable element, and a rotatable element. The guiding rail includes a first side and a second side surface opposite to each other. The guiding rail further includes a first edge and a second edge in parallel to a longitudinal direction of the guiding rail. The protruding block is disposed on the first side surface. The width of the protruding block is smaller than that of the first side surface, and a gap exists between the protruding block and the first edge. The slidable element includes a sliding surface and a guiding surface opposite to each other. The first edge of the guiding rail inserts into a chute formed on the sliding surface to move the slidable element along the first edge. The rotatable element is pivoted to the slidable element to rotate on the slidable element.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: December 29, 2015
    Assignee: WISTRON CORPORATION
    Inventors: Chien-Jung Liao, Yao-Ting Lee, Ming-Hsi Lee
  • Patent number: 9171127
    Abstract: A design layout generating method is provided. A design layout including a first pattern and a second pattern is provided to a computer system, wherein the first pattern and the second pattern meet a design rule of an integrated circuit, respectively. The first pattern and the second pattern are combined into a third pattern. Next, the third pattern is checked if it meets a definition of a weak pattern, wherein the weak pattern is a pattern that meets the design rule but still forms defects. Then, the third pattern is modified and a new design layout is generated.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: October 27, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Liang Hou, Wen-Jung Liao, Chi-Fang Huang, Yi-Jung Chang
  • Patent number: 9063193
    Abstract: A layout structure of an electronic element including an electronic matrix, a first load and a second load is disclosed. The first load couples to a first end of the electronic matrix and includes a first testing pad and a second testing pad coupling to the first testing pad. The second load couples to a second end of the electronic matrix and includes a third testing pad and a fourth testing pad coupling to the third testing pad.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: June 23, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Chun-Liang Hou, Wen-Jung Liao
  • Publication number: 20150112623
    Abstract: A method of the measuring a critical dimension of a spacer is provided. The measurement is performed by using several test structures of measuring doping region resistance. Each of the test structure has different space disposed between a first gate line and a second gate line. By measuring a doping region resistance of each test structure, a plot of reciprocal of resistance versus space can be accomplished. Then, making regression of the plot, a correlation can be formed. Finally, a critical dimension of a spacer can be get by extrapolating the correlation back to 0 unit of reciprocal of resistance.
    Type: Application
    Filed: October 22, 2013
    Publication date: April 23, 2015
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chien-Kuo Wang, Chun-Liang Hou, Wen-Jung Liao
  • Patent number: 8934233
    Abstract: An electronic device comprises a casing, an electronic element, and an ejection mechanism. The casing has a receiving space and an opening. The ejection mechanism includes: a holder for holding and carrying the electronic element to pass through the opening to be exposed outside the casing; a first biasing spring biasing the holder to project outwardly from the opening; a stopping member rotatably pivoted to the casing and contactable with a projection of the holder; a second biasing spring biasing the stopping member to contact the projection, and having an elastic modulus greater than that of the first biasing spring; and a releasing member operable for driving the stopping member to detach from the projection.
    Type: Grant
    Filed: June 6, 2012
    Date of Patent: January 13, 2015
    Assignee: Wistron Corporation
    Inventor: Chien-Jung Liao
  • Patent number: 8929061
    Abstract: A keyboard lift mechanism includes a sliding block, a link bar, a hinge assembly, a driving member and a resilient member. The sliding block is slidably disposed inside a lower casing. Both ends of the link bar are pivoted to a keyboard and the sliding block, respectively. The driving member is coupled to the hinge assembly. The resilient member abuts against the lower casing and the sliding block. The resilient member and the driving member drive the sliding block to move in a first direction when the upper casing rotates in a first rotating direction, such that the link bar is driven to rotate the keyboard to a containing position, and drive the sliding block to move in a second direction when the upper casing rotates in a second rotating direction, such that the link bar is driven to rotate the keyboard to an opening position.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: January 6, 2015
    Assignee: Wistron Corporation
    Inventor: Chien-Jung Liao
  • Publication number: 20140354325
    Abstract: A semiconductor layout structure and a testing method thereof are disclosed. The semiconductor layout structure includes a device under test (DUT), a first testing pad, a second testing pad and a plurality of third testing pads. The DUT includes a plurality of metal-oxide-semiconductor (MOS) transistors. Each of the MOS transistors includes a first terminal, a second terminal and a third terminal. The first testing pad is coupled to the first terminals for being applied a first voltage. The second testing pad is coupled to the second terminals for being applied a second voltage. The third testing pads are respectively coupled to the third testing pads for being applied a third voltage. The third testing pads are electrical insulated from each other. The third voltage is larger than the first voltage and the second voltage.
    Type: Application
    Filed: May 28, 2013
    Publication date: December 4, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Chun-Liang Hou, Wen-Jung Liao
  • Publication number: 20140203828
    Abstract: A layout structure of an electronic element comprising an electronic matrix, a first load and a second load is disclosed. The first load couples to a first end of the electronic matrix and comprises a first testing pad and a second testing pad coupling to the first testing pad. The second load couples to a second end of the electronic matrix and comprises a third testing pad and a fourth testing pad coupling to the third testing pad.
    Type: Application
    Filed: January 18, 2013
    Publication date: July 24, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Chun-Liang Hou, Wen-Jung Liao
  • Patent number: 8594958
    Abstract: A method of electrical device characterization comprises: providing an array of electrical devices arranged in rows and columns, wherein each electrical device has a first terminal, a second terminal and a third terminal; clamping a first voltage at a first terminal of a selected electrical device via a first buffer or an first external voltage source; clamping a second voltage at a second terminal of a selected electrical device via a second buffer or a second external voltage source; controlling a third buffer to couple the third terminal of the selected electrical device to a first terminal or a second terminal of at least one non-selected column of electrical devices; and deriving a characterization result via the third terminal of the selected electrical device; wherein the array of electrical devices, the first buffer, the second buffer and the third buffer are on a same die or a same module.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: November 26, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Kao-Cheng Lin, Yu-Te Kao, Wen-Jung Liao
  • Patent number: 8568200
    Abstract: An ultra-low temperature magnetic polishing machine includes a housing defining therein a grinding chamber, a door hinged to the housing and controllable to open/close the grinding chamber, a motor mounted inside the housing below the grinding chamber, a magnetic disc set in between the grinding chamber and the motor and rotatable by the motor to cause an alternative magnetic field in the grinding chamber, a freezer having an output pipeline inserted into the grinding chamber and freezing medium deliverable through the output pipeline into the grinding chamber, a container set in the grinding chamber, and magnetically conductive grinding media put in the container.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: October 29, 2013
    Assignee: Holding Electric Co., Ltd.
    Inventor: Lu-Jung Liao
  • Patent number: 8516400
    Abstract: A method for predicting tolerable contact-to-gate spacing is provided. At first, a wafer with a plurality of source/drain contacts are provided. Then, a plurality of testing gate lines are formed on the wafer by using a photomask. In one die, there are different contact-to-gate distances ranging from d+?d to d??d wherein d is the standard spacing and ?d<d. Then, the wafer is inspected to find failure counts corresponding to each contact-to-gate distance. The tolerable spacing is determined according to the failure counts and the contact-to-gate distances based on a statistical method.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: August 20, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Li Kuo, Wen-Jung Liao, Jiun-Hau Liao, Min-Chin Hsieh, Chun-Liang Hou, Shuen-Cheng Lei
  • Publication number: 20130176663
    Abstract: A hinge assembly includes a guiding rail, at least one protruding block, a slidable element, and a rotatable element. The guiding rail includes a first side and a second side surface opposite to each other. The guiding rail further includes a first edge and a second edge in parallel to a longitudinal direction of the guiding rail. The protruding block is disposed on the first side surface. The width of the protruding block is smaller than that of the first side surface, and a gap exists between the protruding block and the first edge. The slidable element includes a sliding surface and a guiding surface opposite to each other. The first edge of the guiding rail inserts into a chute formed on the sliding surface to move the slidable element along the first edge. The rotatable element is pivoted to the slidable element to rotate on the slidable element.
    Type: Application
    Filed: May 15, 2012
    Publication date: July 11, 2013
    Applicant: WISTRON CORPORATION
    Inventors: Chien-Jung LIAO, Yao-Ting LEE, Ming-Hsi LEE
  • Publication number: 20130120967
    Abstract: A light emitting diode (LED) package including a transparent substrate, a transparent wiring layer, and at least one LED device is provided. The transparent wiring layer is disposed on the transparent substrate. The LED device is disposed on the transparent substrate and electrically connected to the transparent wiring layer.
    Type: Application
    Filed: December 12, 2011
    Publication date: May 16, 2013
    Applicant: EVERGREEN OPTRONICS INC.
    Inventor: Chao-Jung Liao