Patents by Inventor Jung Wang
Jung Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240210001Abstract: A streetlight can allow for the installation of various network equipment through the design of a disassembling rack to meet the construction needs of a smart city. A network equipment management system provides the network leasing and the power supply leasing to enable the management of the network bandwidth, the network traffic, the network communication ports, or the network providing time, wherein the network is connected to network equipment, as well as the management of the power of the power supply, the power supply ports, or the power supply providing time, wherein the network is connected to the network equipment. Therefore, the streetlight and the network equipment management system in this application can be utilized in the construction of a smart city.Type: ApplicationFiled: December 22, 2023Publication date: June 27, 2024Inventors: JO-YI CHIANG, CHIA-CHEN LIN, TSUNG-HSUN KUO, SHENG JUNG WANG
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Patent number: 12015027Abstract: The disclosure provides an electromagnetic wave adjustment apparatus includes a control circuit, a transistor circuit die and an electronic assembly. The transistor circuit die receives a control signal from the control circuit and drives the electronic assembly.Type: GrantFiled: June 28, 2022Date of Patent: June 18, 2024Assignee: Innolux CorporationInventors: Tang Chin Hung, Chin-Lung Ting, Chung-Kuang Wei, Ker-Yih Kao, Tong-Jung Wang, Chih-Yung Hsieh, Hao Jung Huang, I-Yin Li, Chia-Chi Ho, Yi Hung Lin, Cheng-Hsu Chou, Chia-Ping Tseng
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Publication number: 20240178694Abstract: A smart charging method and an electronic device using the same are provided. The smart charging method includes the following steps. Whether an electronic device is connected to a charger is determined. If the battery is connected to the charger, whether a current time is within a predetermined idle period is determined. If the current time is within the predetermined idle period, a battery of the electronic device is charged at a charge rate less than 0.8C by constant current charging, which lasts for a predetermined constant current charging time. After the predetermined constant current charging time is over, the battery is idled for a predetermined idle time. After the predetermined idle time is over, the battery is charged by constant voltage charging.Type: ApplicationFiled: November 30, 2023Publication date: May 30, 2024Applicant: Acer IncorporatedInventors: Shu-Wei YEH, Chuan-Jung WANG
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Publication number: 20240163407Abstract: A projection system and a control method thereof are provided. The projection system includes a projector. The projector comprises a projection module and a processor. The processor is electrically coupled to the projection module. The projector confirms whether a first triggering event is detected and turns on a sleep aid mode in response to the first triggering event. The sleep aid mode corresponds to at least one control parameter. In the sleep aid mode, the projection module plays at least one multimedia file according to the at least one control parameter. The processor adjusts at least one parameter value of the at least one control parameter to adjust the at least one multimedia file correspondingly. The projector confirms whether a second triggering event is detected and the projection module stops playing the at least one multimedia file and turns off the sleep aid mode in response to the second triggering event.Type: ApplicationFiled: November 1, 2023Publication date: May 16, 2024Applicant: Optoma CorporationInventors: Yuan-Mao Tsui, Hsien-Cheng Yuan, Chia-Chien Wu, Wei-Jung Wang
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Publication number: 20240145461Abstract: A modulation device includes a substrate, an electrostatic discharge protection element, an electronic element, and a driving element. The substrate has an active region. The electrostatic discharge protection element is arranged around the active region. The electronic element is disposed in the active region. The driving element is electrically connected to the electronic element.Type: ApplicationFiled: October 4, 2023Publication date: May 2, 2024Applicant: Innolux CorporationInventors: Ker-Yih Kao, Tong-Jung Wang, Wen-Chieh Lin, Ming-Chun Tseng, Yi-Hung Lin
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Patent number: 11968908Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.Type: GrantFiled: June 30, 2022Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
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Publication number: 20240130182Abstract: A display is provided. The display device includes a display area and a non-display area located around the display area; a base layer; an organic light-emitting diode (OLED) that is located on the base layer in the display area; and a first crack detection line that is located on the base layer in the non-display area; wherein the first crack detection line comprises a first line that extends substantially in a first direction along a first edge of the display area, a second line that is separated from the first line and extends substantially in the first direction, and a third line that is connected to an end of the first line and an end of the second line, wherein a cross-sectional shape of the first line in a second direction crossing the first direction is inversely tapered.Type: ApplicationFiled: December 26, 2023Publication date: April 18, 2024Inventors: Hun KIM, Yong Jin KIM, Soon Jung WANG, Keun Soo LEE, Jae Ho LEE, Kyung Chan CHAE
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Patent number: 11949270Abstract: A battery module for monitoring and suppressing battery swelling and interacting with a charging device includes a battery cell disposed in a nonconductive housing, a conductive label affixed to the nonconductive housing, a switch, and a controller. The battery cell is charged via a supply voltage from a charging device. The switch is coupled between the battery cell and the conductive label. The controller detects a resistance variation value ?R of the conductive label as result of swelling of the nonconductive housing, and generates a corresponding control voltage. As the resistance of the conductive label increases, the supply voltage may be adjusted downward according to the control voltage. If the resistance variation value ?R conductive label is greater than or equal to a predetermined threshold, the controller closes the switch, and the battery cell may then fully discharge through the conductive label.Type: GrantFiled: October 18, 2021Date of Patent: April 2, 2024Assignee: ACER INCORPORATEDInventors: Shuo-Jung Chou, Chuan-Jung Wang, Chih-Chiang Chen
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Patent number: 11937932Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.Type: GrantFiled: July 8, 2022Date of Patent: March 26, 2024Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, TUNGHAI UNIVERSITYInventors: Chieh-Liang Wu, Chun-Te Huang, Cheng-Hsu Chen, Tsai-Jung Wang, Kai-Chih Pai, Chun-Ming Lai, Min-Shian Wang, Ruey-Kai Sheu, Lun-Chi Chen, Yan-Nan Lin, Chien-Lun Liao, Ta-Chun Hung, Chien-Chung Huang, Chia-Tien Hsu, Shang-Feng Tsai
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Patent number: 11944017Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes an insulation layer. A bottom electrode via is disposed in the insulation layer. The bottom electrode via includes a conductive portion and a capping layer over the conductive portion. A barrier layer surrounds the bottom electrode via. A magnetic tunneling junction (MTJ) is disposed over the bottom electrode via.Type: GrantFiled: May 5, 2023Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Tai-Yen Peng, Yu-Shu Chen, Chien Chung Huang, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
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Publication number: 20240099150Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
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Patent number: 11916415Abstract: A battery charging apparatus includes a battery compartment having a receptacle that is configured to receive a battery pack. The battery charging apparatus includes a first heat exchange module and/or a second heat exchange module. The first heat exchange module includes a plenum surrounding the receptacle, where the plenum includes a chamber to receive a fluid. The plenum also includes a plurality of flow guides disposed in the chamber to define a variable flow passage for the fluid. The second heat exchange module includes a battery connector and a heat sink thermally coupled to the battery connector. The heat sink is arranged to dissipate thermal energy from the battery pack.Type: GrantFiled: November 9, 2016Date of Patent: February 27, 2024Assignee: Gogoro Inc.Inventors: Yu-Jung Wang, Chen-Hsin Hsu, Chi-Chun Chen
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Publication number: 20240041980Abstract: Embodiments of the instant disclosure relate to novel methods for treatment of one or more pathologic entities of Type 2 diabetes. In certain embodiments, methods concern reducing the risk of developing, preventing and/or treating a pathologic entity of Type 2 diabetes or other condition having a pathologic entity component by administering to a subject in need thereof a granulocyte macrophage colony stimulating factor (GM-CSF) or recombinantly produced molecule or fragment thereof, or an analog thereof. In other embodiments, methods concern decreasing pancreatic islet amyloid deposition in a subject by administering to the subject, GM-CSF or recombinantly produced molecule or fragment thereof, or an analog thereof, wherein the subject has pancreatic islet amyloid deposition.Type: ApplicationFiled: August 25, 2023Publication date: February 8, 2024Inventors: Huntington POTTER, Timothy BOYD, Ching-Jung WANG
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Patent number: 11895887Abstract: A display is provided. The display device includes a display area and a non-display area located around the display area; a base layer; an organic light-emitting diode (OLED) that is located on the base layer in the display area; and a first crack detection line that is located on the base layer in the non-display area; wherein the first crack detection line comprises a first line that extends substantially in a first direction along a first edge of the display area, a second line that is separated from the first line and extends substantially in the first direction, and a third line that is connected to an end of the first line and an end of the second line, wherein a cross-sectional shape of the first line in a second direction crossing the first direction is inversely tapered.Type: GrantFiled: December 29, 2022Date of Patent: February 6, 2024Assignee: Samsung Display Co., Ltd.Inventors: Hun Kim, Yong Jin Kim, Soon Jung Wang, Keun Soo Lee, Jae Ho Lee, Kyung Chan Chae
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Patent number: 11887529Abstract: A pixel array is provided. The pixel array includes a plurality of pixels, wherein each of the pixels includes a light emitting diode, a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor receives a first data signal and a first scan signal. The second transistor is coupled to the first transistor and an anode of the light emitting diode. The third transistor receives a system high voltage and a first control signal, and is coupled to the second transistor. The fourth transistor is coupled to an anode of a light emitting diode of an adjacent pixel, a control terminal of the third transistor, and a cathode of the light emitting diode. The fifth transistor is coupled to the cathode of the light emitting diode, and receives a second control signal and a system low voltage.Type: GrantFiled: April 19, 2022Date of Patent: January 30, 2024Assignee: Au Optronics CorporationInventors: Ya-Jung Wang, Jing-Wun Jhang, Rong-Fu Lin, Nien-Chen Li, Hsien-Chun Wang, Che-Chia Chang, June Woo Lee, Hsin-Ying Lin, Chia-Ting Hsieh, Chien-Fu Huang, Sung-Yu Su
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Publication number: 20240030073Abstract: In a method of patterning an integrated circuit, test layer thickness variation data is received when a test layer with a known thickness disposed over a test substrate undergoes tilted angle plasma etching. Overlay offset data per substrate locations caused by the tilted angle plasma etching is determined. The overlay offset data is determined based on the received thickness variation data. The overlay offset data is associated with an overlay between first circuit patterns of a first layer on the semiconductor substrate and corresponding second circuit patterns of a second layer disposed over the first layer on the substrate. A location of the substrate is adjusted based on the overlay offset data during a lithography operation to pattern a resist layer over the second layer. The second layer is patterned based on the projected layout patterns of the reticle and using the tilted angle plasma etching.Type: ApplicationFiled: July 19, 2023Publication date: January 25, 2024Inventors: Wei-De HO, Pei-Sheng Tang, Han-Wei Wu, Yuan-Hsiang Lung, Hua-Tai Lin, Chen-Jung Wang
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Publication number: 20240023457Abstract: An integrated circuit includes a metallization pattern having first and second conductive features, an etch stop layer over the metallization pattern, a memory device, a bottom electrode via, a third conductive feature, and a dielectric feature. The etch stop layer has first and second portions over the first and second conductive features, respectively. The bottom electrode via is in the first portion of the etch stop layer and electrically connecting the memory device over the first portion of the etch stop layer to the first conductive feature. The third conductive feature is in the second portion of the etch stop layer and electrically connected to the second conductive feature. The dielectric feature is between the first and second portions of the etch stop layer and in contact with sidewalls of the first and second portions of the etch stop layer.Type: ApplicationFiled: July 28, 2023Publication date: January 18, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tai-Yen PENG, Chien-Chung HUANG, Yu-Shu CHEN, Sin-Yi YANG, Chen-Jung WANG, Han-Ting LIN, Chih-Yuan TING, Jyu-Horng SHIEH, Hui-Hsien WEI
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Publication number: 20240006157Abstract: Methods and systems for dry etching are disclosed. The methods and systems use a showerhead with a perforated plate. The perforated plate includes a primary solid zone having no holes; a first annular zone comprising a first plurality of holes with a first total hole area; a secondary solid zone having no holes; a second annular zone comprising a second plurality of holes with a second total hole area; a third annular zone comprising a third plurality of holes with a third total hole area; and a fourth annular zone comprising a fourth plurality of holes with a fourth total hole area. The third total hole area is greater than the first total hole area and less than the second total hole area, and the fourth total hole area is greater than the second total hole area. Dry etched wafers using these systems have improved edge uniformity and improved yield.Type: ApplicationFiled: July 1, 2022Publication date: January 4, 2024Inventors: Chien-Liang Chen, Shao-Chien Hsu, Jung-Wang Lu, Meng-Chang Wu
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Patent number: 11856865Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.Type: GrantFiled: July 20, 2022Date of Patent: December 26, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
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Patent number: 11848253Abstract: A semiconductor structure with an air gap includes a dielectric stack having a first dielectric layer on a substrate, a second dielectric layer on the first dielectric layer, and a third dielectric layer on the second dielectric layer. A first conductive layer and a second conductive layer are disposed in the dielectric stack. The first conductive layer and the second conductive layer are coplanar. A cross-like-shaped air gap is disposed in the dielectric stack between the first and second conductive layers. An oxide layer is disposed on a sidewall of the second dielectric layer within the cross-like-shaped air gap.Type: GrantFiled: November 8, 2021Date of Patent: December 19, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Ching-Pin Hsu, Chih-Jung Wang, Chu-Chun Chang, Kuo-Yuh Yang, Chia-Huei Lin, Purakh Raj Verma