Patents by Inventor Jung-Hyuk Lee

Jung-Hyuk Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240094601
    Abstract: A camera module includes a housing, a movable body configured to move in a direction of an optical axis of the housing; a reinforcing member formed integrally on one surface of the movable body, and configured to increase a rigidity of the movable body; and a first buffer member formed in the reinforcing member, and configured to reduce an impactive force between the housing and the movable body.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hyuk LEE, Soo Cheol LIM, Byung Woo KANG, Young Bok YOON, Jong Woo HONG, Jung Seok LEE
  • Patent number: 11929497
    Abstract: A negative electrode active material as well as a method of preparing a negative electrode active material which includes preparing a silicon-based compound including SiOx, wherein 0.5<x<1.3; disposing a polymer layer including a polymer compound on the silicon-based compound; disposing a metal catalyst layer on the polymer layer; heat treating the silicon-based compound on which the polymer layer and the metal catalyst layer are disposed; and removing the metal catalyst layer, wherein the polymer compound includes any one selected from the group consisting of glucose, fructose, galactose, maltose, lactose, sucrose, a phenolic resin, a naphthalene resin, a polyvinyl alcohol resin, a urethane resin, polyimide, a furan resin, a cellulose resin, an epoxy resin, a polystyrene resin, a resorcinol-based resin, a phloroglucinol-based resin, a coal-derived pitch, a petroleum-derived pitch, a tar and a mixture of two or more thereof.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: March 12, 2024
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventors: Dong Hyuk Kim, Eun Kyung Kim, Yong Ju Lee, Rae Hwan Jo, Jung Hyun Choi
  • Patent number: 11923542
    Abstract: The present disclosure relates to a positive active material for a lithium rechargeable battery, a manufacturing method thereof, and a lithium rechargeable battery including the positive active material, and it provides a positive active material which is a lithium composite metal oxide including nickel, cobalt, and manganese, and either has orientation in a direction of with respect to an ND axis that is equal to or greater than 29% or has orientation in a direction of [120]+[210] with respect to an RD axis that is equal to or greater than 82% in the case of an EBSD analysis with a misorientation angle (?g) that is equal to or less than 30 degrees.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: March 5, 2024
    Assignee: RESEARCH INSTITUTE OF INDUSTRIAL SCIENCE & TECHNOLOGY
    Inventors: Jung Hoon Song, Geun Hwangbo, Sang Cheol Nam, Sang Hyuk Lee, Do Hyeong Kim, Hye Won Park
  • Publication number: 20230374478
    Abstract: The present invention relates to a modified CRISPR-associated protein and a use thereof. More specifically, the present invention relates to a composition for genome editing comprising the modified CRISPR-associated protein and an enhancer, a method for genome editing using the same, and a method for producing a transformant by using the same. The modified CRISPR-associated protein according to the present invention is available as a nuclease having excellent indel efficiency in a CRISPR-Cas system, and exhibits excellent indel efficiency compared to conventional CRISPR-Cas systems, thus finding advantageous applications in genome editing.
    Type: Application
    Filed: September 23, 2021
    Publication date: November 23, 2023
    Inventors: Jong Jin PARK, Jung Hyuk LEE
  • Patent number: 11625188
    Abstract: A memory device includes a first nonvolatile memory including a resistive memory cell; and a controller. The controller may be configured to provide the first nonvolatile memory with a first data, a first program command, and a first address. The controller may be configured to receive a second data, which is a verify read from the resistive memory cell programmed with the first data, from the first nonvolatile memory in response to the first program command. The controller may be configured to compare the first data with the second data to detect a number of fail cells. When the number of detected fail cells is greater than a reference value, the controller may be configured to generate a third data obtained by inversing the first data, and provide the third data to the first nonvolatile memory. The first data may include an inversion flag bit.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: April 11, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung Hyuk Lee, Hye Min Shin, Kang Ho Lee
  • Patent number: 11600353
    Abstract: A test method for a memory device including a plurality of memory cells includes generating a first test pattern, performing a first pattern write operation of writing the first test pattern in the plurality of memory cells, reading first data from the plurality of memory cells in which the first test pattern was written, generating a second test pattern based on the first data, and performing a second pattern write operation of writing the second test pattern in the plurality of memory cells. The second test pattern is generated such that a write operation is skipped with regard to failure cells from among the plurality of memory cells at which a write failure occurs, during the second pattern write operation.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: March 7, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jung Hyuk Lee
  • Publication number: 20220389404
    Abstract: The present disclosure provides compositions and methods for increasing mutation efficiency and homologous recombination rates of site-specific endonucleases. The compositions and methods comprise a chimeric polypeptide comprising a site-specific endonuclease or a domain thereof and a functional moiety. The current inventions relate to functional enhancement of the CRISPR-Cas enzymes. Disclosed herein include possible variants and their intended improvements.
    Type: Application
    Filed: March 1, 2022
    Publication date: December 8, 2022
    Inventors: Jongjin PARK, Ji Young YOON, Sunmee CHOI, Mijin PARK, Slki PARK, Aiden Y. PARK, Jung Hyuk LEE, Junghak LIM, Dong Wook KIM, Sunghwa CHOE
  • Publication number: 20220293206
    Abstract: A test method for a memory device including a plurality of memory cells includes generating a first test pattern, performing a first pattern write operation of writing the first test pattern in the plurality of memory cells, reading first data from the plurality of memory cells in which the first test pattern was written, generating a second test pattern based on the first data, and performing a second pattern write operation of writing the second test pattern in the plurality of memory cells. The second test pattern is generated such that a write operation is skipped with regard to failure cells from among the plurality of memory cells at which a write failure occurs, during the second pattern write operation.
    Type: Application
    Filed: May 30, 2022
    Publication date: September 15, 2022
    Inventor: JUNG HYUK LEE
  • Patent number: 11437051
    Abstract: In accordance with an aspect of the present disclosure, there is provided a method for identifying a type of a vocoder. The method comprises acquiring identification target bitstreams encoded with a voice signal, acquiring, for each of a plurality of vocoders, a probability that each of the plurality of vocoders is related to the identification target bitstreams from the identification target bitstreams, acquiring waveforms for each decoder of each of the plurality of vocoders by inputting the identification target bitstreams to the each decoder of each of the plurality of vocoders, acquiring intelligibility values for each of the waveforms obtained for the each decoder of each of the plurality of vocoders from the waveforms, and determining the type of the vocoder related to the voice signal from the probability and the intelligibility values for each waveform.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: September 6, 2022
    Assignee: Agency For Defense Development
    Inventors: Hong Kook Kim, Seung Ho Choi, Deokgyu Yun, Jung Hyuk Lee
  • Patent number: 11393443
    Abstract: A data generating apparatus for generating noise environment noisy data is disclosed. The data generating apparatus according to the present application comprises a signal conversion unit configured to convert each of a noisy signal obtained in real environment and an original sound signal for the noisy signal into a noisy signal spectrum and an original sound signal spectrum in a short-time frequency domain; and a noisy signal generation training unit configured to train deep neural network to output the noisy signal spectrum corresponding to each short-time using the original sound signal spectrum as an input.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: July 19, 2022
    Assignee: Agency for Defense Development
    Inventors: Hong Kook Kim, Jung Hyuk Lee, Seung Ho Choi, Deokgyu Yun
  • Patent number: 11367501
    Abstract: A test method for a memory device including a plurality of memory cells includes generating a first test pattern, performing a first pattern write operation of writing the first test pattern in the plurality of memory cells, reading first data from the plurality of memory cells in which the first test pattern was written, generating a second test pattern based on the first data, and performing a second pattern write operation of writing the second test pattern in the plurality of memory cells. The second test pattern is generated such that a write operation is skipped with regard to failure cells from among the plurality of memory cells at which a write failure occurs, during the second pattern write operation.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: June 21, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jung Hyuk Lee
  • Publication number: 20220130884
    Abstract: An image sensor including a variable resistance element is provided. The image sensor comprises first and second chips having first and second connecting structures; and a contact plug connecting the first and second chips. The first chip includes a photoelectric conversion element. The second chip includes a first variable resistance element. The contact plug extends from the first surface of the first semiconductor substrate to connect the first and second connecting structures.
    Type: Application
    Filed: August 4, 2021
    Publication date: April 28, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dae Shik KIM, Min-Sun KEEL, Hoon Joo NA, Kang Ho LEE, Kil Ho LEE, Sang Kil LEE, Jung Hyuk LEE, Shin Hee HAN
  • Patent number: 11293019
    Abstract: The present disclosure provides compositions and methods for increasing mutation efficiency and homologous recombination rates of site-specific endonucleases. The compositions and methods comprise a chimeric polypeptide comprising a site-specific endonuclease or a domain thereof and a functional moiety. The current inventions relate to functional enhancement of the CRISPR-Cas enzymes. Disclosed herein include possible variants and their intended improvements.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: April 5, 2022
    Assignees: GFLAS LIFE SCIENCES, INC., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Jongjin Park, Ji Young Yoon, Sunmee Choi, Mijin Park, Slki Park, Aiden Y. Park, Jung Hyuk Lee, Junghak Lim, Dong Wook Kim, Sunghwa Choe
  • Patent number: 11271038
    Abstract: A semiconductor device includes a gate structure on a substrate, source and drain contacts respectively on opposite sides of the gate structure and connected to the substrate, a magnetic tunnel junction connected to the drain contact, a first conductive line connected to the source contact, and a second conductive line connected to the first conductive line through a first via contact. The second conductive line is distal to the substrate in relation to the first conductive line. The first and second conductive lines extend in parallel along a first direction. The first and second conductive lines have widths in a second direction intersecting the first direction. The widths of the first and second conductive lines are the same. The first via contact is aligned with the source contact along a third direction perpendicular to a top surface of the substrate.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: March 8, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myoungsu Son, Seung Pil Ko, Jung Hyuk Lee, Shinhee Han, Gwan-Hyeob Koh, Yoonjong Song
  • Publication number: 20210397366
    Abstract: A memory device includes a first nonvolatile memory including a resistive memory cell; and a controller. The controller may be configured to provide the first nonvolatile memory with a first data, a first program command, and a first address. The controller may be configured to receive a second data, which is a verify read from the resistive memory cell programmed with the first data, from the first nonvolatile memory in response to the first program command. The controller may be configured to compare the first data with the second data to detect a number of fail cells. When the number of detected fail cells is greater than a reference value, the controller may be configured to generate a third data obtained by inversing the first data, and provide the third data to the first nonvolatile memory. The first data may include an inversion flag bit.
    Type: Application
    Filed: February 10, 2021
    Publication date: December 23, 2021
    Inventors: Jung Hyuk LEE, Hye Min SHIN, Kang Ho LEE
  • Publication number: 20210265003
    Abstract: A test method for a memory device including a plurality of memory cells includes generating a first test pattern, performing a first pattern write operation of writing the first test pattern in the plurality of memory cells, reading first data from the plurality of memory cells in which the first test pattern was written, generating a second test pattern based on the first data, and performing a second pattern write operation of writing the second test pattern in the plurality of memory cells. The second test pattern is generated such that a write operation is skipped with regard to failure cells from among the plurality of memory cells at which a write failure occurs, during the second pattern write operation.
    Type: Application
    Filed: September 29, 2020
    Publication date: August 26, 2021
    Inventor: JUNG HYUK LEE
  • Publication number: 20210054362
    Abstract: The present disclosure provides compositions and methods for increasing mutation efficiency and homologous recombination rates of site-specific endonucleases. The compositions and methods comprise a chimeric polypeptide comprising a site-specific endonuclease or a domain thereof and a functional moiety. The current inventions relate to functional enhancement of the CRISPR-Cas enzymes. Disclosed herein include possible variants and their intended improvements.
    Type: Application
    Filed: December 21, 2018
    Publication date: February 25, 2021
    Inventors: Jongjin PARK, Ji Young YOON, Sunmee CHOI, Mijin PARK, Slki PARK, Aiden Y. PARK, Jung Hyuk LEE, Junghak LIM, Dong Wook KIM, Sunghwa CHOE
  • Publication number: 20210005663
    Abstract: A semiconductor device includes a gate structure on a substrate, source and drain contacts respectively on opposite sides of the gate structure and connected to the substrate, a magnetic tunnel junction connected to the drain contact, a first conductive line connected to the source contact, and a second conductive line connected to the first conductive line through a first via contact. The second conductive line is distal to the substrate in relation to the first conductive line. The first and second conductive lines extend in parallel along a first direction. The first and second conductive lines have widths in a second direction intersecting the first direction. The widths of the first and second conductive lines are the same. The first via contact is aligned with the source contact along a third direction perpendicular to a top surface of the substrate.
    Type: Application
    Filed: September 22, 2020
    Publication date: January 7, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Myoungsu SON, Seung Pil KO, Jung Hyuk LEE, Shinhee HAN, Gwan-Hyeob KOH, Yoonjong SONG
  • Publication number: 20200411023
    Abstract: In accordance with an aspect of the present disclosure, there is provided a method for identifying a type of a vocoder. The method comprises acquiring identification target bitstreams encoded with a voice signal, acquiring, for each of a plurality of vocoders, a probability that each of the plurality of vocoders is related to the identification target bitstreams from the identification target bitstreams, acquiring waveforms for each decoder of each of the plurality of vocoders by inputting the identification target bitstreams to the each decoder of each of the plurality of vocoders, acquiring intelligibility values for each of the waveforms obtained for the each decoder of each of the plurality of vocoders from the waveforms, and determining the type of the vocoder related to the voice signal from the probability and the intelligibility values for each waveform.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 31, 2020
    Inventors: Hong Kook KIM, Seung Ho CHOI, Deokgyu YUN, Jung Hyuk LEE
  • Publication number: 20200380943
    Abstract: A data generating apparatus for generating noise environment noisy data is disclosed. The data generating apparatus according to the present application comprises a signal conversion unit configured to convert each of a noisy signal obtained in real environment and an original sound signal for the noisy signal into a noisy signal spectrum and an original sound signal spectrum in a short-time frequency domain; and a noisy signal generation training unit configured to train deep neural network to output the noisy signal spectrum corresponding to each short-time using the original sound signal spectrum as an input.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 3, 2020
    Inventors: Hong Kook KIM, Jung Hyuk LEE, Seung Ho CHOI, Deokgyu YUN