Patents by Inventor Jungwoo Song
Jungwoo Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120013402Abstract: Disclosed is a closed-loop class-D amplifier circuit including a modulated reference signal generator that provides a modulated reference signal in a feed-forward path, where the reference signal is modulated corresponding to an input signal. The closed-loop class-D amplifier circuit further includes a comparator to generate a control signal based on a comparison of the modulated reference signal and a correction signal, which in turn is produced by filtering a combination of the input signal and a feedback signal. The closed-loop class-D amplifier circuit also includes a pulse generator to generate a pulse-width-modulated signal to drive an output stage of the closed-loop class-D amplifier based on the control signal.Type: ApplicationFiled: July 19, 2010Publication date: January 19, 2012Applicant: BROADCOM CORPORATIONInventors: Jungwoo Song, Xicheng Jiang, Minsheng Wang, Todd L. Brooks
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Publication number: 20110260793Abstract: Disclosed is an amplifier circuit configured to amplify a pulse stream. The amplifier circuit comprises a switching block including a first switch operable to couple an output node of the switching block to a positive reference voltage, a second switch operable to couple the output node to a ground reference voltage and a third switch operable to couple the output node to a negative reference voltage. The amplifier circuit is configured to amplify the pulse stream into an amplified signal detectable at the output node such that the amplified signal has a common-mode voltage level substantially equal to zero volts. In one embodiment, the amplifier circuit is configured to amplify the pulse stream in accordance with a Class-D amplification scheme. In one embodiment, the output node can be directly connected to a load device without a DC blocking capacitor being interposed between the output node and the load device.Type: ApplicationFiled: April 27, 2010Publication date: October 27, 2011Applicant: BROADCOM CORPORATIONInventors: Xicheng Jiang, Jungwoo Song
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Patent number: 8013768Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.Type: GrantFiled: June 7, 2002Date of Patent: September 6, 2011Assignee: Broadcom CorporationInventors: Stephen A Jantzi, Anilkumar V Tammineedi, Jungwoo Song, Lawrence M Burns, Donald G McMullin, Agnes N Woo
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Publication number: 20090253240Abstract: A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices of the circuit have thin gate oxide layers. The low-pass filter semiconductor device includes an N-type substrate, a P-type region formed on the N-type substrate, a thick gate oxide layer formed over the P-type region, a P+ gate electrode formed over the thick gate oxide layer and coupled to a first voltage supply line, and P+ pick-up terminals formed in the P-type region adjacent the gate electrode and coupled to a second voltage supply line. The low-pass filter semiconductor device acts as a capacitor, whereby a gate-to-substrate voltage is maintained at less than zero volts to maintain a stable control voltage for the circuit.Type: ApplicationFiled: June 15, 2009Publication date: October 8, 2009Applicant: Broadcom CorporationInventors: Derek Tam, Jasmine Cheng, Jungwoo Song, Takayuki Hayashi
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Patent number: 7547956Abstract: A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices of the circuit have thin gate oxide layers. The low-pass filter semiconductor device includes an N-type substrate, a P-type region formed on the N-type substrate, a thick gate oxide layer formed over the P-type region, a P+ gate electrode formed over the thick gate oxide layer and coupled to a first voltage supply line, and P+ pick-up terminals formed in the P-type region adjacent the gate electrode and coupled to a second voltage supply line. The low-pass filter semiconductor device acts as a capacitor, whereby a gate-to-substrate voltage is maintained at less than zero volts to maintain a stable control voltage for the circuit.Type: GrantFiled: October 28, 2004Date of Patent: June 16, 2009Assignee: Broadcom CorporationInventors: Derek Tam, Jasmine Cheng, Jungwoo Song, Takayuki Hayashi
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Publication number: 20080069373Abstract: A noise reduction circuit for reducing the effects of low frequency noise such as wind noise in communications applications is described. In one embodiment, the noise reduction circuit features a high pass filter formed by exploiting the existing off-chip AC coupling capacitances in making the connection to the source of audio signals. The filter may be adaptive to environmental low frequency noise level through programming the shunt resistances. A low-noise wide dynamic range programmable gain amplifier is also described. Adaptive equalization of the audio signal is also described through the utilization of programmable front-end resistors and a back-end audio equalizer.Type: ApplicationFiled: September 20, 2006Publication date: March 20, 2008Applicant: Broadcom CorporationInventors: Xicheng Jiang, Jungwoo Song, Jianlong Chen
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Patent number: 7304538Abstract: Provided is an amplifier including a system for controlling output stage quiescent current. The amplifier includes a driving stage including first pmos and nmos transistors coupled together, and an output stage connected to the driving stage. The output stage includes second pmos and nmos transistors coupled together. The amplifier also includes a quiescent control stage connected to the driving stage and including third pmos and nmos transistors coupled together, fourth pmos coupled to third pmos and 4th nmos coupled to 3rd nmos. A topology of the coupled third pmos and nmos transistors substantially matches a topology of the coupled first pmos and nmos transistors, and 4th pmos and nmos match to 2nd pmos and nmos.Type: GrantFiled: October 28, 2004Date of Patent: December 4, 2007Assignee: Broadcom CorporationInventor: Jungwoo Song
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Patent number: 7135730Abstract: A first MOS-on-NWELL device is formed on a substrate and has its pickup terminals optionally connected together. A second MOS-on-NWELL device is formed on the substrate and has its pickup terminals optionally connected together. A gate of the first MOS-on-NWELL device is connected to the pickup terminals of the second MOS-on-NWELL device. A gate of the second MOS-on-NWELL device is connected to the pickup terminals of the first MOS-on-NWELL device. A first PMOS transistor is formed on a substrate and has its source and drain terminals connected together. A second PMOS transistor is formed on a substrate and has its source and drain terminals connected together. A gate of the first PMOS transistor is connected to the source and drain terminals of the second PMOS transistor. A gate of the second PMOS transistor is connected to the source and drain terminals of the first PMOS transistor.Type: GrantFiled: January 20, 2004Date of Patent: November 14, 2006Assignee: Broadcom CorporationInventors: Chun-ying Chen, Jungwoo Song
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Patent number: 7034610Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.Type: GrantFiled: June 7, 2004Date of Patent: April 25, 2006Assignee: Broadcom CorporationInventors: Stephen A. Jantzi, Anilkumar V. Tammineedi, Jungwoo Song, Lawrence M. Burns, Donald G. McMullin, Agnes N. Woo
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Patent number: 7026970Abstract: Provided are a system and method for implementing a multirate analog finite impulse response (FIR) filter. A system of the present invention includes a modulator having a first adder and a quantizer. The first adder includes an output port, and the quantizer includes (i) an input port coupled to the first adder output port and (ii) a quantizer output port. A second adder is also included, having one input port coupled to the first adder output port and another input port coupled to the quantizer output port. Also included are at least two two-unit delays, a first of the two-unit delays having an input port coupled to an output port of the second adder, and an output port coupled to an input port of the second of the two-unit delays. An output port of the second two-unit delays is coupled to a first input port of the first adder.Type: GrantFiled: January 10, 2005Date of Patent: April 11, 2006Assignee: Broadcom CorporationInventors: Minsheng Wang, Jungwoo Song
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Patent number: 7002405Abstract: A low noise transconductance cell includes a resistor and a differential circuit pair having two equivalent half-circuits. Each half-circuit includes a feedback loop coupled to the resistor. The feedback loop includes an input transistor coupled to an inverting gain stage. The inverting gain stage is coupled to an output transistor which in turn is coupled to the input transistor and the resistor. In a low noise transconductance cell, a bias current source is coupled to the center of series connected resistors. In a high swing transconductance cell, a first bias current source is coupled to the left terminal of a resistance stage and a second bias current source is coupled to the right terminal of the resistance stage. The resistance stage can include a single resistor or a plurality of resistors.Type: GrantFiled: February 13, 2004Date of Patent: February 21, 2006Assignee: Broadcom CorporationInventors: Todd Brooks, Jungwoo Song, Wynstan Tong
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Publication number: 20050280468Abstract: Provided is an amplifier including a system for controlling output stage quiescent current. The amplifier includes a driving stage including first pmos and nmos transistors coupled together, and an output stage connected to the driving stage. The output stage includes second pmos and nmos transistors coupled together. The amplifier also includes a quiescent control stage connected to the driving stage and including third pmos and nmos transistors coupled together, fourth pmos coupled to third pmos and 4th nmos coupled to 3rd nmos. A topology of the coupled third pmos and nmos transistors substantially matches a topology of the coupled first pmos and nmos transistors, and 4th pmos and nmos match to 2nd pmos and nmos.Type: ApplicationFiled: October 28, 2004Publication date: December 22, 2005Inventor: Jungwoo Song
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Publication number: 20050179574Abstract: Provided are a system and method for implementing a multirate analog finite impulse response (FIR) filter. A system of the present invention includes a modulator having a first adder and a quantizer. The first adder includes an output port, and the quantizer includes (i) an input port coupled to the first adder output port and (ii) a quantizer output port. A second adder is also included, having one input port coupled to the first adder output port and another input port coupled to the quantizer output port. Also included are at least two two-unit delays, a first of the two-unit delays having an input port coupled to an output port of the second adder, and an output port coupled to an input port of the second of the two-unit delays. An output port of the second two-unit delays is coupled to a first input port of the first adder.Type: ApplicationFiled: January 10, 2005Publication date: August 18, 2005Applicant: Broadcom CorporationInventors: Minsheng Wang, Jungwoo Song
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Publication number: 20050156219Abstract: A first MOS-on-NWELL device is formed on a substrate and has its pickup terminals optionally connected together. A second MOS-on-NWELL device is formed on the substrate and has its pickup terminals optionally connected together. A gate of the first MOS-on-NWELL device is connected to the pickup terminals of the second MOS-on-NWELL device. A gate of the second MOS-on-NWELL device is connected to the pickup terminals of the first MOS-on-NWELL device. A first PMOS transistor is formed on a substrate and has its source and drain terminals connected together. A second PMOS transistor is formed on a substrate and has its source and drain terminals connected together. A gate of the first PMOS transistor is connected to the source and drain terminals of the second PMOS transistor. A gate of the second PMOS transistor is connected to the source and drain terminals of the first PMOS transistor.Type: ApplicationFiled: January 20, 2004Publication date: July 21, 2005Applicant: Broadcom CorporationInventors: Chun-ying Chen, Jungwoo Song
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Publication number: 20050087839Abstract: A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices of the circuit have thin gate oxide layers. The low-pass filter semiconductor device includes an N-type substrate, a P-type region formed on the N-type substrate, a thick gate oxide layer formed over the P-type region, a P+ gate electrode formed over the thick gate oxide layer and coupled to a first voltage supply line, and P+ pick-up terminals formed in the P-type region adjacent the gate electrode and coupled to a second voltage supply line. The low-pass filter semiconductor device acts as a capacitor, whereby a gate-to-substrate voltage is maintained at less than zero volts to maintain a stable control voltage for the circuit.Type: ApplicationFiled: October 28, 2004Publication date: April 28, 2005Inventors: Derek Tam, Jasmine Cheng, Jungwoo Song, Takayuki Hayashi
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Patent number: 6856267Abstract: Provided are a system and method for implementing a multirate analog finite impulse response (FIR) filter. A system of the present invention includes a modulator having a first adder and a quantizer. The first adder includes an output port, and the quantizer includes (i) an input port coupled to the first adder output port and (ii) a quantizer output port. A second adder is also included, having one input port coupled to the first adder output port and another input port coupled to the quantizer output port. Also included are at least two two-unit delays, a first of the two-unit delays having an input port coupled to an output port of the second adder, and an output port coupled to an input port of the second of the two-unit delays. An output port of the second two-unit delays is coupled to a first input port of the first adder.Type: GrantFiled: February 17, 2004Date of Patent: February 15, 2005Assignee: Broadcom CorporationInventors: Minsheng Wang, Jungwoo Song
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Patent number: 6828654Abstract: In a low-pass filter for a phase locked loop (PLL) circuit, a capacitor formed by an N-type substrate, a P-type region formed on the N-type substrate, a thick oxide formed over the P-type region, a P+ gate electrode formed over the thick oxide and coupled to a first voltage supply line, and P+ pick-up terminals formed in the P-type region adjacent the gate electrode and coupled to a second voltage supply line, whereby a gate-to-substrate voltage is maintained at less than zero volts to maintain a stable control voltage for the PLL.Type: GrantFiled: December 27, 2001Date of Patent: December 7, 2004Assignee: Broadcom CorporationInventors: Derek Tam, Jasmine Cheng, Jungwoo Song, Takayuki Hayashi
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Publication number: 20040232980Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.Type: ApplicationFiled: June 7, 2004Publication date: November 25, 2004Applicant: Broadcom CorporationInventors: Stephen A. Jantzi, Anilkumar V. Tammineedi, Jungwoo Song, Lawrence M. Burns, Donald G. McMullin, Agnes N. Woo
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Publication number: 20040160245Abstract: A low noise transconductance cell includes a resistor and a differential circuit pair having two equivalent half-circuits. Each half-circuit includes a feedback loop coupled to the resistor. The feedback loop includes an input transistor coupled to an inverting gain stage. The inverting gain stage is coupled to an output transistor which in turn is coupled to the input transistor and the resistor. In a low noise transconductance cell, a bias current source is coupled to the center of series connected resistors. In a high swing transconductance cell, a first bias current source is coupled to the left terminal of a resistance stage and a second bias current source is coupled to the right terminal of the resistance stage. The resistance stage can include a single resistor or a plurality of resistors.Type: ApplicationFiled: February 13, 2004Publication date: August 19, 2004Inventors: Todd Brooks, Jungwoo Song, Wynstan Tong
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Patent number: 6747510Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.Type: GrantFiled: June 7, 2002Date of Patent: June 8, 2004Assignee: Broadcom CorporationInventors: Stephen A. Jantzi, Anilkumar V. Tammineedi, Jungwoo Song, Lawrence M. Burns, Donald G. McMullin, Agnes N. Woo