Patents by Inventor Junichi Kasai

Junichi Kasai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080191723
    Abstract: An IC device (10) held on an IC carrier (24) is a double-sided electrode type BGA IC device (10) provided with bump electrodes (14) on a first surface of a package. The IC device has, on a second surface opposite the first surface, (a) a central protrusion (30), (b) a peripheral portion (32) lower than the protrusion by one step, and (c) upper electrodes (18) formed on the peripheral portion of the IC device. The IC carrier is provided with a frame (36), a cover (40), and a holding means (42). The frame forms a device reception space (38) for receiving the IC device. The cover can cover the upper electrodes while in contact with the periphery of the IC device held on the IC carrier. The holding means can hold the IC device on the IC carrier with the cover covering the upper electrodes of the IC device. The IC device can be set in an IC socket while being mounted on the IC carrier.
    Type: Application
    Filed: March 11, 2005
    Publication date: August 14, 2008
    Applicants: Micronics Japan Co., Ltd., SPANSION LLC, SPANSION Japan Limited
    Inventors: Eichi Osato, Junichi Kasai, Kouichi Meguro, Masanori Onodera
  • Publication number: 20080169544
    Abstract: A method of fabricating a semiconductor device includes: mounting a semiconductor chip on a substrate; forming an upper connection terminal on a side of the substrate on which the semiconductor chip is mounted; forming a resin seal portion that seals the semiconductor chip and the upper connection terminal so that an upper surface of the upper connection terminal is exposed; and shaping the upper connection terminal so that the upper surface of the upper connection terminal becomes lower than an upper surface of the resin seal portion.
    Type: Application
    Filed: January 17, 2007
    Publication date: July 17, 2008
    Inventors: Junji Tanaka, Junichi Kasai, Kouichi Meguro, Masanori Onodera, Koji Taya
  • Publication number: 20070290320
    Abstract: A carrier for a stacked type semiconductor device includes a lower carrier having a first accommodating portion that accommodates a first semiconductor device, and an upper carrier having a second accommodating portion that accommodates a second semiconductor device stacked on the first semiconductor device so as to be placed in position on the first semiconductor device. It is thus possible to eliminate an additional device used for stacking the semiconductor device, and thereby reduce the cost.
    Type: Application
    Filed: August 22, 2007
    Publication date: December 20, 2007
    Inventors: Masanori Onodera, Junichi Kasai, Kouichi Meguro, Junji Tanaka, Yasuhiro Shinma, Koji Taya
  • Publication number: 20070261556
    Abstract: A gas treatment device (1), comprising a charging agglomeration part (10) which charges and agglomerates components targeted for collection in gas by utilizing corona discharge, and a filter part (20) which collects the agglomerated components. The charging agglomeration part (10) is disposed on the upstream side, and the filter part (20) is disposed on the downstream side. By this configuration, using the agglomerating functions and precipitating functions of corona discharge and the precipitating functions of filters, ultra-fine particulates can be agglomerated and enlarged. Moreover, the present invention is a gas treatment device that has high performance and low pressure-loss and that is capable of being configured in a compact form factor such that it can also be used as an exhaust gas purification device mounted onboard an automobile.
    Type: Application
    Filed: September 21, 2005
    Publication date: November 15, 2007
    Applicants: ISUZU MOTORS LIMITED, NISSIN ELECTRIC CO., LTD.
    Inventors: Junichi Kasai, Yoshinobu Tamura, Masashi Gabe, Akira Mizuno, Kenta Naito, Satoru Senbayashi
  • Publication number: 20070245898
    Abstract: Gas treatment equipment (1) comprising a corona electrode (10) and a dust-collection electrode (20) facing the corona electrode (10), and forming corona discharge in gas (G) passing between the corona electrode (10) and the dust-collection electrode (20) by applying a high voltage between them to thereby agglomerate or collect components in the gas (G), wherein a means (23) for accelerating turbulence of the gas (G) in the vicinity of the surface (200 of the dust-collection electrode (20) facing the corona electrode (10) is provided on the opposing surface (20f) or in the vicinity thereof.
    Type: Application
    Filed: April 13, 2005
    Publication date: October 25, 2007
    Inventors: Kenta Naito, Satoru Senbayashi, Yuichi Hamada, Akira Mizuno, Junichi Kasai, Yoshinobu Tamura
  • Patent number: 7285848
    Abstract: A carrier for a stacked type semiconductor device includes a lower carrier having a first accommodating portion that accommodates a first semiconductor device, and an upper carrier having a second accommodating portion that accommodates a second semiconductor device stacked on the first semiconductor device so as to be placed in position on the first semiconductor device. It is thus possible to eliminate an additional device used for stacking the semiconductor device, and thereby reduce the cost.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: October 23, 2007
    Assignee: Spansion LLC
    Inventors: Masanori Onodera, Junichi Kasai, Kouichi Meguro, Junji Tanaka, Yasuhiro Shinma, Koji Taya
  • Publication number: 20070145579
    Abstract: The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.
    Type: Application
    Filed: December 7, 2006
    Publication date: June 28, 2007
    Inventors: Masataka Hoshino, Junichi Kasai, Kouichi Meguro, Ryota Fukuyama, Yasuhiro Shinma, Koji Taya, Masanori Onodera, Naomi Masuda
  • Publication number: 20070105304
    Abstract: The present invention provides a semiconductor device, a fabrication method therefor, and a film fabrication method, the semiconductor device including a first substrate (e.g., a semiconductor chip), an anisotropic conductive film that is provided on the first substrate and has a wiring pattern having at least a portion providing conduction through the anisotropic conductive film, and a second substrate (semiconductor chip) provided on the anisotropic conductive film and coupled to the first substrate via the portion providing conduction through the anisotropic conductive film. According to the present invention, it is possible to provide a semiconductor device, a fabrication method therefor, and a film fabrication method, by which production costs can be reduced in electrically coupling different positions in upper and lower substrates.
    Type: Application
    Filed: September 28, 2006
    Publication date: May 10, 2007
    Inventors: Junichi Kasai, Kouichi Meguro, Masanori Onodera
  • Publication number: 20070000236
    Abstract: An exhaust gas processing method and an exhaust gas processing system for controlling the spatial density distribution of particulate matter in exhaust gas by utilizing corona discharge in exhaust gas containing floating particulate matter such as diesel engine exhaust gas to form a relatively particulate matter-rich area and a relatively particulate matter-lean area, and diving exhaust gas particulates to the former and the latter.
    Type: Application
    Filed: August 26, 2004
    Publication date: January 4, 2007
    Inventors: Kenta Naito, Satoru Senbayashi, Junichi Kasai, Akira Mizuno
  • Patent number: 7144754
    Abstract: A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: December 5, 2006
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Kazuto Tsuji, Seiichi Orimo, Hideharu Sakoda, Ryuji Nomoto, Masanori Onodera, Junichi Kasai
  • Publication number: 20060245908
    Abstract: A carrier for a stacked-type semiconductor device includes an accommodating section for accommodating stacked semiconductor devices, guide portions guiding the stacked semiconductor devices, and grooves through which a fluid may flow to the accommodating section and to sides of the stacked semiconductor devices. These grooves facilitate the flow of gas or liquid on the sides of the accommodating sections, and it is thus expected that the flow of hot wind during the reflow process and cleaning liquid during the cleaning process can be facilitated. This improves the production yield and the cleaning effects. Holes for connecting the accommodating section to the outside may be provided at corners of the accommodating section. Gas may be guided from the lower side of the accommodating section, so that heat can be efficiently applied to the semiconductor devices and bonding failures therebetween can be reduced.
    Type: Application
    Filed: January 27, 2006
    Publication date: November 2, 2006
    Inventors: Koji Taya, Kouichi Meguro, Junichi Kasai, Yasuhiro Shinma, Masanori Onodera, Junji Tanaka, Murugasan Achari
  • Publication number: 20060220208
    Abstract: A semiconductor device of a stacked type includes a semiconductor chip (1) that is mounted on a substrate (4), a first sealing resin (12) that seals the semiconductor chip (1), a built-in semiconductor device (9) that is placed on the first sealing resin (12), and a second sealing resin (13) that is formed on the substrate (4) and seals the semiconductor chip (1) and the built-in semiconductor device (9). In this semiconductor device, the semiconductor chip (1) and the built-in semiconductor device (9) are electrically connected to the substrate by bonding wires (3).
    Type: Application
    Filed: March 30, 2006
    Publication date: October 5, 2006
    Inventors: Masanori Onodera, Kouichi Meguro, Junichi Kasai
  • Publication number: 20060170090
    Abstract: A stacked type semiconductor device includes semiconductor devices, interposers by which the semiconductor devices are stacked, the interposers having electrodes provided on sides thereof, and a connection substrate connecting the electrodes together. The electrodes provided on the sides of the interposers may be connected to the connection substrate by one of an electrically conductive adhesive or an anisotropically conductive film.
    Type: Application
    Filed: January 25, 2006
    Publication date: August 3, 2006
    Inventors: Yasuhiro Shinma, Masanori Onodera, Kouichi Meguro, Koji Taya, Junji Tanaka, Junichi Kasai
  • Publication number: 20060043600
    Abstract: A carrier structure for fabricating a stacked-type semiconductor device includes: a lower carrier that has laminated thin plates and has first openings for mounting first semiconductor packages thereon; and an upper carrier having second openings for mounting second semiconductor packages on the first semiconductor packages. The lower carrier composed of the laminated thin plates realizes an even plate thickness and reduces warps because stress is distributed to the thin plates. This results in an improved production yield. A pattern of the openings in the thin plates of the lower carrier may be formed by etching or electric discharging. The openings thus formed have reduced warps and burrs.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 2, 2006
    Inventors: Masanori Onodera, Kouichi Meguro, Junichi Kasai, Yasuhiro Shinma, Koji Taya, Junji Tanaka
  • Publication number: 20050269682
    Abstract: A carrier for a stacked type semiconductor device includes a lower carrier having a first accommodating portion that accommodates a first semiconductor device, and an upper carrier having a second accommodating portion that accommodates a second semiconductor device stacked on the first semiconductor device so as to be placed in position on the first semiconductor device. It is thus possible to eliminate an additional device used for stacking the semiconductor device, and thereby reduce the cost.
    Type: Application
    Filed: May 11, 2005
    Publication date: December 8, 2005
    Inventors: Masanori Onodera, Junichi Kasai, Kouichi Meguro, Junji Tanaka, Yasuhiro Shinma, Koji Taya
  • Publication number: 20050263871
    Abstract: A method of fabricating a semiconductor device includes the steps of providing a heat-resistant sheet on an interposer so as to cover electrode terminals provided on the interposer, and sealing a semiconductor chip on the interposer sandwiched between molds with a sealing material. The electrode terminals are covered by the heat-resistant resin for protection, and the semiconductor chip is then sealed with resin. It is thus possible to avoid the problem in which contaminations adhere to the electrode terminals. This makes it possible to prevent the occurrence of resin burrs on the interposer and contamination of the electrode pads and to improve the production yield.
    Type: Application
    Filed: May 20, 2005
    Publication date: December 1, 2005
    Inventors: Yasuhiro Shinma, Junichi Kasai, Kouichi Meguro, Masanori Onodera, Junji Tanaka
  • Patent number: 6881611
    Abstract: A method includes a resin sealing step of placing, in a cavity 28 of a mold 20, a substrate 16 to which semiconductor elements 11 on which bumps 12 are arranged, a resin sealing step of supplying resin 35 to positions of the bumps 12 so that a resin layer 13 sealing the bumps 12 is formed, a protruding electrode exposing step of exposing at least ends of the bumps 12 sealed by the resin layer 13 so that ends of the bumps 12 are exposed from the resin layer 13, and a separating step of cutting the substrate 16 together with the resin layer 13 so that the semiconductor elements 11 are separated from each other.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: April 19, 2005
    Assignee: Fujitsu Limited
    Inventors: Norio Fukasawa, Toshimi Kawahara, Muneharu Morioka, Mitsunada Osawa, Yasuhiro Shinma, Hirohisa Matsuki, Masanori Onodera, Junichi Kasai, Shigeyuki Maruyama, Masao Sakuma, Yoshimi Suzuki, Masashi Takenaka
  • Patent number: 6856017
    Abstract: A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: February 15, 2005
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Kazuto Tsuji, Seiichi Orimo, Hideharu Sakoda, Ryuji Nomoto, Masanori Onodera, Junichi Kasai
  • Publication number: 20040219719
    Abstract: A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.
    Type: Application
    Filed: June 1, 2004
    Publication date: November 4, 2004
    Applicant: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Kazuto Tsuji, Seiichi Orimo, Hideharu Sakoda, Ryuji Nomoto, Masanori Onodera, Junichi Kasai
  • Patent number: 6696754
    Abstract: A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: February 24, 2004
    Assignee: Fujitsu Limited
    Inventors: Mitsutaka Sato, Tetsuya Fujisawa, Shigeyuki Maruyama, Junichi Kasai, Toshimi Kawahara, Toshio Hamano, Yoshihiro Kubota, Mitsunada Osawa, Yoshiyuki Yoneda, Kazuto Tsuji, Hirohisa Matsuki