Abstract: An apparatus that transfers object motion in a source space to a target space is provided. The apparatus defines a mapping function from the source space to the target space based on feature points of the object-positioned source space, and feature points of the object-represented target space; determines a target root position corresponding to a root position of the object based on the mapping function; determines a target direction corresponding to a direction of the object, based on the mapping function; determines a target main joint corresponding to a main joint of the object based on the mapping function; determines a target sub-joint excluding the target main joint in the target space based on unique joint information of the object; and generates data representing the object motion in the target space by modifying a pose of the object in the target space to match the target main joint.

Abstract: A character animation motion control method and device are disclosed. A character animation playing method, including extracting first actions based on a state of a character, extracting second actions based on the state, selecting an action included in the first actions and the second actions, and updating the state based on the action.

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for an XPU-aware dynamic compute scheduling framework. These improve processing of cloud client application pipelines across XPU devices by incorporating memory, machine readable instructions and processor circuitry to execute the functions of: trace an execution of an input model by a graph tracer; build a compute graph based on the trace of the input model; communicate an operational parameter; create a first XPU device assignment to recommend an XPU device to use based on at least one provisioned policy of a system-wide XPU selection policy provider; update the compute graph based on the first XPU device assignment; and send the first XPU device assignment to the devices through a dispatch command.

Abstract: A display apparatus includes a substrate including a display area including a display element, a first thin film transistor disposed in the display area, the first thin film transistor including a first semiconductor layer including a silicon semiconductor and a first gate electrode insulated from the first semiconductor layer, a second thin film transistor disposed in the display area, the second thin film transistor including a second semiconductor layer including an oxide semiconductor and a second gate electrode insulated from the second semiconductor layer, a first signal line extending at a side of the first thin film transistor in a first direction, a second signal line extending at an opposite side of the first thin film transistor in the first direction, and a shielding pattern extending in the first direction, the shielding pattern at least partially overlapping the first signal line.

Abstract: Provided is an electrolyte for a lithium secondary battery, the electrolyte including a non-aqueous organic solvent, a lithium salt, and an additive, wherein the additive includes a compound represented by Chemical Formula 1. The definitions of each of the substituents in Chemical Formula 1 are as set forth in the detailed description.

Abstract: A semiconductor chip includes a device layer on a substrate, the device layer including a plurality of semiconductor devices; a wiring structure and a lower inter-wiring dielectric layer each on the device layer, the lower inter-wiring dielectric layer surrounding the wiring structure and having a lower permittivity than silicon oxide; an upper inter-wiring dielectric layer arranged on the lower inter-wiring dielectric layer; an isolation recess arranged along an edge of the substrate, the isolation recess formed on side surfaces of the lower and upper inter-wiring dielectric layers and having a bottom surface at a level equal to or lower than that of a bottom surface of the lower inter-wiring dielectric layer; and a cover dielectric layer covering the side surfaces of the lower and upper inter-wiring dielectric layers and the bottom surface of the isolation recess.

Abstract: A display apparatus includes a substrate including a component area, a first adjacent area and a second adjacent area arranged with the component area therebetween, and a main area at least partially surrounding the component area and the adjacent areas in plan view, a first display element in the component area and including a pixel electrode, an emission layer on the pixel electrode, and a counter electrode, a second display element, a first pixel circuit electrically connected to the first display element, and a second pixel circuit electrically connected to the second display element, in the adjacent area, a signal wiring in the component area, adjacent to the pixel electrode, and extending in a first direction from a boundary where the component area contacts the first adjacent area, and a connection wiring adjacent to the pixel electrode and electrically connecting the first display element to the first pixel circuit.

Abstract: An organic light-emitting device includes: a first electrode; a second electrode facing the first electrode; m emission units stacked between the first electrode and the second electrode, each emission unit including at least one emission layer; and m?1 charge generating layers respectively located between two adjacent emission units among them emission units, each of the charge generating layers including one n-type charge generating region and one p-type charge generating region, wherein m is an integer of 2 or more, and at least one of the m?1 p-type charge generating regions includes a phosphate-containing compound.

Abstract: An electronic device for executing various operating systems is provided. The electronic device includes first and second hardware devices, a first operating system (OS), a second OS different from the first OS, and a processor configured to control the first hardware device to process first data from a first program executed on the first OS, obtain a command for executing the second OS, generate a container for executing the second OS based on a kernel of the first OS in response to the command for executing the second OS, execute the second OS on the generated container, execute a second program on the second OS, obtain second data regarding the second program from the second OS via socket communication by a control application installed on the first OS, and control the second hardware device to process the second data regarding the second program based on the first OS using the installed control application.

Abstract: A method of training a deep neural network for generating a cinemagraph is disclosed. The method may include preparing a foreground layer input by using an input video, preparing a background layer input by using the input video, providing a foreground layer output and a background layer output from the DNN by inputting, to the DNN, the foreground layer input and the background layer input, providing an output video by synthesizing the foreground layer output with the background layer output, and updating intrinsic parameters of the DNN a plurality of times, based on the input video, the foreground layer input, the foreground layer output, the background layer output, and the output video.

Abstract: A solar cell can include a silicon semiconductor substrate; an oxide layer on a first surface of the silicon semiconductor substrate; a polysilicon layer on the oxide layer; a diffusion region at a second surface of the silicon semiconductor substrate; a dielectric film on the polysilicon layer; a first electrode connected to the polysilicon layer through the dielectric film; a passivation film on the diffusion region; and a second electrode connected to the diffusion region through the passivation film.

Abstract: A host system includes a host device configured to generate a first log, a storage device configured to generate at least one second log, and a shared memory configured to store the first log and to store composite logs corresponding to the first log and the at least one second log. The storage device reads the first log from the shared memory, adds a timestamp and log-type information to the first log and the at least one second log to generate the composite logs, and writes the composite logs to the shared memory.

Abstract: Provided are an organic photodetector and an electronic apparatus including the same. The organic photodetector includes a first electrode, a second electrode facing the first electrode, an auxiliary layer arranged between the first electrode and the second electrode, and an activation layer arranged between the first electrode and the activation layer. The auxiliary layer includes a compound having a refractive index of about 2.2 or more.

Abstract: Provided is a method of framing a three dimensional (3D) target object for generation of a virtual camera layout. The method may include analyzing a reference video image to extract a framing rule for at least one reference object in the reference video image, generating a framing rule for at least one 3D target object using the framing rule for the at least one reference object in the reference video image, and using the framing rule for the at least one 3D target object for generation of a virtual camera layout.

Abstract: The present invention relates to: an electrolyte for a rechargeable lithium battery, the electrolyte including a non-aqueous organic solvent, a lithium salt, and an electrolyte additive for a rechargeable lithium battery, the electrolyte additive including a compound represented by Chemical Formula 1; and a rechargeable lithium battery comprising the electrolyte for a rechargeable lithium battery. Chemical Formula 1 is as defined in the specification.

Abstract: Provided are an additive represented by Chemical Formula 1, an electrolyte for a lithium secondary battery including same, and a lithium secondary battery. The details of Chemical Formula 1 are as described in the specification.

Abstract: Methods, apparatus, systems, and articles of manufacture to schedule parallel instructions using hybrid cores are disclosed. An example apparatus includes thread processing circuitry to split a first thread of the parallel threads into partitions; scheduling circuitry to: select (a) a first core to execute a first partition of the partitions and (b) a second core different than the first core to execute a second partition of the partitions; and generate an execution schedule based on the selection, the interface circuitry to transmit the execution schedule to a device that schedules instructions on the first and second core.

Abstract: An electronic system includes: a host; and a storage device configured to exchange data with the host using an interface protocol. The host provides a fault insertion command, including a fault type, a target location, and a fault condition, to the storage device, based on the interface protocol. The storage device performs a fault detection operation, selected based on the fault type among an assert code execution operation, a memory polling operation, an interrupt polling operation, and a latency detection operation, on the target location in response to the fault insertion command, and stores a snapshot of the storage device when the fault condition is detected as a result of performing the fault detection operation. The host obtains the stored snapshot using the interface protocol, and debugs the storage device using the obtained snapshot.

Abstract: A non-volatile memory device includes a plurality of cell strings in a vertical direction, each of the plurality of cell strings including a plurality of memory cells respectively connected to a plurality of word lines, and an erase control transistor having a first end connected to at least one of both ends of plurality of memory cells and a second end connected to at least one of both ends of each of the plurality of cell strings, and a row decoder configured to apply a first bias voltage to the plurality of word lines in a first period in which an erase voltage applied to the second end of the erase control transistor increases to a target level and to apply a second bias voltage higher than the first bias voltage to at least some of the plurality of word lines in a second period after the first period.

Abstract: A light receiving element includes a first electrode, a hole transport region disposed on the first electrode, a light receiving layer disposed on the hole transport region and converting incident light to an electrical signal, an electron transport region disposed on the light receiving layer, and a second electrode disposed on the electron transport region. The light receiving layer includes a p-dopant compound, a donor compound, and an acceptor compound.