Abstract: An electronic system includes: a host; and a storage device configured to exchange data with the host using an interface protocol. The host provides a fault insertion command, including a fault type, a target location, and a fault condition, to the storage device, based on the interface protocol. The storage device performs a fault detection operation, selected based on the fault type among an assert code execution operation, a memory polling operation, an interrupt polling operation, and a latency detection operation, on the target location in response to the fault insertion command, and stores a snapshot of the storage device when the fault condition is detected as a result of performing the fault detection operation. The host obtains the stored snapshot using the interface protocol, and debugs the storage device using the obtained snapshot.

Abstract: A non-volatile memory device includes a plurality of cell strings in a vertical direction, each of the plurality of cell strings including a plurality of memory cells respectively connected to a plurality of word lines, and an erase control transistor having a first end connected to at least one of both ends of plurality of memory cells and a second end connected to at least one of both ends of each of the plurality of cell strings, and a row decoder configured to apply a first bias voltage to the plurality of word lines in a first period in which an erase voltage applied to the second end of the erase control transistor increases to a target level and to apply a second bias voltage higher than the first bias voltage to at least some of the plurality of word lines in a second period after the first period.

Abstract: A light receiving element includes a first electrode, a hole transport region disposed on the first electrode, a light receiving layer disposed on the hole transport region and converting incident light to an electrical signal, an electron transport region disposed on the light receiving layer, and a second electrode disposed on the electron transport region. The light receiving layer includes a p-dopant compound, a donor compound, and an acceptor compound.

Abstract: A method of testing a suspend operation, the method including: determining whether to transfer a suspend sampling signal to a suspend command circuit at a time point prior to each of a plurality of suspend operation time points stored in a sequence operation circuit; transferring the suspend sampling signal from the sequence operation circuit to the suspend command circuit; generating an internal suspend operation command based on the suspend sampling signal; transferring the internal suspend operation command from the suspend command circuit to the sequence operation circuit; performing suspend operations for all the plurality of suspend operation time points in response to the internal suspend operation command; and determining whether the suspend operations are performed at all of the suspend operation time points.

Abstract: A memory device for improving the speed of a program operation and an operating method thereof is provided. The memory device includes a memory cell array including a plurality of memory cells, a voltage generator configured to generate voltages for one or more program operations and a verify operation performed on the plurality of memory cells, a control logic configured to perform a control operation on the plurality of memory cells so that a first program and a second program loop are performed, a second program operation being performed based on a compensation voltage level determined based on a result of the first verify operation, and a plurality of bit lines connected to the memory cell array, wherein the first verify operation includes first even sensing and second even sensing on even-numbered bit lines, and first odd sensing and second odd sensing on odd-numbered bit lines.

Abstract: An electronic device including: a base layer; a display element layer disposed on the base layer and including a pixel defining layer that includes an opening, and a light emitting element and a light receiving element, which are separated by the pixel defining layer; and an input sensing layer disposed on the display element layer, wherein each of the light emitting element and the light receiving element includes: a first electrode; a hole transport region disposed on the first electrode; an electron transport region disposed on the hole transport region; and a second electrode disposed on the electron transport region, wherein the second electrode is a common layer in the light emitting element and the light receiving element, the light emitting element comprises a light emitting layer disposed between the hole transport region and the electron transport region, and the light receiving element comprises a light receiving layer which is provided between the first electrode and the second electrode and dispo

Abstract: A method for detecting an active pen touch position, and an electronic terminal are provided. When a touch position of an active pen on a screen of an electronic terminal is detected, and once a first touch position of the active pen on the screen of the electronic terminal is detected based on downlink signals collected by sensors under the screen of the electronic terminal, sensors outside a first preset region including the first touch position are disabled, where sensors in the first preset region are still in a working mode. In addition, a quantity of sensors in the first preset region is less than a quantity of sensors under the screen of the electronic terminal.

Abstract: Provided is an accelerometer. The accelerometer includes a frame portion with an opening formed inside, a central portion disposed in the opening, a connecting portion disposed on an upper surface and a lower surface of the central portion and connecting the frame portion and the central portion, and a sensing portion that converts a sensed acceleration into an electrical signal, and the accelerometer senses an acceleration in a Z-axis direction penetrating an upper surface and a lower surface of the central portion, and reduces a sensing of an acceleration in an X-axis direction and a Y-axis direction crossing the Z-axis direction.

Abstract: A method of manufacturing a semiconductor package, the method including providing a first seed layer on an insulation layer such that the first seed layer includes a first metal material; providing a second seed layer on the first seed layer such that the second seed layer includes a second metal material different from the first metal material; forming photoresist patterns on the second seed layer; forming conductive patterns between the photoresist patterns, including the second metal material, and having line shapes that extend in a first direction; removing the photoresist patterns; etching the second seed layer to form second seed patterns having line shapes extending in the first direction; and etching the first seed layer to form first seed patterns having line shapes extending in the first direction, wherein an etchant includes deionized water, a fluorine compound, a competing compound, and a corrosion inhibitor.

Abstract: A display panel includes a display area and a non-display area. The display area includes a touch electrode array consisting of a plurality of touch electrodes, and a plurality of touch signal wires, and the non-display area includes at least two fan-out routing areas. The at least two fan-out routing areas are arranged along a first boundary between the non-display area and the display area, and each fan-out routing area includes a plurality of touch leading wires. The fan-out routing area includes a fan-shaped area and a straight line area, and the fan-shaped area is located between the first boundary and the straight line area. Each touch leading wire includes a first sub-leading wire located in the fan-shaped area and a second sub-leading wire located in the straight line area.

Abstract: Systems, apparatuses and methods may provide for developer stage technology that embeds binary code into an application binary file, wherein the binary code corresponds to vector functions and non-vector functions in statically typed source code, and generates intermediate representation (IR) data, wherein the intermediate representation data corresponds to the vector functions in the statically typed source code. Additionally, the developer stage technology embeds the IR data in the application binary file. Moreover, deployment stage technology may generate a first compilation output based on the application binary file and detect a capability change in an execution environment associated with the first compilation output. The deployment stage technology may also generate, in response to the detected capability change, a second compilation output based on the first compilation output.

Abstract: A solar cell can include a silicon semiconductor substrate; an oxide layer on a first surface of the silicon semiconductor substrate; a polysilicon layer on the oxide layer; a diffusion region at a second surface of the silicon semiconductor substrate; a dielectric film on the polysilicon layer; a first electrode connected to the polysilicon layer through the dielectric film; a passivation film on the diffusion region; and a second electrode connected to the diffusion region through the passivation film.

Abstract: Disclosed is a solar cell including a semiconductor substrate, and a dopant layer disposed over one surface of the semiconductor substrate and having a crystalline structure different from that of the semiconductor substrate, the dopant layer including a dopant. The dopant layer includes a plurality of semiconductor layers stacked one above another in a thickness direction thereof, and an interface layer interposed therebetween. The interface layer is an oxide layer having a higher concentration of oxygen than that in each of the plurality of semiconductor layers.

Abstract: In a method of reducing reliability degradation of a nonvolatile memory device, the nonvolatile memory device in which initial data having an initial threshold voltage distribution is stored in a plurality of memory cells connected to a plurality of wordlines is provided. Before a first process causing reliability degradation is performed, a first write operation is performed such that first data having a first threshold voltage distribution is stored into memory cells connected to first wordlines. The first wordlines have a degree of reliability degradation less than a reference value. Before the first process is performed, a second write operation is performed such that second data having a second threshold voltage distribution is stored into memory cells connected to second wordlines. The second wordlines have a degree of reliability degradation greater than or equal to the reference value.

Abstract: An additive, an electrolyte for a rechargeable lithium battery, and a rechargeable lithium battery, the additive being represented by Chemical Formula 1:

Abstract: Provided are a LED display unit group and a display panel. The LED display unit group includes a circuit board and pixel units arranged in an array of m rows and n columns on the circuit board. The circuit board includes N metal line layers stacked in sequence and an insulating plate located between adjacent metal line layers. The N metal line layers are electrically connected through a conductive via on the insulating plate, where N?2. Each pixel unit includes at least two LED light-emitting chips with different light-emitting colors, where m?2, n?2. The first metal line layer includes m common A-electrode pads, multiple A-electrode pads and multiple B-electrode pads.

Abstract: This application provides a touch display panel for reducing capacitive load. A package substrate includes a first metal layer and a second metal layer. The second metal layer includes conductive patterns that are arranged in a matrix form. The conductive patterns each output a first sensing signal when sensing a touch operation. Each conductive pattern includes a first area and a second area. The first area includes first metal sub-conducting wires extending in the first direction. A plurality of second metal conducting wires extending in the second direction, any second metal conducting wire is connected to one conductive pattern and is configured to transmit the first sensing signal to a touch controller.