Patents by Inventor Justin Gottschlich

Justin Gottschlich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230039377
    Abstract: Methods, apparatus, systems and articles of manufacture to provide machine assisted programming are disclosed. An example apparatus includes a feature extractor to convert compiled code into a first feature vector; a first machine leaning model to identify a cluster of stored feature vectors corresponding to the first feature vector; and a second machine learning model to recommend a second algorithm corresponding to a second feature vector of the cluster based on a comparison of a parameter of a first algorithm corresponding to the first feature vector and the parameter of the second algorithm.
    Type: Application
    Filed: October 17, 2022
    Publication date: February 9, 2023
    Inventors: Marcos Emanuel Carranza, Cesar Martinez-Spessot, Mats Agerstam, Maria Ramirez Loaiza, Alexander Heinecke, Justin Gottschlich
  • Publication number: 20230031591
    Abstract: Methods and apparatus to facilitate generation of database queries are disclosed. An example apparatus includes a generator to generate a global importance tensor. The global importance tensor based on a knowledge graph representative of information stored in a database. The knowledge graph includes objects and connections between the objects. The global importance tensor includes importance values for different types of the connections between the objects. The example apparatus further includes an importance adaptation analyzer to generate a session importance tensor based on the global importance tensor and a user query, and a user interface to provide a suggested query to a user based on the session importance tensor.
    Type: Application
    Filed: June 29, 2022
    Publication date: February 2, 2023
    Inventors: Luis Carlos Maria Remis, Ignacio Javier Alvarez, Li Chen, Javier Felip Leon, David Israel Gonzalez Aguirre, Justin Gottschlich, Javier Sebastian Turek
  • Patent number: 11520331
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed that provide an apparatus to analyze vehicle perspectives, the apparatus comprising a profile generator to generate a first profile of an environment based on a profile template and first data generated by a first vehicle; a data analyzer to: determine a difference between the first profile and a second profile obtained from a first one of one or more nodes in the environment; and in response to a trigger event, update the first profile based on the difference; and a vehicle control system to: in response to the trigger event, update a first perspective of the environment based on one or more of second data from the first one of the one or more nodes or the updated first profile; update a path plan for the first vehicle based on the updated first perspective; and execute the updated path plan.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: December 6, 2022
    Assignee: Intel Corporation
    Inventors: Sara Baghsorkhi, Justin Gottschlich, Alexander Heinecke, Mohammad Mejbah Ul Alam, Shengtian Zhou, Sridhar Sharma, Patrick Andrew Mead, Ignacio Alvarez, David Gonzalez Aguirre, Kathiravetpillai Sivanesan, Jeffrey Ota, Jason Martin, Liuyang Lily Yang
  • Patent number: 11507838
    Abstract: Methods, apparatus, systems and articles of manufacture to optimize execution of a machine learning model are disclosed. An example apparatus includes a quantizer to quantize a layer of a model based on an execution constraint, the layer of the model represented by a matrix. A packer is to pack the quantized layer of the matrix to create a packed layer represented by a packed matrix, the packed matrix having non-zero values of the matrix grouped together along at least one of a row or a column of the matrix. A blocker is to block the packed layer into a blocked layer by dividing the non-zero values in the packed matrix into blocks. A fuser is to fuse the blocked layer into a pipeline. A packager is to package the pipeline into a binary.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: November 22, 2022
    Assignee: Intel Corporation
    Inventors: Mikael Bourges-Sevenier, Adam Herr, Sridhar Sharma, Derek Gerstmann, Todd Anderson, Justin Gottschlich
  • Publication number: 20220334835
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed that implement an automatically evolving code recommendation engine. In one example, the apparatus collects a user code snippet. The apparatus then determines a structured representation of the user code snippet. Next, the apparatus generates a recommended code snippet using the structured representation of the user code snippet. Then the apparatus obtains user-determined code snippet feedback comparing the user code snippet to the recommended code snippet, the user-determined code snippet feedback indicating one of a match, no match, or uncertain. Finally, the apparatus stores a code snippet training pair in a training database, the code snippet training pair including the user code snippet and the recommended code snippet.
    Type: Application
    Filed: December 14, 2021
    Publication date: October 20, 2022
    Inventors: Justin Gottschlich, Niranjan Hasabnis, Paul Petersen, Shengtian Zhou, Celine Lee
  • Patent number: 11475369
    Abstract: Methods, apparatus, systems and articles of manufacture to provide machine assisted programming are disclosed. An example apparatus includes a feature extractor to convert compiled code into a first feature vector; a first machine leaning model to identify a cluster of stored feature vectors corresponding to the first feature vector; and a second machine learning model to recommend a second algorithm corresponding to a second feature vector of the cluster based on a comparison of a parameter of a first algorithm corresponding to the first feature vector and the parameter of the second algorithm.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: October 18, 2022
    Assignee: Intel Corporation
    Inventors: Marcos Emanuel Carranza, Cesar Martinez-Spessot, Mats Agerstam, Maria Ramirez Loaiza, Alexander Heinecke, Justin Gottschlich
  • Publication number: 20220274251
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for industrial robot code recommendation. Disclosed examples include an apparatus comprising: at least one memory; instructions in the apparatus; and processor circuitry to execute the instructions to at least: generate at least one action proposal for an industrial robot; rank the at least one action proposal based on encoded scene information; generate parameters for the at least one action proposal based on the encoded scene information, task data, and environment data; and generate an action sequence based on the at least one action proposal.
    Type: Application
    Filed: November 12, 2021
    Publication date: September 1, 2022
    Inventors: Javier Felip Leon, Ignacio Javier Alvarez, David Isreal Gonzalez-Aguirre, Javier Sabastian Turek, Justin Gottschlich
  • Patent number: 11422553
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed that adjust autonomous vehicle driving software using machine programming. An example apparatus for adjusting autonomous driving software of a vehicle includes an input analyzer to determine a software adjustment based on an obtained driving input and a priority determiner to determine a priority level of the software adjustment. The apparatus further includes a program adjuster to, when the priority level is above a threshold, identify a parameter of the autonomous driving software of the vehicle associated with the software adjustment and adjust the parameter based on the software adjustment, the adjustment to the parameter to change driving characteristics of the vehicle.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: August 23, 2022
    Assignee: Intel Corporation
    Inventors: Bahareh Sadeghi, Hassnaa Moustafa, Shengtian Zhou, Jeffrey Ota, Justin Gottschlich
  • Patent number: 11416603
    Abstract: Methods, systems, articles of manufacture and apparatus to detect process hijacking are disclosed herein. An example apparatus to detect control flow anomalies includes a parsing engine to compare a target instruction pointer (TIP) address to a dynamic link library (DLL) module list, and in response to detecting a match of the TIP address to a DLL in the DLL module list, set a first portion of a normalized TIP address to a value equal to an identifier of the DLL. The example apparatus disclosed herein also includes a DLL entry point analyzer to set a second portion of the normalized TIP address based on a comparison between the TIP address and an entry point of the DLL, and a model compliance engine to generate a flow validity decision based on a comparison between (a) the first and second portion of the normalized TIP address and (b) a control flow integrity model.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: August 16, 2022
    Assignee: Intel Corporation
    Inventors: Zheng Zhang, Jason Martin, Justin Gottschlich, Abhilasha Bhargav-Spantzel, Salmin Sultana, Li Chen, Wei Li, Priyam Biswas, Paul Carlson
  • Patent number: 11386256
    Abstract: Systems and methods for determining a configuration for a microarchitecture are described herein. An example system includes a proposal generator to generate a first candidate configuration of parameters for the microarchitecture, a machine learning model to process the first candidate configuration of parameters to output estimated performance indicators for the microarchitecture, an uncertainty checker to determine whether the estimated performance indicators are reliable, and a performance checker. In response to a determination that the estimated performance indicators are reliable, the performance checker is to determine whether the estimated performance indicators have improved toward a target. Further, if the estimated performance indicators have improved, the performance checker is to store the first candidate configuration of parameters in a memory as a potential solution for a microarchitecture without performing a full simulation on the first candidate configuration of parameters.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Javier Sebastián Turek, Javier Felip Leon, Alexander Heinecke, Evangelos Georganas, Luis Carlos Maria Remis, Ignacio Javier Alvarez, David Israel Gonzalez Aguirre, Shengtian Zhou, Justin Gottschlich
  • Patent number: 11386157
    Abstract: Methods and apparatus to facilitate generation of database queries are disclosed. An example apparatus includes a generator to generate a global importance tensor. The global importance tensor based on a knowledge graph representative of information stored in a database. The knowledge graph includes objects and connections between the objects. The global importance tensor includes importance values for different types of the connections between the objects. The example apparatus further includes an importance adaptation analyzer to generate a session importance tensor based on the global importance tensor and a user query, and a user interface to provide a suggested query to a user based on the session importance tensor.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Luis Carlos Maria Remis, Ignacio Javier Alvarez, Li Chen, Javier Felip Leon, David Israel Gonzalez Aguirre, Justin Gottschlich, Javier Sebastian Turek
  • Publication number: 20220193895
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for object manipulation via action sequence optimization. An example method disclosed herein includes determining an initial state of a scene, generating a first action phase sequence to transform the initial state of the scene to a solution state of the scene by selecting a plurality of action phases based on action phase probabilities, determining whether a first simulated outcome of executing the first action phase sequence satisfies an acceptability criterion and, when the first simulated outcome does not satisfy the acceptability criterion, calculating a first cost function output based on a difference between the first simulated outcome and the solution state of the scene, the first cost function output utilized to generate updated action phase probabilities.
    Type: Application
    Filed: December 31, 2021
    Publication date: June 23, 2022
    Inventors: Javier Felip Leon, David Israel Gonzalez Aguirre, Javier Sebastián Turek, Ignacio Javier Alvarez, Luis Carlos Maria Remis, Justin Gottschlich
  • Publication number: 20220197611
    Abstract: Apparatus, devices, systems, methods, and articles of manufacture for intent-based machine programming are disclosed. An example system categorize source code blocks includes a code repository accessor to access a code repository and select a source code block. The example system also includes a signature generator to generate a signature for the source code block, a collateral miner to extract collateral associated with the source code block, and a tokenizer to transform the source code block into tokens. In addition, the example system includes a function assessor to determine a function of the source code block based on the collateral and the tokens and an input/output determiner to determine an input and an output of the source code block based on the collateral and the signature. The example system further includes a tagger to categorize the source code block with the function, input, and output.
    Type: Application
    Filed: March 7, 2022
    Publication date: June 23, 2022
    Inventors: Brian Cremeans, Marcos Emanuel Carranza, Krishna Surya, Mats Agerstam, Justin Gottschlich
  • Patent number: 11354564
    Abstract: An example includes a sequence generator to generate a plurality of sequence pairs, a first one of the sequence pairs including: (i) a first input sequence representing first accesses to first tensors in a first loop nest of a first computer program, and (ii) a first output sequence representing a first tuned loop nest corresponding to the first accesses to the first tensors in the first loop nest; a model trainer to train a recurrent neural network based on the sequence pairs as training data, the recurrent neural network to be trained to tune loop ordering of a second computer program based on a second input sequence representing second accesses to a second tensor in a second loop nest of the second computer program; and a memory interface to store, in memory, a trained model corresponding to the recurrent neural network.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: June 7, 2022
    Assignee: Intel Corporation
    Inventors: Alexander Heinecke, Evangelos Georganas, Justin Gottschlich
  • Publication number: 20220171626
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for intentional programming for heterogeneous systems. An example non-transitory computer readable storage medium includes instructions that, when executed, cause processor circuitry to at least identify a first code block having a first algorithmic purpose based on a second code block having a second algorithmic purpose, the second algorithmic purpose corresponding to the first algorithmic purpose, translate the first code block into executable domain specific language code, and output the executable domain specific language code.
    Type: Application
    Filed: February 15, 2022
    Publication date: June 2, 2022
    Inventors: Adam Herr, Derek Gerstmann, Justin Gottschlich, Mikael Bourges-Sevenier, Sridhar Sharma
  • Patent number: 11340874
    Abstract: Methods, apparatus, systems and articles of manufacture to recommend instruction adaptations to improve compute performance are disclosed. An example apparatus includes a pattern detector to detect an execution pattern from an execution profile provided by a server, the execution profile associated with an instruction stored in an instruction repository. An adaptation identifier is to identify a possible instruction adaptation that may be applied to the instruction associated with the execution pattern. A model processor is to predict, using a machine learning model, an expected performance improvement of the adaptation. A result comparator is to determine whether the expected performance improvement meets an threshold. An instruction editor is to, in response to the result comparator determining that the expected performance improvement meets the threshold, apply the possible instruction adaptation to the instruction in the instruction repository.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: May 24, 2022
    Assignee: Intel Corporation
    Inventors: Thijs Metsch, Mohammad Mejbah Ul Alam, Justin Gottschlich
  • Publication number: 20220121430
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed that perform machine learning-guided compiler optimizations for register-based hardware architectures. Examples disclosed herein include a non-transitory computer readable medium comprising instructions that, when executed, cause a machine to at least select a register-based compiler transformation to apply to source code at a current position in a search tree, determine whether the search tree is in need of pruning based on an output of a query to a machine learning (ML) model, in response to determining the search tree is in need of pruning, prune the search tree at the current position, in response to applying the selected register-based compiler transformation to the source code, generate a code variant, calculate a score associated with the source code at the current position in the search tree, and update parameters of the machine learning (ML) model to include the calculated score.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 21, 2022
    Inventors: Anand Venkat, Justin Gottschlich, Niranjan Hasabnis
  • Publication number: 20220124503
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to detect attacks in V2X networks. An example apparatus includes a challenge handler to (a) transmit a first challenge packet to a first vehicle to request a transmission of a first response, (b) instruct a second challenge packet to be transmitted to a second vehicle to request a transmission of a second response, (c) increment a first counter when the first response is not obtained, (d) increment a second counter when the second response is not obtained, and (e) after repeating (a)-(d), determine that the first and second vehicles are phantom vehicles associated with an attacker with a half-duplex radio when at least one of the first or second counters satisfy a threshold, and a network interface to instruct a third vehicle associated with the V2X network to ignore future messages from the phantom vehicles based on the determination.
    Type: Application
    Filed: December 8, 2021
    Publication date: April 21, 2022
    Inventors: Liuyang Lily Yang, Debabani Choudhury, Sridhar Sharma, Kathiravetpillai Sivanesan, Justin Gottschlich, Zheng Zhang, Yair Yona, Xiruo Liu, Moreno Ambrosin, Kuilin Clark Chen
  • Publication number: 20220114137
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to generate command lists to be offloaded to accelerator circuitry. An example apparatus includes kernel duration model circuitry to predict a duration of execution of a first kernel based on a first source location, a first name, a first property of a first argument, or an occupancy of the first kernel. The example apparatus includes subsequent kernel model circuitry to predict a tuple and a dependency of a second kernel based on a second source location, a second name, a second property of a second argument, or a time of submission of the previous kernel. The example apparatus includes reinforcement learning model circuitry to determine whether to bundle the first kernel into a command list based on the duration of execution of the first kernel, the tuple of the second kernel, or the dependency of the second kernel.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Celine Lee, Niranjan Hasabnis, Paul Petersen, Justin Gottschlich, Ramesh Peri
  • Publication number: 20220114076
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to determine refined context for bug detection. At least one non-transitory machine-readable medium includes instructions that, when executed, cause at least one processor to at least classify a node on a graph, the graph to represent a computer program, the node to contain partial bug context corresponding to the computer program; identify a location of a software bug in the computer program, the location based on the node; determine a static bug context of the software bug using the location of the software bug; determine a dynamic bug context of the software bug using the location of the software bug; and determine a refined bug context based on a merge of the static bug context and the dynamic bug context.
    Type: Application
    Filed: December 17, 2021
    Publication date: April 14, 2022
    Inventors: Shengtian Zhou, Justin Gottschlich, Fangke Ye, Celine Lee