Patents by Inventor Justin Gottschlich

Justin Gottschlich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220108182
    Abstract: Methods and apparatus to train models for program synthesis are disclosed. A disclosed example apparatus includes at least one memory, instructions, and processor circuitry. The processor circuitry is to execute the instructions to sample pairs of programs, the pairs of programs including first programs and second programs, the first programs including natural language descriptions and second programs, calculate program similarity scores corresponding to the pairs of programs, and train a model based on entries corresponding to ones of the pairs of programs, at least one of the entries including a corresponding one of the natural language descriptions with a paired one of the second programs, and a corresponding one of the program similarity scores.
    Type: Application
    Filed: December 14, 2021
    Publication date: April 7, 2022
    Inventors: Todd A. Anderson, Shengtian Zhou, Javier Turek, Celine Lee, Justin Gottschlich
  • Publication number: 20220107792
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to identify code semantics.
    Type: Application
    Filed: December 17, 2021
    Publication date: April 7, 2022
    Inventor: Justin Gottschlich
  • Publication number: 20220091895
    Abstract: Methods, apparatus, systems, and articles of manufacture to determine execution cost are disclosed. An example apparatus includes memory; instructions included in the apparatus; and processor circuitry to execute the instruction to: cause a plurality of instructions corresponding to a mnemonic to be executed; determine an average execution cost of the plurality of instructions; determine a standard deviation of execution costs of the plurality of instructions; and generate a mapping table including an entry, the entry including the mnemonic in association with the average and the standard deviation.
    Type: Application
    Filed: December 2, 2021
    Publication date: March 24, 2022
    Inventors: Niranjan Hasabnis, Justin Gottschlich, Jesmin Jahan Tithi, Anand Venkat
  • Publication number: 20220092042
    Abstract: Methods, apparatus, systems, and articles of manufacture to improve data quality for artificial intelligence are disclosed. An example apparatus includes an interface; instructions; and processor circuitry to execute the instruction to: determine an indirect quality of a repository that include datapoints of a dataset; determine a direct quality of the repository that include the datapoints of the dataset; determine a dataset quality based on the indirect quality of the repository and the direct quality of the repository; and when the quality does not satisfy a threshold, filter out a subset of the datapoints to prepare the dataset to support the training of the neural network.
    Type: Application
    Filed: December 1, 2021
    Publication date: March 24, 2022
    Inventors: Niranjan Hasabnis, Justin Gottschlich, Celine Lee, Emine Tatbul Bitim, Shengtian Zhou
  • Patent number: 11269601
    Abstract: Apparatus, devices, systems, methods, and articles of manufacture for intent-based machine programming are disclosed. An example system categorize source code blocks includes a code repository accessor to access a code repository and select a source code block. The example system also includes a signature generator to generate a signature for the source code block, a collateral miner to extract collateral associated with the source code block, and a tokenizer to transform the source code block into tokens. In addition, the example system includes a function assessor to determine a function of the source code block based on the collateral and the tokens and an input/output determiner to determine an input and an output of the source code block based on the collateral and the signature. The example system further includes a tagger to categorize the source code block with the function, input, and output.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: March 8, 2022
    Assignee: Intel Corporation
    Inventors: Brian Cremeans, Marcos Emanuel Carranza, Krishna Surya, Mats Agerstam, Justin Gottschlich
  • Patent number: 11269622
    Abstract: Apparatus, systems, articles of manufacture, and methods for a context and complexity-aware recommendation system for efficient software development.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 8, 2022
    Assignee: Intel Corporation
    Inventors: Mohammad Mejbah Ul Alam, David I. Gonzalez Aguirre, Shengtian Zhou, Justin Gottschlich, Li Chen
  • Patent number: 11269639
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for intentional programming for heterogeneous systems. An example apparatus includes a code lifter to identify annotated code corresponding to an algorithm to be executed on the heterogeneous system based on an identifier being associated with the annotated code, and convert the annotated code in the first representation to intermediate code in a second representation by identifying the intermediate code as having a first algorithmic intent that corresponds to a second algorithmic intent of the annotated code, a domain specific language (DSL) generator to translate the intermediate code in the second representation to DSL code in a third representation when the first algorithmic intent matches the second algorithmic intent, the third representation corresponding to a DSL representation, and a code replacer to invoke a compiler to generate an executable including variant binaries based on the DSL code.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: March 8, 2022
    Assignee: Intel Corporation
    Inventors: Adam Herr, Derek Gerstmann, Justin Gottschlich, Mikael Bourges-Sevenier, Sridhar Sharma
  • Patent number: 11258813
    Abstract: Apparatus, systems, methods, and articles of manufacture for fingerprinting and classifying application behaviors using telemetry are disclosed. An example apparatus includes a trace processor to process events in a processor trace to capture application execution behavior; a fingerprint extractor to extract a first fingerprint from the captured application execution behavior and performance monitor information; a fingerprint clusterer to, in a training mode cluster the first fingerprint and the second fingerprint into a cluster of fingerprints to be stored in a fingerprint database with a classification; and a fingerprint classifier to, in a deployed mode, classify a third fingerprint, the fingerprint classifier to trigger a remedial action when the classification is malicious.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: February 22, 2022
    Assignee: Intel Corporation
    Inventors: Justin Gottschlich, Rachit Mathur, Zheng Zhang
  • Patent number: 11252567
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to detect attacks in V2X networks. An example apparatus includes a challenge handler to (a) transmit a first challenge packet to a first vehicle to request a transmission of a first response, (b) instruct a second challenge packet to be transmitted to a second vehicle to request a transmission of a second response, (c) increment a first counter when the first response is not obtained, (d) increment a second counter when the second response is not obtained, and (e) after repeating (a)-(d), determine that the first and second vehicles are phantom vehicles associated with an attacker with a half-duplex radio when at least one of the first or second counters satisfy a threshold, and a network interface to instruct a third vehicle associated with the V2X network to ignore future messages from the phantom vehicles based on the determination.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: February 15, 2022
    Assignee: Intel Corporation
    Inventors: Liuyang Lily Yang, Debabani Choudhury, Sridhar Sharma, Kathiravetpillai Sivanesan, Justin Gottschlich, Zheng Zhang, Yair Yona, Xiruo Liu, Moreno Ambrosin, Kuilin Clark Chen
  • Publication number: 20220019666
    Abstract: Methods, apparatus, systems and articles of manufacture to identify a side-channel attack are disclosed. Example instructions cause one or more processors to generate an event vector based on one or more counts corresponding to tasks performed by a central processing unit; determine distances between the event vector and weight vectors of neurons in a self-organizing map; select a neuron of the neurons that results based on a determined distance; identify neurons that neighbor the selected neuron; and update at least one of a weight vector of the selected neuron or weight vectors of the neighboring neurons based on the determined distance of the selected neuron.
    Type: Application
    Filed: July 26, 2021
    Publication date: January 20, 2022
    Inventors: Mohammad Mejbah Ul Alam, Justin Gottschlich, Shengtian Zhou
  • Publication number: 20220012163
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to detect code defects. An example apparatus includes repository interface circuitry to retrieve code repositories corresponding to a programming language of interest, tree generating circuitry to generate parse trees corresponding to code blocks contained in the code repositories, directed acyclic graph (DAG) circuitry to generate DAGs corresponding to respective ones of the parse trees, the DAGs including control flow information and data flow information, abstraction generating circuitry to abstract the DAGs, invariant identification circuitry to extract invariants from the abstracted DAGs, and DAG comparison circuitry to cluster respective ones of the extracted invariants to identify respective ones of the abstracted DAGs with common invariants.
    Type: Application
    Filed: September 23, 2021
    Publication date: January 13, 2022
    Inventors: Niranjan Hasabnis, Justin Gottschlich, Jeremie Dreyfuss, Amitai Armon, Itamar Ben-Ari, Oren David Kimhi
  • Patent number: 11213947
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for object manipulation via action sequence optimization. An example method disclosed herein includes determining an initial state of a scene, generating a first action phase sequence to transform the initial state of the scene to a solution state of the scene by selecting a plurality of action phases based on action phase probabilities, determining whether a first simulated outcome of executing the first action phase sequence satisfies an acceptability criterion and, when the first simulated outcome does not satisfy the acceptability criterion, calculating a first cost function output based on a difference between the first simulated outcome and the solution state of the scene, the first cost function output utilized to generate updated action phase probabilities.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: January 4, 2022
    Assignee: INTEL CORPORATION
    Inventors: Javier Felip Leon, David Israel Gonzalez Aguirre, Javier Sebastián Turek, Ignacio Javier Alvarez, Luis Carlos Maria Remis, Justin Gottschlich
  • Patent number: 11188643
    Abstract: Methods, apparatus, systems and articles of manufacture for detecting a side channel attack using hardware performance counters are disclosed. An example apparatus includes a hardware performance counter data organizer to collect a first value of a hardware performance counter at a first time and a second value of the hardware performance counter at a second time. A machine learning model processor is to apply a machine learning model to predict a third value corresponding to the second time. An error vector generator is to generate an error vector representing a difference between the second value and the third value. An error vector analyzer is to determine a probability of the error vector indicating an anomaly. An anomaly detection orchestrator is to, in response to the probability satisfying a threshold, cause the performance of a responsive action to mitigate the side channel anomaly.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: November 30, 2021
    Assignee: INTEL CORPORATION
    Inventors: Li Chen, Abhishek Basak, Salmin Sultana, Justin Gottschlich
  • Patent number: 11188324
    Abstract: Methods, apparatus, systems, and articles of manufacture to perform heterogeneous data structure selection via programmer annotations. An example apparatus includes a phase tracker to identify a first phase and a second phase, a cost predictor to estimate interaction costs of interacting with respective types of data structures within the first phase and the second phase, a tree constructor to construct a tree corresponding to a first data structure type, the tree including a first node in the first phase, a second node in the second phase, and an edge connecting the first node and the second node, the second node representing a second data structure type different from the first data structure type, a transformation cost calculator to calculate a transformation cost for the edge, and a branch selector to select a sequence of data structures based on the combined interaction costs and transformation costs.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: November 30, 2021
    Assignee: Intel Corporation
    Inventor: Justin Gottschlich
  • Patent number: 11157384
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for code review assistance for dynamically typed languages. An example apparatus to analyze a segment of code includes a function identifier to identify a first input of a first function call included in the segment of the code, a parameter type vector (PTV) estimator model to estimate a first data structure based on the first input, the PTV estimator model generated via a set of reviewed code, a PTV determiner to generate a second data structure based on a data parameter type of the first input, an error comparator to determine a first reconstruction error based on the first data structure, and the second data structure and a recommendation generator to, if the first reconstruction error does not satisfy a recommendation threshold, generate a first recommendation to review the first function call.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: October 26, 2021
    Assignee: Intel Corporation
    Inventors: Marcos Carranza, Mats Agerstam, Justin Gottschlich, Alexander Heinecke, Cesar Martinez-Spessot, Maria Ramirez Loaiza, Mohammad Mejbah Ul Alam, Shengtian Zhou
  • Publication number: 20210304613
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to validate data communicated by a vehicle. An example apparatus an anomaly detector to, in response to data communicated by a vehicle, at least one of compare an estimated speed with a reported speed or compare a location of the vehicle with a reported location. The apparatus including the anomaly detector further to generate an indication of the vehicle in response to the comparison. The apparatus further includes a notifier to discard data sent by the vehicle and notify surrounding vehicles of the data communicated by the vehicle.
    Type: Application
    Filed: April 9, 2021
    Publication date: September 30, 2021
    Inventors: Liuyang Yang, Yair Yona, Moreno Ambrosin, Xiruo Liu, Hosein Nikopour, Shilpa Talwar, Kathiravetpillai Sivanesan, Sridhar Sharma, Debabani Choudhury, Kuilin Clark Chen, Jeffrey Ota, Justin Gottschlich
  • Patent number: 11074344
    Abstract: Methods, apparatus, systems and articles of manufacture to identify a side-channel attack are disclosed. An example apparatus includes a vector-to-neuron processor to map an event vector to a neuron of a trained self-organizing map; a buffer processor to identify a task pair based on the neuron and an adjacent neuron of the neuron; a buffer to store data corresponding to the identified task pair; an attack identifier to, when information stored in the buffer corresponds to more than a threshold number of task pairs corresponding to the identified task pair, identify a malware attack; and a mitigation technique selector to select a technique for mitigating the malware attack.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: July 27, 2021
    Assignee: Intel Corporation
    Inventors: Mohammad Mejbah Ul Alam, Justin Gottschlich, Shengtian Zhou
  • Patent number: 11061650
    Abstract: Methods and apparatus to automatically generate code for graphical user interfaces are disclosed. An example apparatus includes a textual description analyzer to encode a user-provided textual description of a GUI design using a first neural network. The example apparatus further includes a DSL statement generator to generate a DSL statement with a second neural network. The DSL statement is to define a visual element of the GUI design. The DSL statement is generated based on at least one of the encoded textual description or a user-provided image representative of the GUI design. The example apparatus further includes a rendering tool to render a mockup of the GUI design based on the DSL statement.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: July 13, 2021
    Assignee: Intel Corporation
    Inventors: Javier Sebastian Turek, Javier Felip Leon, Luis Carlos Maria Remis, David Israel Gonzalez Aguirre, Ignacio Javier Alvarez, Justin Gottschlich
  • Publication number: 20210182031
    Abstract: Methods, systems, and apparatus for automatic detection of software bugs are disclosed. An example apparatus includes a comparator to compare reference code to input code to detect a source code error in the input code; a graph generator to generate a graphical representation of the reference code or the input code, the graphical representation to identify non-overlapping code regions; and a root cause determiner to determine a root cause of the source code error in the input code, the root cause based on the non-overlapping code regions.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 17, 2021
    Inventors: Fangke Ye, Justin Gottschlich, Shengtian Zhou, Roshni Iyer, Jesmin Jahan Tithi
  • Patent number: 11036477
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed improve utilization of a heterogeneous system executing software. The disclosed methods, apparatus, systems and articles of manufacture include an apparatus comprising a variant manager to determine whether an algorithm is a candidate for sub-algorithmic partitioning (SAP) based on at least one of a first size of input data to the algorithm and a second size of output data from the algorithm; a partitioner to partition the algorithm into at least a first tile and a second tile; and a compiler to compile a first variant based on the first tile and a second variant based on the second tile into an executable file, the first variant to be executed on a first processing element of the heterogeneous system, the second variant to be executed on a second processing element of the heterogeneous system.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: June 15, 2021
    Assignee: INTEL CORPORATION
    Inventors: Adam Herr, Sridhar Sharma, Mikael Bourges-Sevenier, Justin Gottschlich