Patents by Inventor Justin J. Song

Justin J. Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11435809
    Abstract: A system with improved power performance for tasks executed in parallel. A plurality of processing cores each to execute tasks. An inter-core messaging unit to conveys messages between the cores. A power management agent transitions a first core into a lower power state responsive to the first core waiting for a second core to complete a second task. In some embodiments long messages are subdivided to allow a receiving core to resume useful work sooner.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: September 6, 2022
    Assignee: Intel Corporation
    Inventors: Devadatta V. Bodas, Muralidhar Rajappa, Justin J. Song, Andy Hoffman
  • Publication number: 20210365096
    Abstract: A system with improved power performance for tasks executed in parallel. A plurality of processing cores each to execute tasks. An inter-core messaging unit to conveys messages between the cores. A power management agent transitions a first core into a lower power state responsive to the first core waiting for a second core to complete a second task. In some embodiments long messages are subdivided to allow a receiving core to resume useful work sooner.
    Type: Application
    Filed: May 3, 2021
    Publication date: November 25, 2021
    Applicant: Intel Corporation
    Inventors: Devadatta V. Bodas, Muralidhar Rajappa, Justin J. Song, Andy Hoffman
  • Patent number: 10996737
    Abstract: A system with improved power performance for tasks executed in parallel. A plurality of processing cores each to execute tasks. An inter-core messaging unit to conveys messages between the cores. A power management agent transitions a first core into a lower power state responsive to the first core waiting for a second core to complete a second task. In some embodiments long messages are subdivided to allow a receiving core to resume useful work sooner.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: May 4, 2021
    Assignee: Intel Corporation
    Inventors: Devadatta V. Bodas, Muralidhar Rajappa, Justin J. Song, Andy Hoffman
  • Patent number: 10963031
    Abstract: A server system includes a common power bus, a power supply to provide direct current (DC) power through the common power bus, at least one node including a processor to receive the DC power through the common power bus, a transmitter capacitive coupled to the common power bus to transmit a power information signal from the power supply through the common power bus, and at least one receiver capacitive coupled to the common power bus to receive the power information signal transmitted by the transmitter and to provide the received power information signal to the at least one node. A plurality of buffers respectively coupled between the common power bus and each of the power supply and the at least one node provide path separation for high frequency and low frequency currents.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: March 30, 2021
    Assignee: Intel Corporation
    Inventors: Brian J. Griffith, Viktor D. Vogman, Justin J. Song
  • Patent number: 10904127
    Abstract: A zombie server can be detected. Detecting a zombie server can include labeling a plurality of processes as utility software, calculating a utilization of utility software on the plurality of processes executed in one or more processing resources during an interval of time, and calculating a server utilization of the one or more processing resources during the interval of time. Detecting the zombie server can also include determining whether a difference between the utilization of utility software and the server utilization is greater than a threshold, and identifying a server that hosts the processing resource as a zombie server based on a determination that the difference is smaller than the threshold.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: January 26, 2021
    Assignee: Intel Corporation
    Inventors: Devadatta Bodas, Justin J. Song, Muralidhar Rajappa, Andy Hoffman
  • Patent number: 10719107
    Abstract: A method and apparatus for node power regulation among nodes that share a power supply are described. In one embodiment, the apparatus comprises a power supply unit to provide input power and a plurality of nodes coupled to receive the input power, where each node of the plurality of nodes is operable to run power management logic, and wherein two or more nodes of the plurality of nodes alternate between performing power management and providing power regulation control information to other nodes of the plurality of nodes to regulate power consumption by the plurality of nodes, with, at any one time, only one node of plurality of nodes generating the power regulation control to regulate power for the plurality of nodes.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: July 21, 2020
    Assignee: INTEL CORPORATION
    Inventors: Justin J. Song, Devadatta V. Bodas, Muralidhar Rajappa, Brian J. Griffith, Andy Hoffman, Gopal R. Mundada
  • Patent number: 10644963
    Abstract: A zombie server can be detected. Detecting a zombie server can include receiving, at a server, network traffic and calculating a percentage of the network traffic as being productivity software layer 7 protocols every first time interval. Detecting a zombie server can also include marking the server as a zombie server based on the percentage every second time interval and processing the network traffic at the server to perform a number of actions by the productivity software.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: May 5, 2020
    Assignee: Intel Corporation
    Inventors: Devadatta Bodas, Justin J. Song, Muralidhar Rajappa, Andy Hoffman
  • Patent number: 10404676
    Abstract: A method and apparatus for coordinating and authenticating requests for data. In one embodiment, the apparatus comprises: a baseboard management controller (BMC); and a request coordinator coupled to the BMC to intercept BMC requests and to provide intercepted requests to the BMC, where the coordination interface comprises a request parser to parse parameters for each of the BMC requests, one or more queues to store the requests while the BMC is servicing another BMC request, and a command submitter to send individual BMC requests to the BMC, wherein the BMC is operable to generate the responses to the BMC requests received from the coordination interface and to send the responses to the coordination interface.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: September 3, 2019
    Assignee: INTEL CORPORATION
    Inventors: Justin J. Song, Devadatta V. Bodas, Muralidhar Rajappa, Andy Hoffman, Mariusz Oriol, Gopal R. Mundada
  • Patent number: 10261559
    Abstract: In one embodiment, the present invention includes a method for providing power state change information from a plurality of cores of a processor to a predictor at a periodic interval and generating a prediction to indicate a predicted operation level of the cores during a next operating period. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: April 16, 2019
    Assignee: Intel Corporation
    Inventors: Justin J. Song, Qian Diao
  • Publication number: 20180188790
    Abstract: A server system includes a common power bus, a power supply to provide direct current (DC) power through the common power bus, at least one node including a processor to receive the DC power through the common power bus, a transmitter capacitive coupled to the common power bus to transmit a power information signal from the power supply through the common power bus, and at least one receiver capacitive coupled to the common power bus to receive the power information signal transmitted by the transmitter and to provide the received power information signal to the at least one node. A plurality of buffers respectively coupled between the common power bus and each of the power supply and the at least one node provide path separation for high frequency and low frequency currents.
    Type: Application
    Filed: February 27, 2018
    Publication date: July 5, 2018
    Applicant: INTEL CORPORATION
    Inventors: Brian J. Griffith, Viktor D. Vogman, Justin J. Song
  • Patent number: 9971391
    Abstract: A method of assessing energy efficiency of a High-performance computing (HPC) system, including: selecting a plurality of HPC workloads to run on a system under test (SUT) with one or more power constraints, wherein the SUT includes a plurality of HPC nodes in the HPC system, executing the plurality of HPC workloads on the SUT, and generating a benchmark metric for the SUT based on a baseline configuration for each selected HPC workload and a plurality of measured performance per power values for each executed workload at each selected power constraint is shown.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: May 15, 2018
    Assignee: Intel Corporation
    Inventors: Devadatta Bodas, Meenakshi Arunachalam, Ilya Sharapov, Charles R. Yount, Scott B. Huck, Ramakrishna Huggahalli, Justin J. Song, Brian J. Griffith, Muralidhar Rajappa, Lingdan (Linda) Zeng
  • Patent number: 9939834
    Abstract: A system and method for computing at a facility having systems of multiple compute nodes to execute jobs of computing. Power consumption of the facility is managed to within a power band. The power consumption may be adjusted by implementing (e.g., by a power balloon) activities having little or no computational output.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: April 10, 2018
    Assignee: Intel Corporation
    Inventors: Devadatta V. Bodas, Muralidhar Rajappa, Justin J. Song, Andy Hoffman, Michael K. Patterson
  • Patent number: 9933829
    Abstract: A server system includes a common power bus, a power supply to provide direct current (DC) power through the common power bus, at least one node including a processor to receive the DC power through the common power bus, a transmitter capacitive coupled to the common power bus to transmit a power information signal from the power supply through the common power bus, and at least one receiver capacitive coupled to the common power bus to receive the power information signal transmitted by the transmitter and to provide the received power information signal to the at least one node. A plurality of buffers respectively coupled between the common power bus and each of the power supply and the at least one node provide path separation for high frequency and low frequency currents.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: April 3, 2018
    Assignee: INTEL CORPORATION
    Inventors: Brian J. Griffith, Viktor D. Vogman, Justin J. Song
  • Patent number: 9927857
    Abstract: A process identifier for a job is collected. The job runs on a plurality of nodes. The job is identified using the process identifier. A node for the job is identified. An amount of power consumed by the node to run the job is determined.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: March 27, 2018
    Assignee: INTEL CORPORATION
    Inventors: Justin J. Song, Devadatta V. (Deva) Bodas, Muralidhar (Murali) Rajappa, Andy Hoffman, James W. (Jimbo) Alexander, Joseph A. Schaefer, Sunil K. Mahawar
  • Patent number: 9921633
    Abstract: An indication of a mode for a job is received. An available power for the job is determined based on the mode. A first power for the job is allocated based on the available power. A first frequency for the job is determined based on the available power. The first power is adjusted based on the available power.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: March 20, 2018
    Assignee: INTEL CORPORATION
    Inventors: Devadatta V. (Deva) Bodas, Justin J. Song, Muralidhar (Murali) Rajappa, Andy Hoffman, James W. (Jimbo) Alexander, Joseph A. Schaefer, Sunil K. Mahawar
  • Patent number: 9851771
    Abstract: Dynamic monitoring of current draw by a memory device or memory subsystem can enable a power management system to adjust a memory access performance parameter based on monitored power usage. The system can generate a power usage characterization for the memory device and/or memory subsystem based on monitoring current draw for a known pattern, and then subsequently use the power usage characterization to determine how to adjust the memory access performance parameter.
    Type: Grant
    Filed: December 28, 2013
    Date of Patent: December 26, 2017
    Assignee: Intel Corporation
    Inventors: Lawrence A Cooper, Justin J Song, Xiuting C Man, Nagi Aboulenein, Christopher E Cox, Rebecca Z Loop
  • Publication number: 20170359246
    Abstract: A zombie server can be detected. Detecting a zombie server can include labeling a plurality of processes as utility software, calculating a utilization of utility software on the plurality of processes executed in one or more processing resources during an interval of time, and calculating a server utilization of the one or more processing resources during the interval of time. Detecting the zombie server can also include determining whether a difference between the utilization of utility software and the server utilization is greater than a threshold, and identifying a server that hosts the processing resource as a zombie server based on a determination that the difference is smaller than the threshold.
    Type: Application
    Filed: June 13, 2016
    Publication date: December 14, 2017
    Applicant: INTEL CORPORATION
    Inventors: Devadatta Bodas, Justin J. Song, Muralidhar Rajappa, Andy Hoffman
  • Publication number: 20170359226
    Abstract: A zombie server can be detected. Detecting a zombie server can include receiving, at a server, network traffic and calculating a percentage of the network traffic as being productivity software layer 7 protocols every first time interval. Detecting a zombie server can also include marking the server as a zombie server based on the percentage every second time interval and processing the network traffic at the server to perform a number of actions by the productivity software.
    Type: Application
    Filed: June 13, 2016
    Publication date: December 14, 2017
    Applicant: INTEL CORPORATION
    Inventors: Devadatta Bodas, Justin J. Song, Muralidhar Rajappa, Andy Hoffman
  • Publication number: 20170285717
    Abstract: A system with improved power performance for task executed in parallel. A plurality of processing cores each to execute tasks. An inter-core messaging unit to conveys messages between the cores. A power management agent transitions a first core into a lower power state responsive to the first core waiting for a second core to complete a second task. In some embodiments long messages are subdivided to allow a receiving core to resume useful work sooner.
    Type: Application
    Filed: March 31, 2016
    Publication date: October 5, 2017
    Inventors: DEVADATTA V. BODAS, MURALIDHAR RAJAPPA, JUSTIN J. SONG, ANDY HOFFMAN
  • Publication number: 20170285702
    Abstract: A method and apparatus for node power regulation among nodes that share a power supply are described. In one embodiment, the apparatus comprises a power supply unit to provide input power and a plurality of nodes coupled to receive the input power, where each node of the plurality of nodes is operable to run power management logic, and wherein two or more nodes of the plurality of nodes alternate between performing power management and providing power regulation control information to other nodes of the plurality of nodes to regulate power consumption by the plurality of nodes, with, at any one time, only one node of plurality of nodes generating the power regulation control to regulate power for the plurality of nodes.
    Type: Application
    Filed: March 29, 2016
    Publication date: October 5, 2017
    Inventors: Justin J. Song, Devadatta V. Bodas, Muralidhar Rajappa, Brian J. Griffith, Andy Hoffman, Gopal R. Mundada