Abstract: On a multi-core processor that supports simultaneous multi-threading, the power state for each logical processor is tracked. Upon indication that a logical processor is ready to transition into a deep low power state, software remapping (e.g., thread-hopping) may be performed. Accordingly, if multiple logical processors, on different cores, are in a low-power state, they are re-mapped to same core and the core is then placed into a low power state. Other embodiments are described and claimed.

Abstract: A system filter is maintained to track which single-thread cores [or which multi-threaded logical CPUs] are in a low-latency power state. For at least one embodiment, low-latency power states include an active C0 state and a low-latency C1 idle state. The system filter is used to filter out any cores/thread contexts in a high-latency state during task scheduling. This may be accomplished by filtering the OS-provided task affinity mask by the system filter. As a result, tasks are scheduled only on available cores/logical CPUs that are in an active or low-latency idle state. Other embodiments are described and claimed.