Abstract: System, computer implemented method and computer program product for preparing and navigating a query tree including a plurality of query nodes and informational nodes. Each query node is associated with a prompt, branching criteria and keywords. A current query node provides a prompt to a user and a user response is received and analyzed to identify branching criteria and keywords from the user response. The method navigates to another node in the query tree in consideration of the branching criteria received in the user response and a comparison between the keywords received in the user response and the keywords associated with the query nodes. The comparison may validate navigation to a destination node corresponding to the branching criteria or the comparison may indicate incorrect navigation of the query tree. Corrective navigation can be implemented in various ways based upon the keywords received in the user response.

Abstract: An integrated circuit (IC) that includes a semiconductor die in an IC package. The semiconductor die includes an electrical endpoint. The IC also includes a pad affixed to the semiconductor die. The pad is characterized by a capacitance and is coupled to the electrical endpoint. The IC also includes a bond wire coupling the pad to an IC package pin. The bond wire is an inductor characterized by an inductance. The inductance is configured to decrease signal degradation caused by the capacitance of the pad on electrical signals transmitted between the pin and the electrical endpoint of the semiconductor die.

Abstract: System, computer implemented method and computer program product for preparing and navigating a query tree including a plurality of query nodes and informational nodes. Each query node is associated with a prompt, branching criteria and keywords. A current query node provides a prompt to a user and a user response is received and analyzed to identify branching criteria and keywords from the user response. The method navigates to another node in the query tree in consideration of the branching criteria received in the user response and a comparison between the keywords received in the user response and the keywords associated with the query nodes. The comparison may validate navigation to a destination node corresponding to the branching criteria or the comparison may indicate incorrect navigation of the query tree. Corrective navigation can be implemented in various ways based upon the keywords received in the user response.

Abstract: System, computer implemented method and computer program product for preparing and navigating a query tree including a plurality of query nodes and informational nodes. Each query node is associated with a prompt, branching criteria and keywords. A current query node provides a prompt to a user and a user response is received and analyzed to identify branching criteria and keywords from the user response. The method navigates to another node in the query tree in consideration of the branching criteria received in the user response and a comparison between the keywords received in the user response and the keywords associated with the query nodes. The comparison may validate navigation to a destination node corresponding to the branching criteria or the comparison may indicate incorrect navigation of the query tree. Corrective navigation can be implemented in various ways based upon the keywords received in the user response.

Abstract: Method and computer program product for using an RFID antenna of a cooking appliance to read a plurality of cooking instruction sets from a single RFID tag associated with a food product that is positioned to be cooked by the cooking appliance. The cooking appliance selects one of the plurality of cooking instruction sets that the cooking appliance is capable of performing. Furthermore, the cooking appliance may then automatically cook the food product by controlling the cooking appliance according to the selected cooking instruction set. The selection of a cooking instruction set may consider the temperature of the food product or a determination whether the food product is frozen. Alternatively, cooking appliance settings may be interpolated between two cooking instruction sets or calculated on the basis of physical property information about the food product.

Abstract: Mapping computers and ports of power distribution units in a data center, the data center including a plurality of computers and a data center management server, each computer in the data center connected for power to one of a plurality of power distribution unit (‘PDU’) ports of a PDU, each PDU connected through the communications module and a data communications network to the data center management server, including generating, by a power modulating module of a computer, a power consumption signal in the PDU, the power consumption signal encoding a unique identification of the computer; demodulating, by the PDU, the power consumption signal, including retrieving from the signal the unique identification of the computer; and reporting, by the PDU to the data center management server, an association of the unique identification of the computer and a PDU port.

Abstract: An IT chassis, configured to house IT componentry, includes a forward portion having a forward portion width and a rearward portion having a rearward portion width that is narrower than the forward portion width. A first side of the rearward portion is configured to engage a first slide assembly having a first slide width. A second side of the rearward portion is configured to engage a second slide assembly having a second slide width. The sum of the rearward portion width, the first slide width and the second slide width is substantially equal to the forward portion width.

Abstract: A DIMM riser card that includes a PCB having a first edge, a second edge, and one or more faces. The first edge of the PCB is configured for insertion into a main board DIMM socket. The first edge includes electrical traces that electrically couple to a memory bus. The DIMM riser card includes an angled DIMM socket mounted on one face of the PCB, where the angled DIMM socket is configured to accept a DIMM at an angle not perpendicular to the PCB and electrically couple the DIMM to the memory bus. The DIMM riser card includes a straddle mount DIMM socket mounted on the second edge of the PCB. The straddle mount DIMM socket is configured to accept a DIMM and electrically couple the DIMM to the memory bus through the electrical traces on the first edge of the PCB.

Abstract: Computer memory subsystems are disclosed for enhancing signal quality that include: one or more memory modules; a memory bus; and a memory controller connected to the memory modules through the memory bus, the memory controller including a reception buffer connected to the memory bus, the reception buffer capable of receiving an input signal from one of the memory modules, the memory controller including a reception characteristics table capable of storing reception characteristics for each of the memory modules connected to the memory controller, the memory controller including an equalizer connected to the reception buffer and the reception characteristics table, the equalizer capable of equalizing the received input signal in dependence upon the reception characteristics for the memory module from which the input signal was received, and the memory controller including memory controller logic connected to the equalizer, the memory controller logic capable of processing the equalized input signal.

Abstract: Methods, apparatus, and products are disclosed for implementing a redundant array of inexpensive drives (‘RAID’) with an external RAID controller and hard disk drives from separate computers, including configuring by the external RAID controller a RAID array, the RAID array comprising hard disk drives from the separate computers, the external RAID controller comprising a hardware RAID controller installed externally with respect to the separate computers, and storing, by one or more of the separate computers through the external RAID controller, computer data on the RAID array.

Abstract: A computer-implemented method, and computer program product, for switching the I/O protocol of a multiprotocol I/O adapter while a computer system including the multiprotocol I/O adapter is running. The method comprises running a multiprotocol I/O adapter using a first I/O protocol while a computer system including the multiprotocol I/O adapter is running, and logically removing the adapter from the system while the computer system continues running. The multiprotocol I/O adapter is then caused to switch to a second I/O protocol while the adapter is logically removed and the computer system continues running. While the computer system still continues to run, the multiprotocol I/O adapter is restarted. After restarting, the multiprotocol I/O adapter runs using the second I/O protocol while the computer system continues running. In a virtualization environment, the method allows a multiprotocol I/O adapter to meet the varying I/O requirements of one or more virtual machines.

Abstract: In a memory system, a spare error correction bit is produced by processing data to be stored in sufficiently large chunks that the number of error correction bits required to protect each chunk are fewer than the available error correction signal lines on a memory bus and storage device. The spare bit is then used for an inversion bit in a parallel data bus inversion scheme, wherein data is selectively inverted to minimize bus switching. The transmission of data and error correction bits are spread over multiple phases, wherein parallel data bus inversion is applied to each phase. Alternatively, the transmission of data and error correction bits may be transmitted and stored in a single transaction. In either case, the spare bit is transmitted on a conventional memory bus and stored in a conventional memory module along with data and error correction bits.

Abstract: A method and circuit for implementing an enhanced availability personality card for a chassis computer system, and a design structure on which the subject circuit resides are provided. The personality card includes a first erasable programmable read only memory (EPROM) and a second EPROM, each EPROM storing Vital Product Data (VPD) and a first temperature sensor and a second temperature sensor sensing temperature. A primary bidirectional bus and a redundant bidirectional bus are respectively connected between the first EPROM and the first temperature sensor and the second EPROM and the second temperature sensor, and a pair of chassis management modules. Each chassis management module includes a switch connected to both the primary bidirectional bus and the redundant bidirectional bus providing redundant paths, enabling continued function with failure of any critical personality card component.

Abstract: Methods, apparatus, and products are disclosed for optimizing a physical data communications topology between a plurality of computing nodes, the physical data communications topology including physical links configured to connect the plurality of nodes for data communications, that include carrying out repeatedly at a predetermined pace: detecting network packets transmitted through the links between each pair of nodes in the physical data communications topology, each network packet characterized by one or more packet attributes; assigning, to each network packet, a packet weight in dependence upon the packet attributes for that network packet; determining, for each pair of nodes in the physical data communications topology, a node pair traffic weight in dependence upon the packet weights assigned to the network packets transferred between that pair of nodes; and reconfiguring the physical links between each pair of nodes in dependence upon the node pair traffic weights.

Abstract: Methods, apparatus, and computer program products are described for resetting a HyperTransport link in a blade server, including reassigning, by a blade management module, a gate signal from enabling a transceiver to signaling a HyperTransport link reset; sending, by the blade management module to a reset sync module on an out-of-band bus, the gate signal; and in response to the gate signal, sending, by the reset sync module to the blade processor, HyperTransport reset signals. The HyperTransport link includes a bidirectional, serial/parallel, high-bandwidth, low-latency, point to point data communications link. The blade server includes the blade processor, the reset sync module, and the baseboard management controller. The blade server is installed in the blade center. The blade center includes the blade management module. The blade management module is coupled to the baseboard management controller by the blade communication bus.

Abstract: A system has an optical scanner for reading a printed system configuration code on a printed configuration label. The printed system configuration code includes configuration information that describes a bus speed of a system bus of the system. A processor dynamically configures the system according to the configuration information decoded from the printed system configuration code.

Abstract: A computer-implemented method, and computer program product, for switching the I/O protocol of a multiprotocol I/O adapter while a computer system including the multiprotocol I/O adapter is running. The method comprises running a multiprotocol I/O adapter using a first I/O protocol while a computer system including the multiprotocol I/O adapter is running, and logically removing the adapter from the system while the computer system continues running. The multiprotocol I/O adapter is then caused to switch to a second I/O protocol while the adapter is logically removed and the computer system continues running. While the computer system still continues to run, the multiprotocol I/O adapter is restarted. After restarting, the multiprotocol I/O adapter runs using the second I/O protocol while the computer system continues running. In a virtualization environment, the method allows a multiprotocol I/O adapter to meet the varying I/O requirements of one or more virtual machines.

Abstract: A nameplate for power capping a computer including a mounting surface; a module integrated in the mounting surface for providing a machine-readable designation of a power cap for a particular computer; a human readable designation of a power cap for the particular computer integrated in the mounting surface; and a mount for attaching the mounting surface to a chassis of the particular computer such that the human readable designation of a power cap is exposed.

Abstract: A method and circuit for implementing an enhanced availability personality card for a chassis computer system, and a design structure on which the subject circuit resides are provided. The personality card includes a first erasable programmable read only memory (EPROM) and a second EPROM, each EPROM storing Vital Product Data (VPD) and a first temperature sensor and a second temperature sensor sensing temperature. A primary bidirectional bus and a redundant bidirectional bus are respectively connected between the first EPROM and the first temperature sensor and the second EPROM and the second temperature sensor, and a pair of chassis management modules. Each chassis management module includes a switch connected to both the primary bidirectional bus and the redundant bidirectional bus providing redundant paths, enabling continued function with failure of any critical personality card component.

Abstract: A method and computer program product for controlling energy utilization includes receiving user activities from each of a plurality of users into one or more software application, associating each user activity with a defined workspace having one or more remotely controllable electronic devices, and controlling energy utilization of the one or more electronic devices within each defined workspace according to the user activities associated with the defined workspace. Energy utilization is reduced in a defined workspace during a time period that there is no user activity associated with the workspace. Optionally, the step of receiving user activities may include detecting that a user has logged onto a remote computer that is not located within the defined workspace, or users inputting activities into a software application, such as one or more instances of an electronic calendar.