Abstract: A DIMM riser card that includes a PCB having a first edge, a second edge, and one or more faces. The first edge of the PCB is configured for insertion into a main board DIMM socket. The first edge includes electrical traces that electrically couple to a memory bus. The DIMM riser card includes an angled DIMM socket mounted on one face of the PCB, where the angled DIMM socket is configured to accept a DIMM at an angle not perpendicular to the PCB and electrically couple the DIMM to the memory bus. The DIMM riser card includes a straddle mount DIMM socket mounted on the second edge of the PCB. The straddle mount DIMM socket is configured to accept a DIMM and electrically couple the DIMM to the memory bus through the electrical traces on the first edge of the PCB.

Abstract: An integrated circuit (IC) that includes a semiconductor die in an IC package. The semiconductor die includes an electrical endpoint. The IC also includes a pad affixed to the semiconductor die. The pad is characterized by a capacitance and is coupled to the electrical endpoint. The IC also includes a bond wire coupling the pad to an IC package pin. The bond wire is an inductor characterized by an inductance. The inductance is configured to decrease signal degradation caused by the capacitance of the pad on electrical signals transmitted between the pin and the electrical endpoint of the semiconductor die.

Abstract: Methods, apparatus, and products for detecting an increase in thermal resistance of a heat sink in a computer system, the heat sink dissipating heat for a component of the computer system, the computer system including a fan controlling airflow across the heat sink, the computer system also including a temperature monitoring device, including: measuring, by a monitoring module through use of the temperature monitoring device during operation of the computer system, thermal resistance of the heat sink; determining whether the measured thermal resistance of the heat sink is greater than a threshold thermal resistance, the threshold thermal resistance stored in a thermal profile in non-volatile memory, and if the measured thermal resistance of the heat sink is greater than the threshold thermal resistance, notifying a system administrator.

Abstract: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a memory switching data processing system is provided. The memory switching data processing system includes one or more central processing units (‘CPUs’); random access memory organized in at least two banks of memory modules; one or more memory buses providing communications paths for data among the CPUs and the memory modules; and a flexibly configurable memory bus switch comprising a first configuration adapting the first CPU to a first bank of memory modules and a second CPU to a second bank of memory modules and a second configuration adapting the first CPU to both the first bank of memory modules and the second bank of memory modules.

Abstract: A memory switching data processing system including one or more central processing units (‘CPUs’); random access memory organized in at least two banks of memory modules; one or more memory buses providing communications paths for data among the CPUs and the memory modules; and a flexibly configurable memory bus switch comprising a first configuration adapting the first CPU to a first bank of memory modules and a second CPU to a second bank of memory modules and a second configuration adapting the first CPU to both the first bank of memory modules and the second bank of memory modules.

Abstract: A nameplate for power capping a computer including a mounting surface; a module integrated in the mounting surface for providing a machine-readable designation of a power cap for a particular computer; a human readable designation of a power cap for the particular computer integrated in the mounting surface; and a mount for attaching the mounting surface to a chassis of the particular computer such that the human readable designation of a power cap is exposed.

Abstract: Tuning a switching power supply, the power supply including a switching transistor; a filter circuit; a pulse generator that drives the switching transistor; a programmable filter connected to the output of the filter circuit; a digital signal processor (‘DSP’) connected to the output of the filter circuit, the DSP configured to program the programmable filter; and a tuning control circuit connected to the output of the filter circuit, to the pulse generator, and to the DSP; including calculating by the DSP, from sampled voltage values of a tuning pulse driven through the filter circuit by the pulse generator, the actual impedance of the filter circuit; and programming, by the DSP, the programmable filter, setting the combined impedance of the filter circuit and the programmable filter to the design impedance of the filter circuit.

Abstract: Power in a computer system is managed by selectively authorizing requests by devices to operate at an elevated power state. One embodiment provides a computer system having a plurality of hardware devices interchangeably operable at mutually exclusive elevated and lower power states. The lower power states may be selected by default, and the devices independently request to operate at the elevated power state for a specified duration. A power management device, such as a baseboard management controller (BMC) or a chassis management module is configured for receiving and selectively authorizing the requests from the devices to operate at the elevated power state. The power management device subsequently revokes the authorization of the devices to operate at the elevated power state to enforce a system power limit.

Abstract: System, computer implemented method and computer program product for preparing and navigating a query tree including a plurality of query nodes and informational nodes. Each query node is associated with a prompt, branching criteria and keywords. A current query node provides a prompt to a user and a user response is received and analyzed to identify branching criteria and keywords from the user response. The method navigates to another node in the query tree in consideration of the branching criteria received in the user response and a comparison between the keywords received in the user response and the keywords associated with the query nodes. The comparison may validate navigation to a destination node corresponding to the branching criteria or the comparison may indicate incorrect navigation of the query tree. Corrective navigation can be implemented in various ways based upon the keywords received in the user response.

Abstract: Navigating a plurality of instantiated virtual desktops including maintaining a z-axis order of a plurality of currently instantiated virtual desktops; receiving a user's invocation of one or more mouse buttons; identifying the received invocation of the one or more mouse buttons as a user instruction to change the virtual desktop currently given focus; selecting, in dependence upon the user instruction, one of the plurality of virtual desktops to give focus; reordering the virtual desktops in the z-axis such that the selected virtual desktop is highest in the z-axis order; giving focus to the selected virtual desktop; and displaying the selected virtual desktop as highest in the z-axis order.

Abstract: Method and computer program product for using an RFID antenna of a cooking appliance to read a plurality of cooking instruction sets from a single RFID tag associated with a food product that is positioned to be cooked by the cooking appliance. The cooking appliance selects one of the plurality of cooking instruction sets that the cooking appliance is capable of performing. Furthermore, the cooking appliance may then automatically cook the food product by controlling the cooking appliance according to the selected cooking instruction set. The selection of a cooking instruction set may consider the temperature of the food product or a determination whether the food product is frozen. Alternatively, cooking appliance settings may be interpolated between two cooking instruction sets or calculated on the basis of physical property information about the food product.

Abstract: A printed circuit board (‘PCB’) with a capacitor integrated within a via of the PCB, the PCB including layers of laminate; a via that includes a via hole traversing layers of the PCB, the via hole characterized by a generally tubular inner surface; a capacitor integrated within the via, the capacitor including two capacitor plates, an inner plate and an outer plate, the two plates composed of electrically conductive material disposed upon the inner surface of the via hole, both plates traversing layers of the laminate, the inner plate traversing more layers of the laminate than are traversed by the outer plate; and a layer of dielectric material disposed between the two plates.

Abstract: Methods and apparatus for workload balancing among power switching components in a multiphase switching power supply, the power supply including one set of power switching components for each switching phase, where workload balancing includes: dropping one or more switching phases when output current demand on the power supply drops below a predetermined threshold, leaving at least one active switching phase; and rotating the at least one active switching phase among all sets of power switching components.

Abstract: Tuning a switching power supply, the power supply including a switching transistor; a filter circuit; a pulse generator that drives the switching transistor; a programmable filter connected to the output of the filter circuit; a digital signal processor (‘DSP’) connected to the output of the filter circuit, the DSP configured to program the programmable filter; and a tuning control circuit connected to the output of the filter circuit, to the pulse generator, and to the DSP; including calculating by the DSP, from sampled voltage values of a tuning pulse driven through the filter circuit by the pulse generator, the actual impedance of the filter circuit; and programming, by the DSP, the programmable filter, setting the combined impedance of the filter circuit and the programmable filter to the design impedance of the filter circuit.

Abstract: Data communications among electronic devices within a computer, including transmitting, from a transmitting device to a first translation device, data communications encoded according to an unreliable wireline data communications protocol; translating, by the first translation device, the data communications from the encoding of the unreliable wireline data communications protocol to an encoding of a reliable wireless data communications protocol; transmitting, by the first translation device to a second translation device, the data communications according to the reliable wireless data communications protocol; translating, by the second translation device, the data communications from the encoding of the reliable wireless data communications protocol to the encoding of the unreliable wireline data communications protocol; and transmitting, by the second translation device to a receiving device, the data communications according to the unreliable wireline data communications protocol.

Abstract: Methods, systems and computer program products for packet prioritization based on delivery time expectation. Exemplary embodiments include receiving a packet for routing, estimating a TimeToDestination for the packet, the estimating performed by a Internet Control Message Protocol, reading a TimeToDeliver field from each the Internet Protocol Header of the packet to extract data on when the packet needs to be at the destination, determining a MaxQueueDelay for the packet, the MaxQueueDelay calculated by subtracting the TimeToDeliver from the TimeToDestination, passing a lower priority packet if the lower priority packet has a lower MaxQueueDelay, and decrementing the TimeToDeliver by an amount of time the network router has had the packet in the queue before passing the packet to a next router, thereby communicating to the next router how much time is left before the packet must be delivered.

Abstract: Embodiments of the invention provide a novel and non-obvious method, system and computer program product for securing of leased resources on a computer. In one embodiment of the invention, a computer for securing resources may comprise at least one processor, a plurality of resources, wherein each resource is associated with configuration data and a programmable logic device connected to each of the plurality of resources. The programmable logic device may be configured for determining whether a resource is leased, reading un-encoded configuration data from a resource, and sending the configuration data to a first unit, if the resource is not leased. The programmable logic device may further be configured for reading encoded configuration data from a resource, decoding the configuration data, sending the configuration data that was decoded to a first unit, and logging use of the resource by the first unit, if the resource is leased.

Abstract: A scalability card for use with a plurality of computer blades. The computer blades are releasably securable in a parallel configuration, wherein each blade includes a circuit board and a processor operatively coupled to the circuit board. Each processor is in electronic communication with a scalability connector on a floating plate that is loosely secured to the computer blade. Furthermore, each scalability connector is preferably disposed in a common plane extending perpendicular to the plurality of parallel computer blades. The scalability card includes a plurality of electronically interconnected scalability connectors arranged for rough alignment with the scalability connectors of each computer blade. In addition, the scalability card preferably includes at least one alignment feature for engaging each floating plate and, therefore, providing fine alignment of the scalability connector on each floating plate to one of the scalability connectors of the scalability card.

Abstract: A method and computer program product for controlling energy utilization includes receiving user activities from each of a plurality of users into one or more software application, associating each user activity with a defined workspace having one or more remotely controllable electronic devices, and controlling energy utilization of the one or more electronic devices within each defined workspace according to the user activities associated with the defined workspace. Energy utilization is reduced in a defined workspace during a time period that there is no user activity associated with the workspace. Optionally, the step of receiving user activities may include detecting that a user has logged onto a remote computer that is not located within the defined workspace, or users inputting activities into a software application, such as one or more instances of an electronic calendar.

Abstract: Methods, systems and computer program products for packet prioritization based on delivery time expectation. Exemplary embodiments include receiving a packet for routing, estimating a TimeToDestination for the packet, the estimating performed by a Internet Control Message Protocol, reading a TimeToDeliver field from each the Internet Protocol Header of the packet to extract data on when the packet needs to be at the destination, determining a MaxQueueDelay for the packet, the MaxQueueDelay calculated by subtracting the TimeToDeliver from the TimeToDestination, passing a lower priority packet if the lower priority packet has a lower MaxQueueDelay, and decrementing the TimeToDeliver by an amount of time the network router has had the packet in the queue before passing the packet to a next router, thereby communicating to the next router how much time is left before the packet must be delivered.