Abstract: The present invention relates to specific binding members, particularly antibodies and fragments thereof, which bind to amplified epidermal growth factor receptor (EGFR) and to the de2-7 EGFR truncation of the EGFR. In particular, the epitope recognized by the specific binding members, particularly antibodies and fragments thereof, is enhanced or evident upon aberrant post-translational modification. These specific binding members are useful in the diagnosis and treatment of cancer. The binding members of the present invention may also be used in therapy in combination with chemotherapeutics or anti-cancer agents and/or with other antibodies or fragments thereof.

Abstract: The present disclosure provides systems and methods for an adaptive cruise control that controls a speed of a host vehicle as a passing vehicle quickly passes through a trajectory of the host vehicle. In one form, a system includes at least one processor that is configured to determine that a passing vehicle is entering a trajectory in which the host vehicle is travelling based on a longitudinal speed, a longitudinal acceleration, a lateral speed, and a lateral acceleration of the passing vehicle; determine to maintain a follow distance of an adaptive cruise control system of the host vehicle to at least one target vehicle in the trajectory in which the host vehicle is traveling prior to the passing vehicle entering the trajectory; and to maintain the follow distance to the at least one target vehicle while the passing vehicle passes through the trajectory in which the host vehicle is traveling.

Abstract: An illustrative method for performing a risk scenario assessment and remediation may include identifying, based on posture data associated with a compute environment, one or more compute resources deployed in the compute environment that are configured to be connected to a network, accessing runtime workload data associated with the one or more compute resources representative of network activity for the one or more compute resources, and performing, based on the posture data and the runtime workload data, a remediation operation associated with the one or more compute resources.

Abstract: A method and system for controlling configuration of a relay, where the relay has a coverage footprint and provides service on a first air interface having a frequency bandwidth, and where the relay is served by a donor access node over a second air interface on which the donor access node provides service. Per the disclosure, an entity detects that load on the second air interface on which the donor access node provides service is threshold high, and in response to at least that detecting, the relay is made to reduce the coverage footprint of the relay and/or to reduce the frequency bandwidth of the first air interface on which the relay provides service.

Abstract: A computer-implemented method for analyzing geophysical data is disclosed. Interpretation of geophysical data, such as seismic data, can be performed in multiple stages, such as at an information extraction stage and an information analysis stage. Typically, the information analysis stage is performed by geologists or interpreters, which may be laborious and inconsistent. The disclosed method includes using an information extractor that extracts information indicative of geo-features in a subsurface and an inference engine that analyzes the information indicative of geo-features in a subsurface to generate an output, with the information extractor and the inference engine being integrated and acting in combination. For example, the information extractor may generate summaries of the geo-features or answers to questions.

Abstract: A method and apparatus for performing geological reasoning, A method includes: obtaining subsurface data for a subsurface region; obtaining a knowledge model; extracting a structured representation from the subsurface data using the knowledge model; and performing geological reasoning with a graph network based on the knowledge model and the structured representation. A method includes performing geological reasoning with a knowledge model that includes a set of geoscience rules or a geoscience ontology. A method includes performing geological reasoning with a structured representation that includes a graph. A method includes performing geological reasoning by one or more of the following: question answering; decision making; assigning ranking; and assessing probability.

Abstract: A method and apparatus for utilizing a structured representation of a subsurface region. A method includes obtaining subsurface data for the subsurface region; and extracting the structured representation from the seismic data by: identifying geologic and fluid objects in the seismic images, wherein each object corresponds to a node of the structured representation; and identifying relationships among the identified geologic and fluid objects, wherein each relationship corresponds to an edge of the structured representation. A method further includes determining object attributes, edge attributes, and/or global attributes from the subsurface data. A method further includes inferring information from the structured representation.

Abstract: Disclosed are novel pharmaceutical formulation containing 3?-[(2Z)-[1-(3,4-dimethylphenyl)-1,5-dihydro-3-methyl-5-oxo-4H-pyrazol-4-ylidene]hydrazino]-2?-hydroxy-[1,1?-biphenyl]-3-carboxylic acid or a pharmaceutically acceptable salt thereof and processes for preparing the same.

Abstract: A processor architecture utilizing a L3 translation lookaside buffer (TLB) to reduce page walks. The processor includes multiple cores, where each core includes a L1 TLB and a L2 TLB. The processor further includes a L3 TLB that is shared across the processor cores, where the L3 TLB is implemented in off-chip or die-stack dynamic random-access memory. Furthermore, the processor includes a page table connected to the L3 TLB, where the page table stores a mapping between virtual addresses and physical addresses. In such an architecture, by having the L3 TLB with a very large capacity, performance may be improved, such as execution time, by eliminating page walks, which requires multiple data accesses.

Abstract: A processor architecture which partitions on-chip data caches to efficiently cache translation entries alongside data which reduces conflicts between virtual to physical address translation and data accesses. The architecture includes processor cores that include a first level translation lookaside buffer (TLB) and a second level TLB located either internally within each processor core or shared across the processor cores. Furthermore, the architecture includes a second level data cache (e.g., located either internally within each processor core or shared across the processor cores) partitioned to store both data and translation entries. Furthermore, the architecture includes a third level data cache connected to the processor cores, where the third level data cache is partitioned to store both data and translation entries. The third level data cache is shared across the processor cores. The processor architecture can also include a data stack distance profiler and a translation stack distance profiler.

Abstract: A processor architecture which partitions the on-chip data caches to efficiently cache translation entries alongside data which reduces the conflicts between virtual to physical address translation and data accesses. The architecture includes processor cores that include a first level translation lookaside buffer (TLB) and a second level TLB located either internally within each processor core or shared across the processor cores. Furthermore, the architecture includes a second level data cache (e.g., located either internally within each processor core or shared across the processor cores) partitioned to store both data and translation entries. Furthermore, the architecture includes a third level data cache connected to the processor cores, where the third level data cache is partitioned to store both data and translation entries. The third level data cache is shared across the processor cores.

Abstract: An apparatus and method of arranging boxes containing components for transport (shipping units).

Abstract: A processor architecture utilizing a L3 translation lookaside buffer (TLB) to reduce page walks. The processor includes multiple cores, where each core includes a L1 TLB and a L2 TLB. The processor further includes a L3 TLB that is shared across the processor cores, where the L3 TLB is implemented in off-chip or die-stack dynamic random-access memory. Furthermore, the processor includes a page table connected to the L3 TLB, where the page table stores a mapping between virtual addresses and physical addresses. In such an architecture, by having the L3 TLB with a very large capacity, performance may be improved, such as execution time, by eliminating page walks, which requires multiple data accesses.

Abstract: A set of user-configurable access control toggles is provided to a non-administrator user. The set of user-configurable access control toggles indicates access authorization to a set of data for a set of assets. A prevention selection with respect to a first subset of the set of user-configurable access control toggles is received from the non-administrator user. The prevention selection indicates to prevent access to a first subset of the set of data for a first subset of the set of assets. A first access request to the first subset of the set of data is received from the first subset of the set of assets. Based on the prevention selection with respect to the first subset of the set of user-configurable access control toggles, performance of the first access request to the first subset of the set of data by the first subset of the set of assets is prevented.

Abstract: Methods and systems for manufacturing a wavefront-guided scleral lens prosthetic device customized for an eye of a patient include obtaining a first scleral lens prosthetic device with a central optic zone configured to vault over the eye's cornea and a peripheral haptic zone configured to align with the eye's sclera, collecting measurements of any offset and/or rotation of the first scleral lens prosthetic device relative to the eye's pupil and of any aberrations, particularly higher-order aberrations, generating a wavefront-guided profile from the measurements, and fabricating a second scleral lens prosthetic device with the profile on a surface of a central optic zone configured to vault over the eye's cornea and a peripheral haptic zone customized to align with the eye's sclera.

Abstract: A method and apparatus for moving loose-piece articles positioned on a slipsheet. A vacuum head is moved into proximity with the loose-piece articles positioned on a slipsheet. A vacuum is created which causes the slipsheet, and the loose-piece articles positioned thereon, to be drawn toward a surface of the vacuum head and maintained in such position as the vacuum head transports the slipsheet and the loose-piece articles positioned thereon.

Abstract: A method of making a flexible, foldable, stretchable electronic device. The method includes deposition of a polymer layer, such as parylene C, to impart flexibility to the device. The device overcomes the limitations of related flexible electronics schemes by employing established silicon-on-insulator complementary metal-oxide-semiconductor technology with a flexible enclosure. Devices made in such a way may be used in a wide variety of applications including incorporation into medical devices.

Abstract: Provided are a method and apparatus for increasing task-execution speed, and, more particularly, a method and apparatus for increasing task-execution speed by compiling code to bytecodes, and executing native code in units of blocks instead of bytecodes, in which a block is a group of a series of bytecodes. The apparatus includes a receiving unit which receives a bytecode, a control unit which identifies whether the received bytecode is the last bytecode of a block, and a transmitting unit which transmits an address of a first native code of one or more native codes that correspond to one or more bytecodes included in the block based on the identification result.

Abstract: A system providing a real-time probabilistic prediction mechanism is described herein that is adapted to the address probabilistic implementations. The described mechanism provides a better balance between the tradeoffs of accuracy versus computational resources than the prior art, which makes it suitable for real-time applications, and in some cases offers a simpler path to implementation as well. In one exemplary approach, the real-time probabilistic prediction mechanism is implemented as a system for real-time resource management.

Abstract: A method of making a flexible, foldable, stretchable electronic device. The method includes deposition of a polymer layer, such as parylene C, to impart flexibility to the device. The device overcomes the limitations of related flexible electronics schemes by employing established silicon-on-insulator complementary metal-oxide-semiconductor technology with a flexible enclosure. Devices made in such a way may be used in a wide variety of applications including incorporation into medical devices.