Patents by Inventor Kai-Erik Elers

Kai-Erik Elers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020187256
    Abstract: The present invention relates generally to depositing elemental thin films. In particular, the invention concerns a method of growing elemental metal thin films by Atomic Layer Deposition (ALD) using a boron compound as a reducing agent. In a preferred embodiment the method comprises introducing vapor phase pulses of at least one metal source compound and at least one boron source compound into a reaction space that contains a substrate on which the metal thin film is to be deposited. Preferably the boron compound is capable of reducing the adsorbed portion of the metal source compound into its elemental electrical state.
    Type: Application
    Filed: July 30, 2002
    Publication date: December 12, 2002
    Inventors: Kai-Erik Elers, Ville Antero Saanila, Sari Johanna Kaipio, Pekka Juha Soininen
  • Patent number: 6482740
    Abstract: This invention relates to manufacturing of integrated circuits (ICs) and especially conductive layers suitable for use in an IC. According to the preferred method a metal oxide thin film is deposited on a substrate surface and reduced thereafter essentially into a metallic form with an organic reducing agent. The metal oxide is preferably deposited according to the principles of atomic layer deposition (ALD) using a metal source chemical and an oxygen source chemical. The reduction step is preferably carried out in an ALD reactor using one or more vaporized organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO and —COOH.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: November 19, 2002
    Assignee: ASM Microchemistry Oy
    Inventors: Pekka J. Soininen, Kai-Erik Elers, Suvi Haukka
  • Patent number: 6482262
    Abstract: The present invention relates generally to a method of depositing transition metal carbide thin films. In particular, the invention concerns a method of depositing transition metal carbide thin films by atomic layer deposition (ALD), in which a transition metal source compound and a carbon source compound are alternately provided to the substrate. A variety of metal and carbon source gases are disclosed. The methods are applicable to forming metal carbide thin films in semiconductor fabrication, and particularly to forming thin, conductive diffusion barriers within integrated circuits.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: November 19, 2002
    Assignee: ASM Microchemistry Oy
    Inventors: Kai-Erik Elers, Suvi P. Haukka, Ville Antero Saanila, Sari Johanna Kaipio, Pekka Juha Soininen
  • Patent number: 6475276
    Abstract: The present invention relates generally to depositing elemental thin films. In particular, the invention concerns a method of growing elemental metal thin films by Atomic Layer Deposition (ALD) using a boron compound as a reducing agent. In a preferred embodiment the method comprises introducing vapor phase pulses of at least one metal source compound and at least one boron source compound into a reaction space that contains a substrate on which the metal thin film is to be deposited. Preferably the boron compound is capable of reducing the adsorbed portion of the metal source compound into its elemental electrical state.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: November 5, 2002
    Assignee: ASM Microchemistry Oy
    Inventors: Kai-Erik Elers, Ville Antero Saanila, Sari Johanna Kaipio, Pekka Juha Soininen
  • Publication number: 20020155722
    Abstract: Methods are disclosed for selective deposition on desired materials. In particular, barrier materials are selectively formed on insulating surfaces, as compared to conductive surfaces. In the context of contact formation and trench fill, particularly damascene and dual damascene metallization, the method advantageously lines insulating surfaces with a barrier material. The selective formation allows the deposition to be “bottomless,” thus leaving the conductive material at a via bottom exposed for direct metal-to-metal contact when further conductive material is deposited into the opening after barrier formation on the insulating surfaces. Desirably, the selective deposition is accomplished by atomic layer deposition (ALD), resulting in highly conformal coverage of the insulating sidewalls in the opening.
    Type: Application
    Filed: April 15, 2002
    Publication date: October 24, 2002
    Inventors: Alessandra Satta, Karen Maex, Kai-Erik Elers, Ville Antero Saanila, Pekka Juha Soininen, Suvi P. Haukka
  • Publication number: 20020098685
    Abstract: The invention relates generally to improved silicon carbide deposition during dual damascene processing. In one aspect of the invention, copper oxide present on a substrate is reduced at least partially to copper prior to deposition of a silicon carbide or silicon oxycarbide layer thereon. In the preferred embodiment the reduction is accomplished by contacting the substrate with one or more organic reducing agents. The reduction process may be carried out in situ, in the same reaction chamber as subsequent processing steps. Alternatively, it may be carried out in a module of a cluster tool.
    Type: Application
    Filed: October 9, 2001
    Publication date: July 25, 2002
    Inventors: Auguste J.L. Sophie, Hessel Sprey, Pekka J. Soininen, Kai-Erik Elers
  • Publication number: 20020092584
    Abstract: The invention relates generally to the prevention of copper oxidation during copper anneal processes. In one aspect of the invention, copper oxidation is prevented by carrying out the anneal in the presence of one or more organic reducing agents.
    Type: Application
    Filed: November 13, 2001
    Publication date: July 18, 2002
    Inventors: Pekka J. Soininen, Kai-Erik Elers, Ernst H.A. Granneman
  • Patent number: 6391785
    Abstract: Methods are disclosed for selective deposition on desired materials. In particular, barrier materials are selectively formed on insulating surfaces, as compared to conductive surfaces. In the context of contact formation and trench fill, particularly damascene and dual damascene metallization, the method advantageously lines insulating surfaces with a barrier material. The selective formation allows the deposition to be “bottomless,” thus leaving the conductive material at a via bottom exposed for direct metal-to-metal contact when further conductive material is deposited into the opening after barrier formation on the insulating surfaces. Desirably, the selective deposition is accomplished by atomic layer deposition (ALD), resulting in highly conformal coverage of the insulating sidewalls in the opening.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: May 21, 2002
    Assignees: Interuniversitair Microelektronica Centrum (IMEC), ASM Microchemistry OY
    Inventors: Alessandra Satta, Karen Maex, Kai-Erik Elers, Ville Antero Saanila, Pekka Juha Soininen, Suvi P. Haukka
  • Publication number: 20020004293
    Abstract: This invention relates to manufacturing of integrated circuits (ICs) and especially conductive layers suitable for use in an IC. According to the preferred method a metal oxide thin film is deposited on a substrate surface and reduced thereafter essentially into a metallic form with an organic reducing agent. The metal oxide is preferably deposited according to the principles of atomic layer deposition (ALD) using a metal source chemical and an oxygen source chemical. The reduction step is preferably carried out in an ALD reactor using one or more vaporized organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO and —COOH.
    Type: Application
    Filed: May 15, 2001
    Publication date: January 10, 2002
    Inventors: Pekka J. Soininen, Kai-Erik Elers, Suvi Haukka
  • Publication number: 20010009695
    Abstract: A process for growing an electrically conductive metalloid thin film on a substrate with a chemical vapor deposition process. A metal source material and a reducing agent capable of reducing the metal source material to a reduced state are vaporized and fed into a reaction space, where the metal source material and the reducing agent are contacted with the substrate. The reducing agent is a boron compound having at least one boron-carbon bond, and the boron compound forms gaseous by-products when reacted with the metal source material. Generally, the boron compound is an alkylboron compound with 0-3 halogen groups attached to the boron. The metal source material and the reducing agent may be fed continuously or in pulses during the deposition process.
    Type: Application
    Filed: January 18, 2001
    Publication date: July 26, 2001
    Inventors: Ville Antero Saanila, Kai-Erik Elers, Sari Johanna Kaipio, Pekka Juha Soininen