Patents by Inventor Kai Han

Kai Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190317351
    Abstract: An optical device that is disposed to manage light transmittance therethrough includes a multi-layer photochromic sheet that is composed of a first layer, a second layer, and a photochromic layer interposed therebetween. The photochromic layer is composed of a mixture of dichroic dye and photo-isomerizable material that are disposed in a liquid crystal host, and the first and second layers are each fabricated from a clear polymer.
    Type: Application
    Filed: April 16, 2018
    Publication date: October 17, 2019
    Applicant: GM Global Technology Operations LLC
    Inventor: Kai-Han Chang
  • Patent number: 10427602
    Abstract: An optical system for a vehicle includes a rearview display configured to display an image of an area behind the vehicle and a positive optical device in optical communication with the rearview display. As such, the image displayed by the rearview display is projected to a virtual image plane that is spaced apart from the positive optical device by a predetermined virtual image distance in order to minimize an accommodation and a convergence of the vehicle operator's eyes when the vehicle operator's eyes switch focus between the rearview display and an object located outside and in front of the vehicle.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: October 1, 2019
    Assignee: GM Global Technology Operations LLC.
    Inventors: Gary P. Bertollini, Kai-Han Chang
  • Patent number: 10335668
    Abstract: An electric vehicle includes a carrier, a free-wheel unit, a foot-wheel unit, a driving unit, a first angle-detecting unit and a micro processing unit. The carrier is for supporting a user. The free-wheel unit is disposed at one end of the carrier. The foot-wheel unit is disposed at the other end of the carrier. The driving unit is disposed at the free-wheel unit or the foot-wheel unit, and is for providing a power to the electric vehicle. The first angle-detecting unit is disposed at the free-wheel unit or the carrier, and is for detecting a swinging status between the free-wheel unit and the carrier so as to provide a swinging signal. The micro processing unit is signally connected to the driving unit and the first angle-detecting unit. When the swinging signal achieves a predetermined condition determined by the micro processing unit, the driving unit is turned on.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: July 2, 2019
    Inventor: Kai-Han Cho
  • Patent number: 10267960
    Abstract: A cloaking device includes a prism and a light guide. The prism is attachable to an article and is configured for directing around the article a light ray reflected from an object that is blocked from view. The prism has an object surface and an article surface spaced opposite the object surface. The guide is disposed on solely the object surface and has a refraction surface at least partially spaced apart from the object surface. The guide is configured for directing the ray through the prism such that the object is not blocked from view. The refraction surface and the ray define a first angle therebetween of less than 90°. The guide is formed from a first transparent material having a first refractive index and the prism is formed from a second transparent material having a second refractive index that is greater than or equal to the first refractive index.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: April 23, 2019
    Assignee: GM Global Technology Operations LLC
    Inventor: Kai-Han Chang
  • Publication number: 20190031047
    Abstract: An electric vehicle includes a carrier, at least one wheel assembly, a driving module and a controlling module. The carrier is for carrying an user. The wheel assembly is disposed at the carrier and includes a wheel. The driving module includes a motor disposed at the wheel assembly. The driving module is for switching the motor and includes a sensing unit and a microprocessor. The sensing unit is electronically connected to the motor to detect at least one characteristic of the motor. The microprocessor is electronically connected to the motor. The microprocessor determines whether a predetermined conduction is satisfied according to the characteristic of the motor. When the predetermined conduction is satisfied, the motor is turned off by the microprocessor.
    Type: Application
    Filed: July 24, 2018
    Publication date: January 31, 2019
    Inventor: Kai-Han CHO
  • Publication number: 20180361226
    Abstract: An electric vehicle includes a carrier, a free-wheel unit, a foot-wheel unit, a driving unit, a first angle-detecting unit and a micro processing unit. The carrier is for supporting a user. The free-wheel unit is disposed at one end of the carrier. The foot-wheel unit is disposed at the other end of the carrier. The driving unit is disposed at the free-wheel unit or the foot-wheel unit, and is for providing a power to the electric vehicle. The first angle-detecting unit is disposed at the free-wheel unit or the carrier, and is for detecting a swinging status between the free-wheel unit and the carrier so as to provide a swinging signal. The micro processing unit is signally connected to the driving unit and the first angle-detecting unit. When the swinging signal achieves a predetermined condition determined by the micro processing unit, the driving unit is turned on.
    Type: Application
    Filed: June 18, 2018
    Publication date: December 20, 2018
    Inventor: Kai-Han CHO
  • Patent number: 10140140
    Abstract: In various embodiments, methods and systems for remotely customizing a virtual machine in a cloud computing infrastructure are provided. A VM agent component provided on a virtual machine, while in communication with a VM deployment service associated therewith, can be configured to detect an incoming configuration payload that corresponds to a selected one or more extension packages cataloged on a VM marketplace component in communication with the VM deployment service component. Employing the configuration payload, the VM agent component can initialize communication with the extension repository to retrieve the one or more extension packages for storage and installation onto the virtual machine. Upon installing the one or more extension packages, the VM agent component can be configured to communicate a status report to the VM deployment service component for provision to an administrator.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: November 27, 2018
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Aaron Edward Spinks, Wakkas Rafiq, Sarat Rallapalli, Ahmed Hassan Elsayed El Baz, Kundana Palagiri, Zhidong Peng, Marc V. Greisen, Kai Han
  • Patent number: 9940424
    Abstract: The present disclosure is directed to systems and methods for a minimum-implant-area (MIA) aware detailed placement. In embodiments, the present disclosure clusters a violation cell with the cells having a same threshold voltage (Vt) and determines an optimal region for a cluster to minimize the wire-length. In further embodiments, an MIA-aware cell flipping technique minimizes a design area while satisfying the MIA constraint.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: April 10, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yao-Wen Chang, Kai-Han Tseng
  • Publication number: 20170344686
    Abstract: The present disclosure is directed to systems and methods for a minimum-implant-area (MIA) aware detailed placement. In embodiments, the present disclosure clusters a violation cell with the cells having a same threshold voltage (Vt) and determines an optimal region for a cluster to minimize the wire-length. In further embodiments, an MIA-aware cell flipping technique minimizes a design area while satisfying the MIA constraint.
    Type: Application
    Filed: May 25, 2016
    Publication date: November 30, 2017
    Inventors: Yao-Wen CHANG, Kai-Han TSENG
  • Publication number: 20170172717
    Abstract: A dental carrier comprises a thermoplastic carrier. The thermoplastic carrier has a pattern structure. After heating the thermoplastic carrier, the thermoplastic carrier is provided with a user to be impressed by teeth or alveolar ridge for forming teeth or alveolar ridge model of the user. Compared to the prior art, the dental carrier of the present invention can provide the dental medicament contained in the pattern structure to be precisely applied and hold onto the treatment area and the medicament can be evenly coated on the teeth, root, or periodontal tissue for the treatment of teeth. When the dental carrier is not used to carry medicament, the pattern structure can improve the mechanical strength and fitness of the dental carrier to be used as a biteplate, orthodontic retainer, periodontal dressing for treatment or protection or mouth guard in sports.
    Type: Application
    Filed: December 20, 2016
    Publication date: June 22, 2017
    Inventors: WIN-PING DENG, HENG-YU LIU, HSIN-HUA CHOU, CHIN-YU TSAI, CHIUNG-FANG HUANG, CHUN-HSIANG WEN, PING-CHEN CHEN, CHING-SUNG CHEN, CHENG-HUSAN LIN, KAI-HAN LIAO
  • Publication number: 20170133516
    Abstract: The present disclosure relates to an array substrate, a method for manufacturing the array substrate and a display panel. The array substrate includes: a substrate; a poly-silicon thin film disposed on the substrate and including grains arranged along a first direction and a second direction, wherein grain boundaries of the grains extend along the first direction and the second direction; and a plurality of thin film transistors each including a channel formed by the poly-silicon thin film, wherein the channel includes a plurality of intersecting channel portions, each of which extends along a direction that neither perpendicular to nor parallel with the first or second direction.
    Type: Application
    Filed: September 23, 2016
    Publication date: May 11, 2017
    Applicant: EVERDISPLAY OPTRONICS (SHANGHAI) LIMITED
    Inventors: Dong REN, CHAHG-HAN CHIANG, CHENGCHE LEE, Kai HAN
  • Publication number: 20170003994
    Abstract: In various embodiments, methods and systems for remotely customizing a virtual machine in a cloud computing infrastructure are provided. A VM agent component provided on a virtual machine, while in communication with a VM deployment service associated therewith, can be configured to detect an incoming configuration payload that corresponds to a selected one or more extension packages cataloged on a VM marketplace component in communication with the VM deployment service component. Employing the configuration payload, the VM agent component can initialize communication with the extension repository to retrieve the one or more extension packages for storage and installation onto the virtual machine. Upon installing the one or more extension packages, the VM agent component can be configured to communicate a status report to the VM deployment service component for provision to an administrator.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 5, 2017
    Inventors: AARON EDWARD SPINKS, WAKKAS RAFIQ, SARAT RALLAPALLI, AHMED HASSAN ELSAYED EL BAZ, KUNDANA PALAGIRI, ZHIDONG PENG, MARC V. GREISEN, KAI HAN
  • Patent number: 9269758
    Abstract: The present disclosure involves a method. The method includes providing a substrate including a top surface. The method also includes forming a gate over the top surface of the substrate. The formed gate has a first height measured from the top surface of the substrate. The method also includes etching the gate to reduce the gate to a second height. This second height is substantially less than the first height. The present disclosure also involves a semiconductor device. The semiconductor device includes a substrate. The substrate includes a top surface. The semiconductor device also includes a first gate formed over the top surface of the substrate. The first gate has a first height. The semiconductor device also includes a second gate formed over the top surface of the substrate. The second gate has a second height. The first height is substantially less than the second height.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: February 23, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jing-Hwang Yang, Chun-Heng Liao, Hsin-Li Cheng, Liang-Kai Han
  • Patent number: 8921171
    Abstract: A method for forming a gate structure, comprising: providing a substrate, where the substrate includes a nMOSFET area and a pMOSFET area, each of the nMOSFET area and the pMOSFET area has a gate trench, and each of the gate trenches is provided at a bottom portion with a gate dielectric layer; forming a gate dielectric capping layer on the substrate; forming an etching stop layer on the gate dielectric capping layer; forming an oxygen scavenging element layer on the etching stop layer; forming a first work function adjustment layer on the oxygen scavenging element layer; etching the first work function adjustment layer above the nMOSFET area; forming a second work function adjustment layer on the surface of the substrate; metal layer depositing and annealing to fill the gate trenches with a metal layer; and removing the metal layer outside the gate trenches.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: December 30, 2014
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Hong Yang, Xueli Ma, Wenwu Wang, Kai Han, Xiaolei Wang, Huaxiang Yin, Jiang Yan
  • Patent number: 8802518
    Abstract: A semiconductor device and a method for manufacturing the same, the method comprising: providing a semiconductor substrate; forming a dummy gate area on the substrate, forming spacers on sidewalls of the gate area, and forming source and drain areas in the semiconductor substrate on both sides of the dummy gate area, the dummy gate area comprising an interface layer and a dummy gate electrode; forming a dielectric cap layer on the dummy gate area and source and drain areas; planarizing the device with the dielectric cap layer on the source and drain areas as a stop layer; further removing the dummy gate electrode to expose the interface layer; and forming replacement gate area on the interface layer. The thickness of the gate groove may be controlled by the thickness of the dielectric cap layer, and the replacement gates of desired thickness and width may be further formed upon requirements. Thus, the aspect ratio of the gate groove is reduced and a sufficient low gate resistance is ensured.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: August 12, 2014
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Wenwu Wang, Chao Zhao, Kai Han, Dapeng Chen
  • Patent number: 8633086
    Abstract: A method for forming a support structure for supporting and handling a semiconductor wafer containing vertical FETs formed at the front surface thereof is provided. In one embodiment, a semiconductor wafer is provided having a front surface and a rear surface, wherein the front surface comprises one or more dies separated by dicing lines. The wafer is thinned to a predetermined thickness. A plurality of patterned metal features are formed on a thinned rear surface to provide support for the wafer, wherein each of the plurality of patterned metal features covers substantially one die, leaving the dicing lines substantially uncovered. The wafer is thereafter diced along the dicing lines to separate the one or more dies for later chip packaging.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: January 21, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Alex Kalnitsky, Hsiao-Chin Tuan, Liang-Kai Han, Uway Tseng, Yuan-Chih Hsieh, Hung-Hua Lin
  • Patent number: 8633098
    Abstract: The present invention relates to the field of semiconductor manufacturing. The present invention provides a method of manufacturing a semiconductor device, which comprises: providing a semiconductor substrate; forming an interface layer, a gate dielectric layer and a gate electrode on the substrate; forming a metal oxygen absorption layer on the gate electrode; performing a thermal annealing process on the semiconductor device so that the metal oxygen absorption layer absorbs oxygen in the interface layer and the thickness of the interface layer is reduced. By means of the present invention, the thickness of the interface layer can be reduced on one hand, and on the other hand the metal in the metal oxygen absorption layer is made to diffuse into the gate electrode and/or the gate dielectric layer through the annealing process, which further achieves the effects of adjusting the effective work function and controlling the threshold voltage.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: January 21, 2014
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Kai Han, Wenwu Wang, Xiaolei Wang, Shijie Chen, Dapeng Chen
  • Publication number: 20140015062
    Abstract: An embodiment of the present disclosure provides a method for forming a gate structure, comprising: providing a substrate, where the substrate includes a nMOSFET area and a pMOSFET area, each of the nMOSFET area and the pMOSFET area has a gate trench, and each of the gate trenches is provided at a bottom portion with a gate dielectric layer; forming a gate dielectric capping layer on a surface of the substrate; forming an oxygen scavenging element layer on the gate dielectric capping layer; forming an etching stop layer on the oxygen scavenging element layer; forming a work function adjustment layer on the etching stop layer; performing metal layer deposition and annealing process to fill the gate trenches with a metal layer; and removing the metal layer outside the gate trenches.
    Type: Application
    Filed: July 24, 2012
    Publication date: January 16, 2014
    Inventors: Hong Yang, Xueli Ma, Wenwu Wang, Kai Han, Xiaolei Wang, Huaxiang Yin, Jiang Yan
  • Publication number: 20140015063
    Abstract: A method for forming a gate structure, comprising: providing a substrate, where the substrate includes a nMOSFET area and a pMOSFET area, each of the nMOSFET area and the pMOSFET area has a gate trench, and each of the gate trenches is provided at a bottom portion with a gate dielectric layer; forming a gate dielectric capping layer on the substrate; forming an etching stop layer on the gate dielectric capping layer; forming an oxygen scavenging element layer on the etching stop layer; forming a first work function adjustment layer on the oxygen scavenging element layer; etching the first work function adjustment layer above the nMOSFET area; forming a second work function adjustment layer on the surface of the substrate; metal layer depositing and annealing to fill the gate trenches with a metal layer; and removing the metal layer outside the gate trenches.
    Type: Application
    Filed: July 24, 2012
    Publication date: January 16, 2014
    Inventors: Hong Yang, Xueli Ma, Wenwu Wang, Kai Han, Xiaolei Wang, Huaxiang Yin, Jiang Yan
  • Patent number: 8624325
    Abstract: The present invention provides a semiconductor device, comprising: a semiconductor substrate having a first region and a second region; a first gate structure belong to a PMOS device on the first region; a second gate structure belong to an nMOS device on the second region; a multiple-layer first sidewall spacer on sidewalls of the first gate structure, wherein a layer of the multiple-layer first sidewall spacer adjacent to the first gat structure is an oxide layer; a multiple-layer second sidewall spacer on sidewalls of the second gate structure, wherein a layer of the multiple layers of second sidewall spacer adjacent to the first gat structure is a nitride layer. Application of the present invention may alleviate the oxygen vacancy in a high-k gate dielectric in a pMOS device, and further avoid the problem of EOT growth of an nMOS device during the high-temperature thermal treatment process, and therefore effectively improve the overall performance of the high-k gate dielectric CMOS device.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: January 7, 2014
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Wang Wenwu, Shijie Chen, Xiaolei Wang, Kai Han, Dapeng Chen