Patents by Inventor Kai Hsu

Kai Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190319545
    Abstract: A hub device and a power supply method thereof are provided. The hub device includes a power input port, first and second power output ports, a power management circuit and a controller. When first and second electronic devices are respectively connected to the first and second power output ports, the controller determines an input electric power from at least one default supply power of the power adapter based on first operating power information of the first electronic device and second operating power information of the second electronic device, so as to control the power adapter to provide the input electric power to the power input port. The power management circuit receives the input electric power to generate first and second operating power, so as to output the first operating power to the first power output port and output the second operating power to the second power output port.
    Type: Application
    Filed: June 26, 2018
    Publication date: October 17, 2019
    Applicant: Wistron Corporation
    Inventors: Sheng-Hung Wang, Wei-Chiao Huang, Pei-Kai Hsu, Yung-Yu Huang
  • Publication number: 20190312450
    Abstract: Disclosed are a non-narrow voltage direct current (NON-NVDC) charger and a control method thereof. In the present disclosure, a proper target voltage, related to a turn-on voltage of a switch circuit, is determined according to an output voltage of a load, a storage voltage of an energy storage device and a turn-on resistance value of the switch circuit. Then, according to the determined target voltage, the NON-NVDC charger can enter a supplement mode at an appropriate time. The NON-NVDC charger can be operated stably and has excellent operation efficiency even when a current flowing through a transformer close to a maximum safe current.
    Type: Application
    Filed: July 25, 2018
    Publication date: October 10, 2019
    Inventors: CHUN-KAI HSU, CHIH-HENG SU
  • Patent number: 10439177
    Abstract: A joining mechanism includes a main body and a positioning assembly. The positioning assembly includes a first positioning member, a second positioning member, a first resilient member and a second resilient member. The first and second positioning members are pivotally connected to the main body. When a first battery and a second battery are installed in the main body, the first and second batteries respectively push the first and second positioning members from a first initial position and a second initial position to a first release position and a second release position. When the first battery is removed, the second resilient member forces the second positioning member to rotate from the second release position to the second initial position and to join with the second battery.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: October 8, 2019
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chin-Wen Wang, Chih-Kai Hsu
  • Patent number: 10438553
    Abstract: A method of handling operation of a source driver of a display system used in a timing controller of a display system, which is coupled to the source driver via a data bus for delivering a plurality of line data, includes determining whether a first line data among the plurality of line data is identical to a second line data among the plurality of line data previous to the first line data; and transmitting a sleep command to the source driver when the first line data is determined to be identical to the second line data, wherein the sleep command instructs the source driver to enter a sleep mode; wherein the source driver stops receiving the plurality of line data from the timing controller when the source driver is in the sleep mode.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: October 8, 2019
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Cheng-Kai Kuei, Sheng-Wen Lai, Chin-Hung Hsu
  • Patent number: 10437417
    Abstract: A computer-implemented method for displaying a reception status of a beacon on an electronic map is provided. The electronic map is loaded and displayed. A location of the beacon located on the electronic map is determined to obtain a location data. A signal region corresponding to a signal intensity range of the beacon located on the electronic map is determined based on the location data. A line of sight (LOS) region and a non line of sight (NLOS) region of the beacon corresponding to an obstruction information on the electronic map are determined based on the location data. A cartographic drawing is executed and displayed on the electronic map based on the signal region, the LOS region and the NLOS region.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: October 8, 2019
    Assignee: Kinpo Electronics, Inc.
    Inventors: Tung-Yun Hsieh, Sheng-Chih Hsu, Chuan-Kai Lin, Yu-Lun Ting
  • Publication number: 20190305566
    Abstract: A charger having a fast transient response and a control method thereof are provided, which decide how to quickly respond to a requirement of a load by determining whether an input current reference signal indicating an input current is larger than or equal to a maximum safe current of a transformer. Therefore, the charger and the control method realize the fast transient response without having to control switching between a boost circuit and a buck circuit. Meanwhile, the charger and the control method thereof can be prevented from being damaged by an excessive input current and can stabilize an output voltage of the load more quickly.
    Type: Application
    Filed: July 30, 2018
    Publication date: October 3, 2019
    Inventors: CHUN-KAI HSU, CHIH-NING CHEN
  • Publication number: 20190304984
    Abstract: A semiconductor device includes a layer having a semiconductive material. The layer includes an outwardly-protruding fin structure. An isolation structure is disposed over the layer but not over the fin structure. A first spacer and a second spacer are each disposed over the isolation structure and on sidewalls of the fin structure. The first spacer is disposed on a first sidewall of the fin structure. The second spacer is disposed on a second sidewall of the fin structure opposite the first sidewall. The second spacer is substantially taller than the first spacer. An epi-layer is grown on the fin structure. The epi-layer protrudes laterally. A lateral protrusion of the epi-layer is asymmetrical with respect to the first side and the second side.
    Type: Application
    Filed: March 30, 2018
    Publication date: October 3, 2019
    Inventors: Chun Po Chang, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang, Wei-Yang Lee, Tzu-Hsiang Hsu
  • Patent number: 10431535
    Abstract: An electronic package and a method for fabricating the same are provided. The method includes forming an antenna structure in contact with one side of a circuit structure of a packaging substrate, and disposing an electronic component on the other side of the circuit structure. As such, the antenna structure is integrated with the packaging substrate, thereby reducing the thickness of the electronic package and improving the efficiency of the antenna structure.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: October 1, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Jui-Feng Chen, Chia-Cheng Hsu, Wen-Jung Tsai, Chia-Cheng Chen, Cheng Kai Chang
  • Publication number: 20190296124
    Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source/drain region, a source/drain contact structure, a first dielectric layer, a first spacer, and a first connection structure. The gate structure is disposed on the semiconductor substrate. The source/drain region is disposed in the semiconductor substrate and disposed at a side of the gate structure. The source/drain contact structure is disposed on the source/drain region. The first dielectric layer is disposed on the source/drain contact structure and the gate structure. The first spacer is disposed in a first contact hole penetrating the first dielectric layer on the source/drain contact structure. The first connection structure is disposed in the first contact hole. The first connection structure is surrounded by the first spacer in the first contact hole, and the first connection structure is connected with the source/drain contact structure.
    Type: Application
    Filed: April 11, 2018
    Publication date: September 26, 2019
    Inventors: Chih-Kai Hsu, Ssu-I Fu, Chun-Ya Chiu, Chin-Hung Chen, Chi-Ting Wu, Yu-Hsiang Lin
  • Patent number: 10421492
    Abstract: An assisted steering system with vibrational function for vehicles is applied to a steering system of a vehicle. The steering system has a first steering column and a second steering column, and the assisted steering system includes a speed-adjustable steering device and an electronic control unit. The speed-adjustable steering device is connected between the first steering column and the second steering column and has a motor. The electronic control unit is electrically connected to the motor, generates a vibration driving current when receiving a warning command, combines a steering driving current with the vibration driving current to generate a motor control current, and outputs the motor control current to the motor of the speed-adjustable steering device to excite windings of the motor with the vibration driving current in generation of a vibrational effect.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: September 24, 2019
    Assignee: Automotive Research & Testing Center
    Inventors: Jin-Yan Hsu, Tong-Kai Jhang, Chih-Jung Yeh
  • Publication number: 20190287708
    Abstract: The large-current inductor includes a first core member having a first winding piece, a second winding piece, a first indentation, and a second indentation; a second core member having a third winding piece, a fourth winding piece, a third indentation, and a fourth indentation; a third core member attached and joined to first lateral sides of the first and second core members; and a fourth core member attached and joined to second lateral sides of the first and second core members. A first coil member winds around the first and third winding pieces, and has its ends embedded into the first and third indentations. A second coil member winds around the second and fourth winding pieces, and has its ends embedded into the second and fourth indentations. The inductor enhances efficiency of energy storage by mutual inductance, and limits large current flow by leakage inductance.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 19, 2019
    Inventors: Hsiu-Fa Yeh, Pin-Yu Chen, Hang-Chun Lu, Ya-Wen Yang, Shih-Kai Huang, Chien-Chin Chang, Hung-Chih Liang, Yu-Ting Hsu
  • Publication number: 20190286784
    Abstract: A method (of generating a layout diagram of a wire routing arrangement in a multi-patterning context having multiple masks, the layout diagram being stored on a non-transitory computer-readable medium) includes: placing, relative to a given one of the masks, a given cut pattern at a first candidate location over a corresponding portion of a given conductive pattern in a metallization layer; determining whether the first candidate location results in at least one of a non-circular group or a cyclic group which violates a design rule; and temporarily preventing, if there is a violation, placement of the given cut pattern in the metallization layer at the first candidate location until a correction is made which avoids violating the design rule.
    Type: Application
    Filed: March 12, 2019
    Publication date: September 19, 2019
    Inventors: Fong-Yuan CHANG, Chin-Chou LIU, Hui-Zhong ZHUANG, Meng-Kai HSU, Pin-Dai SUE, Po-Hsiang HUANG, Yi-Kan CHENG, Chi-Yu LU, Jung-Chou TSAI
  • Patent number: 10415033
    Abstract: Disclosed herein is a phage-displayed single-chain variable fragment (scFv) library, which comprises a plurality of phage-displayed scFvs characterized in having a specific CS combination and a specific sequence in each CDR. The present scFv library is useful in efficiently producing different antibodies with binding affinity to different antigens. Accordingly, the present disclosure provides a potential means to generate different antigen-specific antibodies promptly in accordance with the need in experimental researches and/or clinical applications.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: September 17, 2019
    Assignee: Academia Sinica
    Inventors: An-Suei Yang, Jhih-Wei Jian, Hong-Sen Chen, Yi-Kai Chiu, Hung-Pin Peng, Chao-Ping Tung, Chung-Ming Yu, Wei-Ying Kuo, Hung-Ju Hsu
  • Patent number: 10412831
    Abstract: A circuit board and a layout structure are provided. The layout structure includes a plurality of chip carrying areas, a plurality of inner layer connection pads and a plurality of outer leading wires. The chip carrying areas respectively carry a plurality of chips. The outer leading wires are disposed between the inner layer connection pads and the chip carrying areas. The layout structure is disposed on at least one circuit board and connects to a plurality of wires of the at least one circuit board through the outer leading wires, and the outer leading wires and the wires of the at least one circuit board are formed by sharing at least one metal layer.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: September 10, 2019
    Assignee: Wistron Corporation
    Inventors: Chang-Chun Wang, Su-Kai Hsu
  • Patent number: 10412867
    Abstract: The present invention discloses an electromagnetic shielding assembly including an electromagnetic interference shielding component including a plate body and a bending portion. An included angle is formed between the plate body and the bending portion, and the plate body and the bending portion cover an input socket of a power supply. The electromagnetic interference shielding component includes at least one grounding pin disposed on the plate body or/and the bending portion and configured to ground with and screw to a housing of the power supply, and a welding pin disposed on a side of the bending portion away from the plate body and electrically connected to an auxiliary circuit board. The electromagnetic interference shielding component provides functions of EMI shielding, lightning (current) discharging and fixture, which can simplify the structure, increase the discharging speed and time, and reduce the amount of disturbance of the large current instantaneous to the ground.
    Type: Grant
    Filed: January 6, 2019
    Date of Patent: September 10, 2019
    Assignee: 3Y POWER TECHNOLOGY (TAIWAN), INC.
    Inventors: Shao-Feng Lu, Chuan-Kai Wang, Yi-Chen Kuan, Chung-Yu Lan, Jen-Ming Hsu, Chao-Wen Fu
  • Patent number: 10411331
    Abstract: The present disclosure provides a back cover assembly of a portable electronic device. The back cover assembly includes a substrate structure and a coil structure. The substrate structure includes a metal substrate and a first non-metal substrate connected with the metal substrate. The coil structure is matched with an IC chip for generating an antenna magnetic field that passes through the first non-metal substrate without matching with the metal substrate. The coil structure has a first coil portion and a second coil portion connected to the first coil portion, the first coil portion is disposed above the metal substrate, the second coil portion is disposed above the first non-metal substrate, and the percentage of the first coil portion to the coil structure is larger than that the percentage of the second coil portion to the coil structure.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: September 10, 2019
    Assignee: INPAQ TECHNOLOGY CO., LTD.
    Inventors: Po-Kai Hsu, Chih-Ming Su
  • Patent number: 10408697
    Abstract: Techniques for improving implementation of a downhole tool string to be deployed in a borehole formed in a sub-surface formation. In some embodiments, a design device determines a model that describes expected relationship between properties of the downhole tool string, the borehole, the sub-surface formation, and mud cake expected to be formed in the borehole; determines calibration locations along the borehole based on properties of the borehole; determines candidate spacer configurations based on contact force expected to occur at contact points between the downhole tool string and the mud cake when deployed with each of the candidate spacer configuration via the model; and determines a final spacer configuration to be used to attach one or more spacers along the downhole tool string based on expected head tension to move the downhole tool string when deployed in the borehole with each of the candidate spacer configurations via the model.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: September 10, 2019
    Assignee: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Kai Hsu, Scott C. Cook, Daniel Schulz, Gregory Au, Samuel P. Subbarao, Abhishek Agarwal, Ashers Partouche
  • Patent number: 10395991
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first gate structure and a second gate structure on a substrate and an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; transforming the first gate structure into a first metal gate and the second gate structure into a second metal gate; removing part of the ILD layer between the first metal gate and the second metal gate to form a recess; forming a first spacer and a second spacer in the a recess; performing a first etching process to form a first contact hole; and performing a second etching process to extend the first contact hole into a second contact hole.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: August 27, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-I Fu, Yu-Hsiang Hung, Chun-Ya Chiu, Chin-Hung Chen, Chi-Ting Wu, Yu-Hsiang Lin
  • Patent number: 10396196
    Abstract: A semiconductor device includes a substrate, a semiconductor layer, a doped region, a device region, a first isolation structure, a second isolation structure and a terminal. The semiconductor layer is disposed over the substrate. The doped region is disposed in the semiconductor layer. The device region is disposed on the doped region and includes a source, a drain and a gate. The first isolation structure is disposed in the semiconductor layer and surrounds the doped region. The second isolation structure surrounds the first isolation structure and is spaced apart from the first isolation structure. The terminal is disposed between the first isolation structure and the second isolation structure, and is equipotential with the source.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: August 27, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Jui-Chun Chang, Shih-Kai Wu, Cheng-Yu Wang, Li-Yang Hong, Chia-Ming Hsu
  • Patent number: 10394518
    Abstract: An audio synchronization method includes: receiving a first audio signal from a first recording device; receiving a second audio signal from a second recording device; performing a correlation operation upon the first audio signal and the second audio signal to align a first pattern of the first audio signal and the first pattern of the second audio signal; after the first patterns of the first audio signal and the second audio signal are aligned, calculating a difference between a second pattern of the first audio signal and the second pattern of the second audio signal; and obtaining a starting-time difference between the first audio signal and the second audio signal for audio synchronization according to the difference between the second pattern of the first audio signal and the second pattern of the second audio signal.
    Type: Grant
    Filed: March 5, 2017
    Date of Patent: August 27, 2019
    Assignee: MEDIATEK INC.
    Inventors: Xin-Wei Shih, Chia-Ying Li, Chao-Ling Hsu, Yiou-Wen Cheng, Shen-Kai Chang