Abstract: A magnetic random access memory (MRAM) includes device strings coupled in parallel, each comprising magnetic tunnel junctions (MTJs) coupled in serial, wherein a quantity of the MTJs of each of the device strings is equal to a quantity of the device strings, and an equivalent resistance (Req) of the MTJs is equal to an average of the sum of a high resistance of one of the MTJs and a low resistance of another MTJ.

Abstract: A semiconductor device includes: a dummy gate on a substrate; a first control gate on one side of the dummy gate and a second control gate on another side of the dummy gate; a well in the substrate, wherein the well comprises a first conductive type; a first source/drain region between the dummy gate and the first control gate, wherein the first source/drain region comprises a second conductive type; a second source/drain region between the dummy gate and the second control gate, wherein the second source/drain region comprises the second conductive type; and a doped region directly under the dummy gate, wherein the doped region comprises the first conductive type.

Abstract: A semiconductor device includes: a dummy gate on a substrate; a first control gate on one side of the dummy gate and a second control gate on another side of the dummy gate; a well in the substrate, wherein the well comprises a first conductive type; a first source/drain region between the dummy gate and the first control gate, wherein the first source/drain region comprises a second conductive type; a second source/drain region between the dummy gate and the second control gate, wherein the second source/drain region comprises the second conductive type; and a doped region directly under the dummy gate, wherein the doped region comprises the first conductive type.

Abstract: A method of forming a fin forced stack inverter includes the following steps. A substrate including a first fin, a second fin and a third fin across a first active area along a first direction is provided, wherein the first fin, the second fin and the third fin are arranged side by side. A fin remove inside active process is performed to remove at least a part of the second fin in the first active area. A first gate is formed across the first fin and the third fin in the first active area along a second direction. The present invention also provides a 1-1 fin forced fin stack inverter formed by said method.

Abstract: A pixel structure includes a substrate, a thin film transistor and a common electrode. The thin film transistor is disposed on the substrate, wherein a semiconductive active layer of the thin film transistor has a channel region disposed between a source and a drain, the channel region includes a main channel region and at least one sub channel region, a channel length of the main channel region is less than a channel length of the at least one sub channel region, and the channel length of the main channel region is equal to a minimum of a channel length of the channel region. The common electrode is disposed on the thin film transistor, and the common electrode overlaps at least a portion of the at least one sub channel region, wherein the common electrode has an opening exposing the main channel region.

Abstract: A method for processing data and an electronic apparatus are provided. The method includes: obtaining multimedia data captured by a multimedia capture of an electronic apparatus, obtaining first data captured by a data capture unit of the electronic apparatus, establishing an association relationship between the first data and the multimedia data in terms of time; and generating second data in the case that the process of capturing the multimedia data is completed, wherein the second data includes the association relationship.

Abstract: A magnetic random access memory (MRAM) includes device strings coupled in parallel, each comprising magnetic tunnel junctions (MTJs) coupled in serial, wherein a quantity of the MTJs of each of the device strings is equal to a quantity of the device strings, and an equivalent resistance (Req) of the MTJs is equal to an average of the sum of a high resistance of one of the MTJs and a low resistance of another MTJ.

Abstract: A method of forming a fin forced stack inverter includes the following steps. A substrate including a first fin, a second fin and a third fin across a first active area along a first direction is provided, wherein the first fin, the second fin and the third fin are arranged side by side. A fin remove inside active process is performed to remove at least a part of the second fin in the first active area. A first gate is formed across the first fin and the third fin in the first active area along a second direction. The present invention also provides a 1-1 fin forced fin stack inverter formed by said method.

Abstract: An elevator balanced-load rescue device, an elevator, and an elevator balanced-load rescue method are provided by the present disclosure. The elevator balanced-load rescue device includes: a clamping wheel set including a driving wheel and a driven wheel that cooperate with each other; wherein the clamping wheel set has a clamping position and a releasing position; in the clamping position, the driving wheel and the driven wheel move toward each other to clamp a traction belt connected between an elevator car and an elevator counterweight; and in the releasing position, the driving wheel and the driven wheel move opposite to each other to release the traction belt; a transmission shaft which has a first end connected to the driving wheel of the clamping wheel set, and which transmits a torque to the driving wheel; and an energy storage device associated with the transmission shaft.

Abstract: A method of forming a capacitor includes the following steps. First, a substrate is provided. A dielectric layer is formed over the substrate. A first patterning process is performed to form a first contact plug through the whole thickness of the dielectric layer and a second patterning process is performed to form a second contact plug in the dielectric layer and spaced apart from the first contact plug in a pre-determined distance, wherein the first contact plug and the second contact plug are capacitively coupled.

Abstract: Described herein are delivery containers, systems and methods using same for providing improvements to precursor utilization in the containers for deposition process, as well as the cleaning and refilling of the containers. The containers are designed with structures which allow a carrier gas to be delivered from a flow distributor. The flow distributor comprises a plurality of small openings (jets) through which the carrier gas enters the precursor chamber and impinges upon the surface of the chemical precursors to produce a vapor.

Abstract: A touch display device includes thin film transistors, a first insulating layer, a first transparent conductive layer, a second insulating layer, contact holes, a second transparent conductive layer, and touch signal lines. The first transparent conductive layer includes pixel electrodes, and each pixel electrode is electrically connected to a drain of one of the thin film transistors. The contact holes penetrate the first insulating layer and the second insulating layer. Each contact hole exposes a portion of the pixel electrode and a portion of the drain. The second transparent conductive layer includes touch electrodes and connecting electrodes. Each connecting electrode extends into one of the contact holes, and is in contact with the portion of the pixel electrode and the portion of the drain. Each touch signal line is electrically to a corresponding touch electrode.

Abstract: A method of forming a fin forced stack inverter includes the following steps. A substrate including a first fin, a second fin and a third fin across a first active area along a first direction is provided, wherein the first fin, the second fin and the third fin are arranged side by side. A fin remove inside active process is performed to remove at least a part of the second fin in the first active area. A first gate is formed across the first fin and the third fin in the first active area along a second direction. The present invention also provides a 1-1 fin forced fin stack inverter formed by said method.

Abstract: The disclosure proposes a method of texture synthesis and an apparatus using the same. In one of the exemplary embodiments, the step of generating the first single scale detail image would include not limited to: performing a feature extraction of a first pixel block of an image frame to derive a first pixel feature, applying a first criteria to the first pixel feature to derive a positive result, performing a first detail alignment and a maximum extension of the positive result to derived an adjusted positive mapping result, applying a second criteria, which is opposite to the first criteria, to the first pixel feature to derive a negative result, performing a second detail alignment and a minimum extension of the negative result to derived an adjusted negative mapping result, and blending the adjusted positive mapping result and the adjusted negative mapping result to generate the first single scale detail image.

Abstract: A pixel structure includes a substrate, a thin film transistor and a common electrode. The thin film transistor is disposed on the substrate, wherein a semiconductive active layer of the thin film transistor has a channel region disposed between a source and a drain, the channel region includes a main channel region and at least one sub channel region, a channel length of the main channel region is less than a channel length of the at least one sub channel region, and the channel length of the main channel region is equal to a minimum of a channel length of the channel region. The common electrode is disposed on the thin film transistor, and the common electrode overlaps at least a portion of the at least one sub channel region, wherein the common electrode has an opening exposing the main channel region.

Abstract: The present invention provides a pull rope head fixing apparatus and an elevator system using the same, and belongs to the technical field of elevators. The pull rope head fixing apparatus of the present invention is configured to simultaneously fix rope heads of N pull ropes that are arranged in parallel, and includes: a hydraulic cylinder body configured to form a hydraulic cylinder; N first hydraulic sub-cylinders arranged in parallel on the hydraulic cylinder body and communicated with the hydraulic cylinder; and first pistons each disposed corresponding to each of the first hydraulic sub-cylinders. The pull rope head fixing apparatus of the present invention can automatically balance the tensions of multiple pull ropes fixed by it.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a first active region and a second active region extending along a first direction on a substrate; forming a first single diffusion break (SDB) structure extending along a second direction between the first active region and the second active region; and forming a first gate line extending along the second direction intersecting the first active region and the second active region. Preferably, the first SDB structure is directly under the first gate line between the first active region and the second active region.

Abstract: The present invention provides a test key structure for measuring or simulating a target via array. The structure includes a substrate with a test region, a plurality of first conductive lines in the test region; a plurality of second conductive lines in the test region and on the first conductive lines, wherein the first conductive lines and the second conductive lines overlaps vertically in a plurality of target regions, and a plurality of vias disposed between the first conductive lines and the second conductive lines, wherein at least two vias vertically contact one of the first conductive lines and one of the second conductive lines. The present invention further provides a method of measuring resistance by using the testkey structure.

Abstract: The disclosure is directed to a video processing apparatus and a video processing method thereof. In one of the exemplary embodiments, the disclosure is directed to a video processing apparatus which includes not limited to a storage medium configured to store a first video file, a down-scaling module coupled to the storage medium and configured to down-scale the first video file into a second video file, a learning machine module configured to receive the first video file and a third video file which is processed from the second multimedia file and generate a trained model out of the first video file and the third video file, and a transmitter configured to transmit a data package which comprises a compression of the second video file and a compression of the trained model.

Abstract: The application relates to a method and system for tracking a target object in a video. The method includes: extracting, from the video, a 3-dimension (3D) feature block containing the target object; decomposing the extracted 3D feature block into a 2-dimension (2D) spatial feature map containing spatial information of the target object and a 2D spatial-temporal feature map containing spatial-temporal information of the target object; estimating, in the 2D spatial feature map, a location of the target object; determining, in the 2D spatial-temporal feature map, a speed and an acceleration of the target object; calibrating the estimated location of the target object according to the determined speed and acceleration; and tracking the target object in the video according to the calibrated location.