Patents by Inventor Kai Min

Kai Min has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240161473
    Abstract: Methods and systems for training a model include performing spatial augmentation on an unlabeled input video to generate spatially augmented video. Temporal augmentation is performed on the input video to generate temporally augmented video. Predictions are generated, using a model that was pre-trained on a labeled dataset, for the unlabeled input video, the spatially augmented video, and the temporally augmented video. Parameters of the model are adapted using the predictions while enforcing temporal consistency, temporal consistency, and historical consistency. The model may be used for action recognition in a healthcare context, with recognition results being used for determining whether patients are performing a rehabilitation exercise correctly.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Inventors: Kai Li, Deep Patel, Erik Kruus, Renqiang Min
  • Publication number: 20240128219
    Abstract: A semiconductor die including mechanical-stress-resistant bump structures is provided. The semiconductor die includes dielectric material layers embedding metal interconnect structures, a connection pad-and-via structure, and a bump structure including a bump via portion and a bonding bump portion. The entirety of a bottom surface of the bump via portion is located within an area of a horizontal top surface of a pad portion of the connection pad-and-via structure.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 18, 2024
    Inventors: Hui-Min Huang, Wei-Hung Lin, Kai Jun Zhan, Chang-Jung Hsueh, Wan-Yu Chiang, Ming-Da Cheng
  • Patent number: 11961817
    Abstract: An apparatus for forming a package structure is provided. The apparatus includes a processing chamber for bonding a first package component and a second package component. The apparatus also includes a bonding head disposed in the processing chamber. The bonding head includes a plurality of vacuum tubes communicating with a plurality of vacuum devices. The apparatus further includes a nozzle connected to the bonding head and configured to hold the second package component. The nozzle includes a plurality of first holes that overlap the vacuum tubes. The nozzle also includes a plurality of second holes offset from the first holes, wherein the second holes overlap at least two edges of the second package component. In addition, the apparatus includes a chuck table disposed in the processing chamber, and the chuck table is configured to hold and heat the first package component.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kai Jun Zhan, Chang-Jung Hsueh, Hui-Min Huang, Wei-Hung Lin, Ming-Da Cheng
  • Patent number: 11962881
    Abstract: Various embodiments include sensor shift flexure arrangements for improved signal routing. For example, a camera with sensor shift actuation may include a flexure for suspending an image sensor from a stationary structure of the camera, and for allowing motion of the image sensor enabled by one or more actuators of the camera. The flexure may be configured to convey electrical signals between the image sensor and a flex circuit in some embodiments. According to some embodiments, the flexure may include a stack of layers comprising a conductive layer and an electrical grounding. The conductive layer may include a signal pad region and a signal trace region. A distance between at least one section of the signal pad region and the electrical grounding may be greater than a distance between at least a section of the signal trace region and the electrical grounding.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: April 16, 2024
    Assignee: Apple Inc.
    Inventors: Himesh Patel, Kai Min, Phillip R. Sommer, Pavle Stojanovic, Qiang Yang
  • Publication number: 20240097011
    Abstract: A method includes forming a fin structure over a substrate, wherein the fin structure comprises first semiconductor layers and second semiconductor layers alternately stacked over a substrate; forming a dummy gate structure over the fin structure; removing a portion of the fin structure uncovered by the dummy gate structure; performing a selective etching process to laterally recess the first semiconductor layers, including injecting a hydrogen-containing gas from a first gas source of a processing tool to the first semiconductor layers and the second semiconductor layers; and injecting an F2 gas from a second gas source of the processing tool to the first semiconductor layers and the second semiconductor layers; forming inner spacers on opposite end surfaces of the laterally recessed first semiconductor layers of the fin structure; and replacing the dummy gate structure and the first semiconductor layers with a metal gate structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Han-Yu LIN, Fang-Wei LEE, Kai-Tak LAM, Raghunath PUTIKAM, Tzer-Min SHEN, Li-Te LIN, Pinyen LIN, Cheng-Tzu YANG, Tzu-Li LEE, Tze-Chung LIN
  • Publication number: 20240095128
    Abstract: An information handling system may include at least one processor and a memory. The information handling system may be configured to store a first set of data comprising an operating system in a first location; store a second set of data comprising application data in a second location; expose the first and second sets of data in a combined union mount filesystem; and create a backup of the second set of data, but not the first set of data, by creating a copy of the second location.
    Type: Application
    Filed: September 29, 2022
    Publication date: March 21, 2024
    Applicant: Dell Products L.P.
    Inventors: Alice Min LI, Jun ZHAN, Kai CHEN
  • Publication number: 20240087179
    Abstract: Methods and systems for training a model include training an encoder in an unsupervised fashion based on a backward latent flow between a reference frame and a driving frame taken from a same video. A diffusion model is trained that generates a video sequence responsive to an input image and a text condition, using the trained encoder to determine a latent flow sequence and occlusion map sequence of a labeled training video.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 14, 2024
    Inventors: Renqiang Min, Kai Li, Hans Peter Graf, Haomiao Ni
  • Publication number: 20240087196
    Abstract: Methods and systems for image generation include generating a latent representation of an image, modifying the latent representation of the image based on a trained attribute classifier and a specified attribute input, and decoding the modified latent representation to generate an output image that matches the specified attribute input.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 14, 2024
    Inventors: Renqiang Min, Kai Li, Shaobo Han, Hans Peter Graf, Changhao Shi
  • Publication number: 20240078565
    Abstract: A data processing system may generate a plurality of probability distributions, each probability distribution corresponding to a different profile characteristic regarding transactions performed by an entity. The data processing system may receive a first profile characteristic configuration for each of the plurality of probability distributions and a corresponding first start time. The data processing system may adjust each of the plurality of probability distributions according to the first profile characteristic configuration for the probability distribution and the first start time to generate a first set of adjusted probability distributions. The data processing system may sample each of the first set of adjusted probability distributions to generate transaction data for one or more first transactions. The data processing system may generate a record comprising the generated transaction data.
    Type: Application
    Filed: January 12, 2023
    Publication date: March 7, 2024
    Inventors: Giacomo Domeniconi, Kai-min Kevin Chang, Samuel Assefa
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240070824
    Abstract: The present disclosure discloses an image processing circuit having output timing adjustment mechanism. An image enhancement circuit performs image enhancement on an input image to generate an enhanced image. A first image processing path and a second image processing path respectively perform processing on the enhanced image having a first timing and the enhanced image having a second timing to generate a first output image and a second output image. A timing control circuit adjusts the timing of the enhanced image according to requirements of the first image processing path and the second image processing path to generate the enhanced image having the first timing and the enhanced image having the second timing. A first image output interface outputs the first output image. A second image output interface outputs the second output image.
    Type: Application
    Filed: July 20, 2023
    Publication date: February 29, 2024
    Inventors: TZU-MIN YEH, KAI-CHO CHANG, PO-HSIEN WU, HSU-JUNG TUNG
  • Publication number: 20240067939
    Abstract: The present disclosure provides methods, compositions, kits and systems for nucleic acid amplification. In some embodiments, nucleic acid amplification methods include subjecting the nucleic acid to be amplified to partially denaturing conditions. In some embodiments, nucleic acid amplification methods include amplifying without fully denaturing the nucleic acid that is amplified. In some embodiments, the nucleic acid amplification method employs an enzyme that catalyzes homologous recombination and a polymerase. In some embodiments, methods for nucleic acid amplification can be conducted in a single reaction vessel and/or in a single continuous liquid phase of a reaction mixture, without need for compartmentalization of the reaction mixture or immobilization of reaction components.
    Type: Application
    Filed: July 12, 2023
    Publication date: February 29, 2024
    Inventors: Chieh-Yuan LI, David RUFF, Shiaw-Min CHEN, Jennifer O'NEIL, Rachel KASINSKAS, Jonathan ROTHBERG, Bin LI, Kai Qin LAO
  • Patent number: 11821797
    Abstract: A temperature sensing device for a hot stamping die apparatus includes: a processor, wherein when a second die moves toward a first die to press a workpiece, a pushing signal is transmitted to the processor; at least one temperature sensing unit is disposed in the first die and includes: a moving rod, a buffer, and a temperature sensor; a displacement regulator; and a controller, whereby when the processor receives the pushing signal, the processor controls the displacement regulator through the controller, so that the moving rod drives the buffer and the temperature sensor to move a predetermined distance, and further the temperature sensor moves toward the workpiece to touch the workpiece and sense a temperature of the workpiece.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: November 21, 2023
    Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Tai-Hsin Hsu, Bing-Chuen Hu, Wan-Ling Chen, Kai-Min Tang
  • Patent number: 11792516
    Abstract: Various embodiments include flex circuit arrangements for a camera with sensor shift actuation. Some embodiments include a flexure-circuit hybrid structure. Some embodiments include an actuation-module flex circuit hybrid structure. In some embodiments, the hybrid structures may include different portions that share multiple layers of a plurality of stacked layers. In some embodiments, one portion of a hybrid structure may include one or more layers that are different from the layers in another portion of the hybrid structure.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: October 17, 2023
    Assignee: Apple Inc.
    Inventors: Himesh Patel, Kai Min, Phillip R. Sommer
  • Publication number: 20230187535
    Abstract: Semiconductor structures and methods for manufacturing the same are provided. The method for manufacturing the semiconductor structure includes forming a fin structure protruding from a substrate, and the fin structure includes first semiconductor material layers and second semiconductor material layers alternately stacked. The method also includes forming a dummy gate structure across the fin structure and forming a gate spacer on a sidewall of the dummy gate structure. The method also includes partially oxidizing the gate spacer to form an oxide layer and removing the oxide layer to form a modified gate spacer. The method also includes removing the first semiconductor material layers to form gaps and forming a gate structure in the gaps to wrap around the second semiconductor material layers and over the second semiconductor material layers to cover the modified gate spacer.
    Type: Application
    Filed: June 2, 2022
    Publication date: June 15, 2023
    Inventors: Yu-Jiun Peng, Hsuan-Chih Wu, Cheng-Chung Chang, Shu-Han Chen, Hsiu-Hao Tsao, Min-Chia Lee, Kai-Min Chien, Ming-Chang Wen, Kuo-Feng Yu, Chang-Jhih Syu
  • Patent number: 11495159
    Abstract: A display device including a plurality of sub-pixel arrays is provided. Each of sub-pixel arrays includes a plurality of first sub-pixels, at least one second sub-pixel and at least one third sub-pixel. The first sub-pixels have a first color and form a plurality of vertexes of a virtual quadrilateral. There is not any other first sub-pixels having the first color located in the virtual quadrilateral. The second sub-pixel has a second color different from the first color and is located in the virtual quadrilateral. The third sub-pixel has a third color different from the first color and the second color and is located in the virtual quadrilateral.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: November 8, 2022
    Assignee: Novatek Microelectronics Corp.
    Inventors: Hsueh-Yen Yang, Kai-Min Yang, Feng-Ting Pai
  • Publication number: 20220178770
    Abstract: A temperature sensing device for a hot stamping die apparatus includes: a processor, wherein when a second die moves toward a first die to press a workpiece, a pushing signal is transmitted to the processor; at least one temperature sensing unit is disposed in the first die and includes: a moving rod, a buffer, and a temperature sensor; a displacement regulator; and a controller, whereby when the processor receives the pushing signal, the processor controls the displacement regulator through the controller, so that the moving rod drives the buffer and the temperature sensor to move a predetermined distance, and further the temperature sensor moves toward the workpiece to touch the workpiece and sense a temperature of the workpiece.
    Type: Application
    Filed: December 8, 2020
    Publication date: June 9, 2022
    Inventors: TAI-HSIN HSU, BING-CHUEN HU, WAN-LING CHEN, KAI-MIN TANG
  • Patent number: 11205367
    Abstract: A display panel including a plurality of sub-pixel repeating units is provided. The sub-pixel repeating units are repeatedly arranged on the display panel. Each of the sub-pixel repeating units includes at least one first color sub-pixel and at least one second color sub-pixel. On the display panel, the adjacent first color sub-pixels form a first polygon, and the adjacent second color sub-pixels form a second polygon. The area of the first polygon is at least twice the area of the second polygon.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: December 21, 2021
    Assignee: Novatek Microelectronics Corp.
    Inventors: Hsueh-Yen Yang, Kai-Min Yang, Feng-Ting Pai
  • Publication number: 20210008101
    Abstract: The present invention relates to methods and compositions for preventing, reducing or eradicating toxicity caused by acetaminophen (APAP). Specifically, the toxicity is nephrotoxicity and/or hepatotoxicity.
    Type: Application
    Filed: February 14, 2019
    Publication date: January 14, 2021
    Applicant: SINEW PHARMA INC.
    Inventors: Oliver Yoa-Pu HU, Tung-Yuan SHIH, Cheng-Huei HSIONG, Hsin-Tien HO, Kai-Min CHU