Abstract: A de-embed probe, including two inputs configured to connect to a device under test, a memory, a signal generator configured to output a signal, a plurality of load components, a plurality of switches, and a controller. Each load component is configured to provide a different load. A first switch of the plurality of switches is associated with the signal generator and the other switches of the plurality of switches are each associated with one load component. The controller is configured to control the plurality of switches to connect combinations of the loads from the plurality of load components and the signal from the signal generator across the two inputs.

Abstract: Computationally efficient methods and related systems, for use in a test and measurement instrument, such as an oscilloscope, optimize the performance of DFEs used in a high-speed serial data link by identifying optimal DFE tap values for peak-to-peak based criteria. The optimized DFEs comply with the behavior of a model DFE set forth in the PCIE 3.0 specification.

Abstract: A device and method of re-sampling a plurality of S-parameters for serial data link analysis is disclosed. The method includes storing a plurality of S-parameters sets, each S-parameter set being associated with a subsystem and having associated impulse responses and a time interval. An increased time interval is determined based on the time interval associated with each S-parameter set. The impulse responses are zero filled in each S-parameter set to maintain any wrapped ripples and increase the time interval. A plurality of resampled S-parameter sets are generated with a finer frequency resolution to cover the increased time interval.

Abstract: Computationally efficient methods and related systems, for use in a test and measurement instrument, such as an oscilloscope, optimize the performance of DFEs used in a high-speed serial data link by identifying optimal DFE tap values for peak-to-peak based criteria. The optimized DFEs comply with the behavior of a model DFE set forth in the PCIE 3.0 specification.

Abstract: A device and method of re-sampling a plurality of S-parameters for serial data link analysis is disclosed. The method includes storing a plurality of S-parameters sets, each S-parameter set being associated with a subsystem and having associated impulse responses and a time interval. An increased time interval is determined based on the time interval associated with each S-parameter set. The impulse responses are zero filled in each S-parameter set to maintain any wrapped ripples and increase the time interval. A plurality of resampled S-parameter sets are generated with a finer frequency resolution to cover the increased time interval.

Abstract: A serial data link measurement and simulation system for use on a test and measurement instrument presents on a display device a main menu having elements representing a measurement circuit, a simulation circuit and a transmitter. The main menu includes processing flow lines pointing from the measurement circuit to the transmitter and from the transmitter to the simulation circuit. The main menu includes a source input to the measurement circuit and one or more test points from which waveforms may be obtained. The simulation circuit includes a receiver. The measurement and simulation circuits are defined by a user, and the transmitter is common to both circuits so all aspects of the serial data link system are tied together.

Abstract: An apparatus and method for splitting a wide band input signal and overlaying multiple frequency bands on each path associated with one or more digitizers. All frequencies from the split signal on each path can be fed to a mixer. The local oscillator of each mixer receives a sum of signals, which can each be set to any arbitrary frequency, as long as an associated matrix determinant of coefficients is non-zero. Each oscillator signal is multiplied by a coefficient, which can represent phase and magnitude, prior to summing the oscillator signals together. Each mixer mixes a combined signal with the input, thereby generating a set of multiple overlaid frequency bands. The digitized signals are processed to substantially reconstruct the original input signal. Thus, the wide band input signal is digitized using multiple individual digitizers. In particular, a system can support two wide band signals using four digitizers of narrower bandwidth.

Abstract: An apparatus and method for splitting a wide band input signal and overlaying multiple frequency bands on each path associated with one or more digitizers. All frequencies from the split signal on each path can be fed to a mixer. The local oscillator of each mixer receives a sum of signals, which can each be set to any arbitrary frequency, as long as an associated matrix determinant of coefficients is non-zero. Each oscillator signal is multiplied by a coefficient, which can represent phase and magnitude, prior to summing the oscillator signals together. Each mixer mixes a combined signal with the input, thereby generating a set of multiple overlaid frequency bands. The digitized signals are processed to substantially reconstruct the original input signal. Thus, the wide band input signal is digitized using multiple individual digitizers. In particular, a system can support two wide band signals using four digitizers of narrower bandwidth.

Abstract: An apparatus and method for splitting a wide band input signal and overlaying multiple frequency bands on each path associated with one or more digitizers. All frequencies from the split signal on each path can be fed to a mixer. The local oscillator of each mixer receives a sum of signals, which can each be set to any arbitrary frequency, as long as an associated matrix determinant of coefficients is non-zero. Each oscillator signal is multiplied by a coefficient, which can represent phase and magnitude, prior to summing the oscillator signals together. Each mixer mixes a combined signal with the input, thereby generating a set of multiple overlaid frequency bands. The digitized signals are processed to substantially reconstruct the original input signal. Thus, the wide band input signal is digitized using multiple individual digitizers. In particular, a system can support two wide band signals using four digitizers of narrower bandwidth.

Abstract: An apparatus and method for splitting a wide band input signal and overlaying multiple frequency bands on each path associated with one or more digitizers. All frequencies from the split signal on each path can be fed to a mixer. The local oscillator of each mixer receives a sum of signals, which can each be set to any arbitrary frequency, as long as an associated matrix determinant of coefficients is non-zero. Each oscillator signal is multiplied by a coefficient, which can represent phase and magnitude, prior to summing the oscillator signals together. Each mixer mixes a combined signal with the input, thereby generating a set of multiple overlaid frequency bands. The digitized signals are processed to substantially reconstruct the original input signal. Thus, the wide band input signal is digitized using multiple individual digitizers. In particular, a system can support two wide band signals using four digitizers of narrower bandwidth.

Abstract: An equalization simulator with training sequence detection uses an oscilloscope to acquire digital samples of an analog waveform signal from a serial data link to produce a digitized waveform record. The equalization simulator has training sequence detection receiving the digitized waveform record and generates a training sequence, an equalization adapter receiving the digitized waveform record and the training sequence and generating equalizer taps, and an equalizer receiving the equalizer taps and the digitized waveform record and generating an equalized digitized waveform record.

Abstract: Computationally efficient methods and related systems, for use in a test and measurement instrument, such as an oscilloscope, optimize the performance of DFEs used in a high-speed serial data link by identifying optimal DFE tap values for peak-to-peak based criteria. The optimized DFEs comply with the behavior of a model DFE set forth in the PCIE 3.0 specification.

Abstract: Method and systems are described for estimating signal impairments, in particular jitter that includes uncorrelated, non-periodic signal impairments. One system may take the form of an oscilloscope. The estimates may take the form of a probability density function (PDF) for uncorrelated signal impairments that has been modified to replace low probability regions with a known approximation and an extrapolation of the known approximation.

Abstract: A realtime spectrum trigger system on a realtime oscilloscope considers both the magnitude and phase of an input signal having a periodic component so that successive acquisitions of the input signal are time aligned. A user inputs a frequency, threshold and phase for triggering on the periodic component. Input signal samples are filtered by quadrature filters according to the frequency input to produce quadrature signal components. The square of the magnitude of the input signal is computed from the quadrature signal components, as well as the phase ratio and sign, for comparison with calculated values. When enabled by the magnitude of the input signal, a phase crossing determinator compares the phase ratio and sign with calculated values to determine the phase crossing to generate a trigger, resulting in successive acquisitions of the input signal being in time alignment.

Abstract: A method useful for the characterization of a fixture splits a partially symmetric THRU structure into portions which may then be mathematically removed from both ports of a 2-port measured structure, leaving only the desired device under test (DUT).

Abstract: A method of measuring transport delay and jitter with a realtime oscilloscope using cross-correlation acquires waveforms from two test points in a system under test. Clock recovery is run on both waveforms to obtain respective rates and offsets. A time offset between the two waveforms is computed. The jitter from the two test points is filtered and a mean-removed cross-correlation coefficient is computed from the filtered jitters. A fractional delay is computed using interpolation based on LMS error, and the respective computational components are summed to compute a transport delay between the two test points. The transport delay may be used to adjust clock edges from one waveform for comparison with data transition edges of the other waveform to measure jitter.

Abstract: An equalization simulator with training sequence detection uses an oscilloscope to acquire digital samples of an analog waveform signal from a serial data link to produce a digitized waveform record. The equalization simulator has training sequence detection receiving the digitized waveform record and generates a training sequence, an equalization adapter receiving the digitized waveform record and the training sequence and generating equalizer taps, and an equalizer receiving the equalizer taps and the digitized waveform record and generating an equalized digitized waveform record.

Abstract: An acquisition apparatus for a test and measurement instrument including a splitter configured to split an input signal into a plurality of split signals, a plurality of oscillators, each oscillator configured to generate a periodic signal, a plurality of combiners, each combiner configured to combine an associated plurality of the periodic signals into an associated signal combination where at least one of the signal combinations is substantially non-periodic. The apparatus also includes a plurality of mixers, each mixer configured to mix an associated split signal and an associated signal combination into an associated mixed signal, a first digitizer configured to digitize an associated split signal, and a plurality of second digitizers, each second digitizer configured to digitize an associated mixed signal.

Abstract: A method and apparatus adapted to calibrate a signal path of a signal analysis system such that loading effects of the system are substantially removed from measurements of a device under test. A signal under test from the device under test is coupled to a test probe in the signal path and used with selectable impedance loads in the test probe to characterize transfer parameters of the device under test. An equalization filter in either the frequency or time domain is computed from the device under test transfer parameters for reducing in signal error attributable to the measurement loading of the device under test.

Abstract: A method useful for the characterization of a fixture splits a partially symmetric THRU structure into portions which may then be mathematically removed from both ports of a 2-port measured structure, leaving only the desired device under test (DUT).