Abstract: The presented principles describe an apparatus and method of making the same, the apparatus being a semiconductor circuit device, having shallow trench isolation features bounding an active area and a periphery area on a semiconductor substrate to electrically isolate structures in the active area from structures in the periphery area. The shallow trench isolation feature bounding the active area is shallower than the shallow trench isolation feature bounding the periphery area, with the periphery area shallow trench isolation structure being formed through two or more etching steps.

Abstract: A method of manufacturing a semiconductor device is disclosed. The exemplary method includes providing a substrate having a source region and a drain region. The method further includes forming a first recess in the substrate within the source region and a second recess in the substrate within the drain region. The first recess has a first plurality of surfaces and the second recess has a second plurality of surfaces. The method also includes epi-growing a semiconductor material in the first and second recesses and, thereafter, forming shallow isolation (STI) features in the substrate.

Abstract: The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature.

Abstract: The present disclosure provides a method and system for modifying a doped region design layout during mask preparation to tune device performance. An exemplary method includes receiving an integrated circuit design layout designed to define an integrated circuit, wherein the integrated circuit design layout includes a doped feature layout; identifying an area of the integrated circuit for device performance modification, and modifying a portion of the doped feature layout that corresponds with the identified area of the integrated circuit during a mask preparation process, thereby providing a modified doped feature layout.

Abstract: The present application discloses a method of manufacturing a semiconductor structure. According to at least one embodiment, a first etch stop layer is formed over a conductive feature and a substrate, and the conductive feature is positioned over the substrate. A second etch stop layer is formed over the first etch stop layer. A first etch is performed to form an opening in the second etch stop layer, and the opening exposes a portion of the first etch stop layer. A second etch is performed to extend the opening downwardly by removing a portion of the exposed first etch stop layer, and the extended opening exposes a portion of the conductive feature.

Abstract: A system and method for reducing cross-talk between photosensitive diodes is provided. In an embodiment an isolation region comprising a first concentration of dopants is located between the photosensitive diodes. The photosensitive diodes have a second concentration of dopants that is less than the first concentration of dopants, which helps to prevent diffusion from the photosensitive diodes to form a potential path for undesired cross-talk between the photosensitive diodes.

Abstract: A backside illuminated CMOS image sensor comprises an extended photo active region formed over a substrate using a first high energy ion implantation process and an isolation region formed over the substrate using a second high energy ion implantation process. The extended photo active region is enclosed by the isolation region, which has a same depth as the extended photo active region. The extended photo active region helps to increase the number of photons converted into electrons so as to improve quantum efficiency.

Abstract: A method of manufacturing a semiconductor device is disclosed. The exemplary method includes providing a substrate having a source region and a drain region. The method further includes forming a first recess in the substrate within the source region and a second recess in the substrate within the drain region. The first recess has a first plurality of surfaces and the second recess has a second plurality of surfaces. The method also includes epi-growing a semiconductor material in the first and second recesses and, thereafter, forming shallow isolation (STI) features in the substrate.

Abstract: The present disclosure provides a method and system for modifying a doped region design layout during mask preparation to tune device performance. An exemplary method includes receiving an integrated circuit design layout designed to define an integrated circuit, wherein the integrated circuit design layout includes a doped feature layout; identifying an area of the integrated circuit for device performance modification, and modifying a portion of the doped feature layout that corresponds with the identified area of the integrated circuit during a mask preparation process, thereby providing a modified doped feature layout.

Abstract: A method of manufacturing a semiconductor device is disclosed. The exemplary method includes providing a substrate having a source region and a drain region. The method further includes forming a first recess in the substrate within the source region and a second recess in the substrate within the drain region. The first recess has a first plurality of surfaces and the second recess has a second plurality of surfaces. The method also includes epi-growing a semiconductor material in the first and second recesses and, thereafter, forming shallow isolation (STI) features in the substrate.

Abstract: The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature.

Abstract: The present application discloses a method of manufacturing a semiconductor structure. According to at least one embodiment, a first etch stop layer is formed over a conductive feature and a substrate, and the conductive feature is positioned over the substrate. A second etch stop layer is formed over the first etch stop layer. A first etch is performed to form an opening in the second etch stop layer, and the opening exposes a portion of the first etch stop layer. A second etch is performed to extend the opening downwardly by removing a portion of the exposed first etch stop layer, and the extended opening exposes a portion of the conductive feature.

Abstract: An embodiment of the disclosure includes a method of forming a semiconductor structure. A substrate has a region adjacent to a shallow trench isolation (STI) structure in the substrate. A patterned mask layer is formed over the substrate. The patterned mask layer covers the STI structure and a portion of the region, and leaves a remaining portion of the region exposed. A distance between an edge of the remaining portion and an edge of the STI structure is substantially longer than 1 nm. The remaining portion of the region is etched thereby forms a recess in the substrate. A stressor is epitaxially grown in the recess. A conductive plug contacting the stressor is formed.

Abstract: A condenser microphone includes: a true condenser microphone (TCM) pickup operable to generate an input signal at a high impedance corresponding to sound picked up thereby; an impedance conversion circuit connected electrically to the TCM pickup, and operable to convert the input signal from the TCM pickup to a converted signal at a low impedance; an amplifier circuit connected electrically to the impedance conversion circuit, disposed to receive a power signal, and operable for amplifying the converted signal so as to generate an output signal; and a phantom voltage module connected electrically to the TCM pickup, disposed to receive the power signal, and operable for generating a phantom signal from the power signal, the phantom signal having a voltage higher than that of the power signal and being provided to the TCM pickup for charging the TCM pickup.

Abstract: The present disclosure provides a solar cell device. The device has solar cells having multijunction. A supplemental current source is connected with one of the solar cells having a smallest current in the device. Thus, through providing required current by the supplemental current source, usage performance of the device is enhanced.

Abstract: An audio pick-up device of a condenser microphone includes a base, a resilient anti-shock mount disposed fixedly on the base, and an audio pick-up unit disposed securely on the anti-shock mount for sensing and processing sound waves to output corresponding electric signals. The audio pick-up device further includes a circuit unit that includes an impedance converter circuit board and a control circuit board. The impedance converter circuit board is disposed securely on the anti-shock mount and is connected electrically to the audio pick-up unit for converting a high-impedance output of the audio pick-up unit to a low-impedance output. The control circuit board is mounted on the base and is coupled electrically to the impedance converter circuit board for receiving and processing the electric signals therefrom.

Abstract: A microphone includes a grip and an audio pick-up unit mounted to one end of the grip. The microphone further includes a switch disposed in the grip and having an operable part that is movable relative to the grip between on and off positions. The microphone also includes a switch actuator movably disposed on the grip, coupled to the operable part of the switch, and manually operable to drive the operable part to move between the on and off positions. The microphone further includes a locking member movably disposed on the grip and manually operable for movement between a locking position and an unlocking position.

Abstract: A wireless microphone includes a perforated front cover mounted on a front open end of a tubular housing, and a control module mounted fixedly on a rear open end of the housing and having an outer surrounding surface provided with a power switch and electrode plates. A rear cover is connected detachably to the control module, and is formed with a switch-receiving groove and through holes. The rear cover is operable so as to be disposed between an adjusted position, where the power switch is exposed from the switch-receiving groove and where the electrode plates are respectively exposed from the through holes, and a used position, where the power switch and the electrode plates are fully covered by the rear cover. A positioning member positions the rear cover at a selected one of the used and adjusted positions.

Abstract: There is disclosed a method for coating an electrode on a wafer. Firstly, there is provided a wafer. Secondly, a metal area is defined in an upper surface of the wafer. Thirdly, the metal area is roughened via etching. Finally, an electrode is coated on the metal area via deposition.

Abstract: A wireless microphone includes a perforated front cover mounted on a front open end of a tubular housing, and a control module mounted fixedly on a rear open end of the housing and having an outer surrounding surface provided with a power switch and electrode plates. A rear cover is connected detachably to the control module, and is formed with a switch-receiving groove and through holes. The rear cover is operable so as to be disposed between an adjusted position, where the power switch is exposed from the switch-receiving groove and where the electrode plates are respectively exposed from the through holes, and a used position, where the power switch and the electrode plates are fully covered by the rear cover. A positioning member positions the rear cover at a selected one of the used and adjusted positions.